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Revision 1.5 -
( show annotations)
( download)
( as text)
Wed Apr 24 03:53:20 2002 UTC
(21 years, 11 months ago)
by zero
Branch: MAIN
CVS Tags: ver_0_60_1, ver0_59_13, ver0_59_14, ver0_60_2, ver0_60_3, ver0_60_4, ver0_60_5, HEAD
Changes since 1.4: +0 -0 lines
File MIME type: text/x-csrc
*** empty log message ***
| 1 |
/*************************************************************************** |
| 2 |
|
| 3 |
cpuintrf.c |
| 4 |
|
| 5 |
Core CPU interface functions and definitions. |
| 6 |
|
| 7 |
Cleanup phase 1: split into two pieces |
| 8 |
Cleanup phase 2: simplify CPU core interfaces |
| 9 |
Cleanup phase 3: phase out old interrupt system |
| 10 |
|
| 11 |
***************************************************************************/ |
| 12 |
|
| 13 |
#include <signal.h> |
| 14 |
#include "driver.h" |
| 15 |
#include "state.h" |
| 16 |
#include "mamedbg.h" |
| 17 |
|
| 18 |
|
| 19 |
|
| 20 |
/************************************* |
| 21 |
* |
| 22 |
* Include headers from all CPUs |
| 23 |
* |
| 24 |
*************************************/ |
| 25 |
|
| 26 |
#if (HAS_Z80) |
| 27 |
#include "cpu/z80/z80.h" |
| 28 |
#endif |
| 29 |
#if (HAS_Z180) |
| 30 |
#include "cpu/z180/z180.h" |
| 31 |
#endif |
| 32 |
#if (HAS_8080 || HAS_8085A) |
| 33 |
#include "cpu/i8085/i8085.h" |
| 34 |
#endif |
| 35 |
#if (HAS_M6502 || HAS_M65C02 || HAS_M65SC02 || HAS_M6510 || HAS_M6510T || HAS_M7501 || HAS_M8502 || HAS_N2A03) |
| 36 |
#include "cpu/m6502/m6502.h" |
| 37 |
#endif |
| 38 |
#if (HAS_M4510) |
| 39 |
#include "cpu/m6502/m4510.h" |
| 40 |
#endif |
| 41 |
#if (HAS_M65CE02) |
| 42 |
#include "cpu/m6502/m65ce02.h" |
| 43 |
#endif |
| 44 |
#if (HAS_M6509) |
| 45 |
#include "cpu/m6502/m6509.h" |
| 46 |
#endif |
| 47 |
#if (HAS_H6280) |
| 48 |
#include "cpu/h6280/h6280.h" |
| 49 |
#endif |
| 50 |
#if (HAS_I86) |
| 51 |
#include "cpu/i86/i86intf.h" |
| 52 |
#endif |
| 53 |
#if (HAS_I88) |
| 54 |
#include "cpu/i86/i88intf.h" |
| 55 |
#endif |
| 56 |
#if (HAS_I186) |
| 57 |
#include "cpu/i86/i186intf.h" |
| 58 |
#endif |
| 59 |
#if (HAS_I188) |
| 60 |
#include "cpu/i86/i188intf.h" |
| 61 |
#endif |
| 62 |
#if (HAS_I286) |
| 63 |
#include "cpu/i86/i286intf.h" |
| 64 |
#endif |
| 65 |
#if (HAS_V20 || HAS_V30 || HAS_V33) |
| 66 |
#include "cpu/nec/necintrf.h" |
| 67 |
#endif |
| 68 |
#if (HAS_V60) |
| 69 |
#include "cpu/v60/v60.h" |
| 70 |
#endif |
| 71 |
#if (HAS_I8035 || HAS_I8039 || HAS_I8048 || HAS_N7751) |
| 72 |
#include "cpu/i8039/i8039.h" |
| 73 |
#endif |
| 74 |
#if (HAS_I8X41) |
| 75 |
#include "cpu/i8x41/i8x41.h" |
| 76 |
#endif |
| 77 |
#if (HAS_M6800 || HAS_M6801 || HAS_M6802 || HAS_M6803 || HAS_M6808 || HAS_HD63701) |
| 78 |
#include "cpu/m6800/m6800.h" |
| 79 |
#endif |
| 80 |
#if (HAS_M6805 || HAS_M68705 || HAS_HD63705) |
| 81 |
#include "cpu/m6805/m6805.h" |
| 82 |
#endif |
| 83 |
#if (HAS_M6809) |
| 84 |
#include "cpu/m6809/m6809.h" |
| 85 |
#endif |
| 86 |
#if (HAS_HD6309) |
| 87 |
#include "cpu/hd6309/hd6309.h" |
| 88 |
#endif |
| 89 |
#if (HAS_KONAMI) |
| 90 |
#include "cpu/konami/konami.h" |
| 91 |
#endif |
| 92 |
#if (HAS_M68000 || HAS_M68010 || HAS_M68020 || HAS_M68EC020) |
| 93 |
#include "cpu/m68000/m68000.h" |
| 94 |
#endif |
| 95 |
#if (HAS_T11) |
| 96 |
#include "cpu/t11/t11.h" |
| 97 |
#endif |
| 98 |
#if (HAS_S2650) |
| 99 |
#include "cpu/s2650/s2650.h" |
| 100 |
#endif |
| 101 |
#if (HAS_TMS34010 || HAS_TMS34020) |
| 102 |
#include "cpu/tms34010/tms34010.h" |
| 103 |
#endif |
| 104 |
#if (HAS_TMS9900 || HAS_TMS9940 || HAS_TMS9980 || HAS_TMS9985 || HAS_TMS9989 || HAS_TMS9995 || HAS_TMS99105A || HAS_TMS99110A) |
| 105 |
#include "cpu/tms9900/tms9900.h" |
| 106 |
#endif |
| 107 |
#if (HAS_Z8000) |
| 108 |
#include "cpu/z8000/z8000.h" |
| 109 |
#endif |
| 110 |
#if (HAS_TMS320C10) |
| 111 |
#include "cpu/tms32010/tms32010.h" |
| 112 |
#endif |
| 113 |
#if (HAS_CCPU) |
| 114 |
#include "cpu/ccpu/ccpu.h" |
| 115 |
#endif |
| 116 |
#if (HAS_ADSP2100 || HAS_ADSP2105) |
| 117 |
#include "cpu/adsp2100/adsp2100.h" |
| 118 |
#endif |
| 119 |
#if (HAS_PSXCPU) |
| 120 |
#include "cpu/mips/mips.h" |
| 121 |
#endif |
| 122 |
#if (HAS_ASAP) |
| 123 |
#include "cpu/asap/asap.h" |
| 124 |
#endif |
| 125 |
#if (HAS_UPD7810) |
| 126 |
#include "cpu/upd7810/upd7810.h" |
| 127 |
#endif |
| 128 |
#if (HAS_JAGUAR) |
| 129 |
#include "cpu/jaguar/jaguar.h" |
| 130 |
#endif |
| 131 |
#if (HAS_R3000) |
| 132 |
#include "cpu/mips/r3000.h" |
| 133 |
#endif |
| 134 |
#if (HAS_TMS320C31) |
| 135 |
#include "cpu/tms32031/tms32031.h" |
| 136 |
#endif |
| 137 |
#if (HAS_ARM) |
| 138 |
#include "cpu/arm/arm.h" |
| 139 |
#endif |
| 140 |
#if (HAS_SH2) |
| 141 |
#include "cpu/sh2/sh2.h" |
| 142 |
#endif |
| 143 |
|
| 144 |
|
| 145 |
#ifdef MESS |
| 146 |
|
| 147 |
#if (HAS_APEXC) |
| 148 |
#include "mess/cpu/apexc/apexc.h" |
| 149 |
#endif |
| 150 |
#if (HAS_CDP1802) |
| 151 |
#include "mess/cpu/cdp1802/cdp1802.h" |
| 152 |
#endif |
| 153 |
#if (HAS_CP1600) |
| 154 |
#include "mess/cpu/cp1600/cp1600.h" |
| 155 |
#endif |
| 156 |
#if (HAS_F8) |
| 157 |
#include "mess/cpu/f8/f8.h" |
| 158 |
#endif |
| 159 |
#if (HAS_G65816) |
| 160 |
#include "mess/cpu/g65816/g65816.h" |
| 161 |
#endif |
| 162 |
#if (HAS_LH5801) |
| 163 |
#include "mess/cpu/lh5801/lh5801.h" |
| 164 |
#endif |
| 165 |
#if (HAS_PDP1) |
| 166 |
#include "mess/cpu/pdp1/pdp1.h" |
| 167 |
#endif |
| 168 |
#if (HAS_SATURN) |
| 169 |
#include "mess/cpu/saturn/saturn.h" |
| 170 |
#endif |
| 171 |
#if (HAS_SC61860) |
| 172 |
#include "mess/cpu/sc61860/sc61860.h" |
| 173 |
#endif |
| 174 |
#if (HAS_SPC700) |
| 175 |
#include "mess/cpu/spc700/spc700.h" |
| 176 |
#endif |
| 177 |
#if (HAS_Z80GB) |
| 178 |
#include "mess/cpu/z80gb/z80gb.h" |
| 179 |
#endif |
| 180 |
#if (HAS_Z80_MSX) |
| 181 |
#include "cpu/z80/z80_msx.h" |
| 182 |
#endif |
| 183 |
|
| 184 |
#endif |
| 185 |
|
| 186 |
|
| 187 |
|
| 188 |
/************************************* |
| 189 |
* |
| 190 |
* Debug logging |
| 191 |
* |
| 192 |
*************************************/ |
| 193 |
|
| 194 |
#define VERBOSE 0 |
| 195 |
|
| 196 |
#if VERBOSE |
| 197 |
#define LOG(x) logerror x |
| 198 |
#else |
| 199 |
#define LOG(x) |
| 200 |
#endif |
| 201 |
|
| 202 |
|
| 203 |
|
| 204 |
/************************************* |
| 205 |
* |
| 206 |
* Macros to help verify active CPU |
| 207 |
* |
| 208 |
*************************************/ |
| 209 |
|
| 210 |
#define VERIFY_ACTIVECPU(retval, name) \ |
| 211 |
if (activecpu < 0) \ |
| 212 |
{ \ |
| 213 |
logerror(#name "() called with no active cpu!\n"); \ |
| 214 |
return retval; \ |
| 215 |
} |
| 216 |
|
| 217 |
#define VERIFY_ACTIVECPU_VOID(name) \ |
| 218 |
if (activecpu < 0) \ |
| 219 |
{ \ |
| 220 |
logerror(#name "() called with no active cpu!\n"); \ |
| 221 |
return; \ |
| 222 |
} |
| 223 |
|
| 224 |
|
| 225 |
|
| 226 |
/************************************* |
| 227 |
* |
| 228 |
* Macros to help verify CPU index |
| 229 |
* |
| 230 |
*************************************/ |
| 231 |
|
| 232 |
#define VERIFY_CPUNUM(retval, name) \ |
| 233 |
if (cpunum < 0 || cpunum >= totalcpu) \ |
| 234 |
{ \ |
| 235 |
logerror(#name "() called for invalid cpu num!\n"); \ |
| 236 |
return retval; \ |
| 237 |
} |
| 238 |
|
| 239 |
#define VERIFY_CPUNUM_VOID(name) \ |
| 240 |
if (cpunum < 0 || cpunum >= totalcpu) \ |
| 241 |
{ \ |
| 242 |
logerror(#name "() called for invalid cpu num!\n"); \ |
| 243 |
return; \ |
| 244 |
} |
| 245 |
|
| 246 |
|
| 247 |
|
| 248 |
/************************************* |
| 249 |
* |
| 250 |
* Internal CPU info type |
| 251 |
* |
| 252 |
*************************************/ |
| 253 |
|
| 254 |
struct cpuinfo |
| 255 |
{ |
| 256 |
struct cpu_interface intf; /* copy of the interface data */ |
| 257 |
int cputype; /* type index of this CPU */ |
| 258 |
int family; /* family index of this CPU */ |
| 259 |
void *context; /* dynamically allocated context buffer */ |
| 260 |
}; |
| 261 |
|
| 262 |
|
| 263 |
|
| 264 |
/************************************* |
| 265 |
* |
| 266 |
* Prototypes for dummy CPU |
| 267 |
* |
| 268 |
*************************************/ |
| 269 |
|
| 270 |
static void dummy_init(void); |
| 271 |
static void dummy_reset(void *param); |
| 272 |
static void dummy_exit(void); |
| 273 |
static int dummy_execute(int cycles); |
| 274 |
static void dummy_burn(int cycles); |
| 275 |
static unsigned dummy_get_context(void *regs); |
| 276 |
static void dummy_set_context(void *regs); |
| 277 |
static unsigned dummy_get_reg(int regnum); |
| 278 |
static void dummy_set_reg(int regnum, unsigned val); |
| 279 |
static void dummy_set_irq_line(int irqline, int state); |
| 280 |
static void dummy_set_irq_callback(int (*callback)(int irqline)); |
| 281 |
static int dummy_ICount; |
| 282 |
static const char *dummy_info(void *context, int regnum); |
| 283 |
static unsigned dummy_dasm(char *buffer, unsigned pc); |
| 284 |
|
| 285 |
|
| 286 |
|
| 287 |
/************************************* |
| 288 |
* |
| 289 |
* Macros to generate CPU entries |
| 290 |
* |
| 291 |
*************************************/ |
| 292 |
|
| 293 |
/* most CPUs use this macro */ |
| 294 |
#define CPU0(cpu,name,nirq,dirq,oc,datawidth,mem,shift,bits,endian,align,maxinst) \ |
| 295 |
{ \ |
| 296 |
CPU_##cpu, \ |
| 297 |
name##_init, name##_reset, name##_exit, name##_execute, NULL, \ |
| 298 |
name##_get_context, name##_set_context, NULL, NULL, \ |
| 299 |
name##_get_reg, name##_set_reg, \ |
| 300 |
name##_set_irq_line, name##_set_irq_callback, \ |
| 301 |
name##_info, name##_dasm, \ |
| 302 |
nirq, dirq, &name##_ICount, oc, \ |
| 303 |
datawidth, \ |
| 304 |
(mem_read_handler)cpu_readmem##mem, (mem_write_handler)cpu_writemem##mem, NULL, NULL, \ |
| 305 |
0, cpu_setopbase##mem, \ |
| 306 |
shift, bits, CPU_IS_##endian, align, maxinst \ |
| 307 |
} |
| 308 |
|
| 309 |
/* CPUs which have the _burn function */ |
| 310 |
#define CPU1(cpu,name,nirq,dirq,oc,datawidth,mem,shift,bits,endian,align,maxinst) \ |
| 311 |
{ \ |
| 312 |
CPU_##cpu, \ |
| 313 |
name##_init, name##_reset, name##_exit, name##_execute, \ |
| 314 |
name##_burn, \ |
| 315 |
name##_get_context, name##_set_context, \ |
| 316 |
name##_get_cycle_table, name##_set_cycle_table, \ |
| 317 |
name##_get_reg, name##_set_reg, \ |
| 318 |
name##_set_irq_line, name##_set_irq_callback, \ |
| 319 |
name##_info, name##_dasm, \ |
| 320 |
nirq, dirq, &name##_ICount, oc, \ |
| 321 |
datawidth, \ |
| 322 |
(mem_read_handler)cpu_readmem##mem, (mem_write_handler)cpu_writemem##mem, NULL, NULL, \ |
| 323 |
0, cpu_setopbase##mem, \ |
| 324 |
shift, bits, CPU_IS_##endian, align, maxinst \ |
| 325 |
} |
| 326 |
|
| 327 |
/* like CPU0, but CPU has Harvard-architecture like program/data memory */ |
| 328 |
#define CPU3(cpu,name,nirq,dirq,oc,datawidth,mem,shift,bits,endian,align,maxinst) \ |
| 329 |
{ \ |
| 330 |
CPU_##cpu, \ |
| 331 |
name##_init, name##_reset, name##_exit, name##_execute, NULL, \ |
| 332 |
name##_get_context, name##_set_context, NULL, NULL, \ |
| 333 |
name##_get_reg, name##_set_reg, \ |
| 334 |
name##_set_irq_line, name##_set_irq_callback, \ |
| 335 |
name##_info, name##_dasm, \ |
| 336 |
nirq, dirq, &name##_icount, oc, \ |
| 337 |
datawidth, \ |
| 338 |
(mem_read_handler)cpu_readmem##mem, (mem_write_handler)cpu_writemem##mem, NULL, NULL, \ |
| 339 |
cpu##_PGM_OFFSET, cpu_setopbase##mem, \ |
| 340 |
shift, bits, CPU_IS_##endian, align, maxinst \ |
| 341 |
} |
| 342 |
|
| 343 |
/* like CPU0, but CPU has internal memory (or I/O ports, timers or similiar) */ |
| 344 |
#define CPU4(cpu,name,nirq,dirq,oc,datawidth,mem,shift,bits,endian,align,maxinst) \ |
| 345 |
{ \ |
| 346 |
CPU_##cpu, \ |
| 347 |
name##_init, name##_reset, name##_exit, name##_execute, NULL, \ |
| 348 |
name##_get_context, name##_set_context, NULL, NULL, \ |
| 349 |
name##_get_reg, name##_set_reg, \ |
| 350 |
name##_set_irq_line, name##_set_irq_callback, \ |
| 351 |
name##_info, name##_dasm, \ |
| 352 |
nirq, dirq, &name##_icount, oc, \ |
| 353 |
datawidth, \ |
| 354 |
(mem_read_handler)cpu_readmem##mem, (mem_write_handler)cpu_writemem##mem, name##_internal_r, name##_internal_w, \ |
| 355 |
0, cpu_setopbase##mem, \ |
| 356 |
shift, bits, CPU_IS_##endian, align, maxinst \ |
| 357 |
} |
| 358 |
|
| 359 |
|
| 360 |
|
| 361 |
/************************************* |
| 362 |
* |
| 363 |
* The core list of CPU interfaces |
| 364 |
* |
| 365 |
*************************************/ |
| 366 |
|
| 367 |
const struct cpu_interface cpuintrf[] = |
| 368 |
{ |
| 369 |
CPU0(DUMMY, dummy, 1, 0,1.00, 8, 16, 0,16,LE,1, 1 ), |
| 370 |
#if (HAS_Z80) |
| 371 |
CPU1(Z80, z80, 1,255,1.00, 8, 16, 0,16,LE,1, 4 ), |
| 372 |
#endif |
| 373 |
#if (HAS_Z180) |
| 374 |
CPU1(Z180, z180, 1,255,1.00, 8, 20, 0,20,LE,1, 4 ), |
| 375 |
#endif |
| 376 |
#if (HAS_8080) |
| 377 |
CPU0(8080, i8080, 4,255,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 378 |
#endif |
| 379 |
#if (HAS_8085A) |
| 380 |
CPU0(8085A, i8085, 4,255,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 381 |
#endif |
| 382 |
#if (HAS_M6502) |
| 383 |
CPU0(M6502, m6502, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 384 |
#endif |
| 385 |
#if (HAS_M65C02) |
| 386 |
CPU0(M65C02, m65c02, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 387 |
#endif |
| 388 |
#if (HAS_M65SC02) |
| 389 |
CPU0(M65SC02, m65sc02, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 390 |
#endif |
| 391 |
#if (HAS_M65CE02) |
| 392 |
CPU0(M65CE02, m65ce02, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 393 |
#endif |
| 394 |
#if (HAS_M6509) |
| 395 |
CPU0(M6509, m6509, 1, 0,1.00, 8, 20, 0,20,LE,1, 3 ), |
| 396 |
#endif |
| 397 |
#if (HAS_M6510) |
| 398 |
CPU0(M6510, m6510, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 399 |
#endif |
| 400 |
#if (HAS_M6510T) |
| 401 |
CPU0(M6510T, m6510t, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 402 |
#endif |
| 403 |
#if (HAS_M7501) |
| 404 |
CPU0(M7501, m7501, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 405 |
#endif |
| 406 |
#if (HAS_M8502) |
| 407 |
CPU0(M8502, m8502, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 408 |
#endif |
| 409 |
#if (HAS_N2A03) |
| 410 |
CPU0(N2A03, n2a03, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 411 |
#endif |
| 412 |
#if (HAS_M4510) |
| 413 |
CPU0(M4510, m4510, 1, 0,1.00, 8, 20, 0,20,LE,1, 3 ), |
| 414 |
#endif |
| 415 |
#if (HAS_H6280) |
| 416 |
CPU0(H6280, h6280, 3, 0,1.00, 8, 21, 0,21,LE,1, 3 ), |
| 417 |
#endif |
| 418 |
#if (HAS_I86) |
| 419 |
CPU0(I86, i86, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 420 |
#endif |
| 421 |
#if (HAS_I88) |
| 422 |
CPU0(I88, i88, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 423 |
#endif |
| 424 |
#if (HAS_I186) |
| 425 |
CPU0(I186, i186, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 426 |
#endif |
| 427 |
#if (HAS_I188) |
| 428 |
CPU0(I188, i188, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 429 |
#endif |
| 430 |
#if (HAS_I286) |
| 431 |
CPU0(I286, i286, 1,255,1.00, 8, 24, 0,24,LE,1, 5 ), |
| 432 |
#endif |
| 433 |
#if (HAS_V20) |
| 434 |
CPU0(V20, v20, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 435 |
#endif |
| 436 |
#if (HAS_V30) |
| 437 |
CPU0(V30, v30, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 438 |
#endif |
| 439 |
#if (HAS_V33) |
| 440 |
CPU0(V33, v33, 1,255,1.00, 8, 20, 0,20,LE,1, 5 ), |
| 441 |
#endif |
| 442 |
#if (HAS_V60) |
| 443 |
CPU0(V60, v60, 1, 0,1.00,16, 24lew, 0,24,LE,1, 11 ), |
| 444 |
#endif |
| 445 |
#if (HAS_I8035) |
| 446 |
CPU0(I8035, i8035, 1, 0,1.00, 8, 16, 0,16,LE,1, 2 ), |
| 447 |
#endif |
| 448 |
#if (HAS_I8039) |
| 449 |
CPU0(I8039, i8039, 1, 0,1.00, 8, 16, 0,16,LE,1, 2 ), |
| 450 |
#endif |
| 451 |
#if (HAS_I8048) |
| 452 |
CPU0(I8048, i8048, 1, 0,1.00, 8, 16, 0,16,LE,1, 2 ), |
| 453 |
#endif |
| 454 |
#if (HAS_N7751) |
| 455 |
CPU0(N7751, n7751, 1, 0,1.00, 8, 16, 0,16,LE,1, 2 ), |
| 456 |
#endif |
| 457 |
#if (HAS_I8X41) |
| 458 |
CPU0(I8X41, i8x41, 1, 0,1.00, 8, 16, 0,16,LE,1, 2 ), |
| 459 |
#endif |
| 460 |
#if (HAS_M6800) |
| 461 |
CPU0(M6800, m6800, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 462 |
#endif |
| 463 |
#if (HAS_M6801) |
| 464 |
CPU0(M6801, m6801, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 465 |
#endif |
| 466 |
#if (HAS_M6802) |
| 467 |
CPU0(M6802, m6802, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 468 |
#endif |
| 469 |
#if (HAS_M6803) |
| 470 |
CPU0(M6803, m6803, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 471 |
#endif |
| 472 |
#if (HAS_M6808) |
| 473 |
CPU0(M6808, m6808, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 474 |
#endif |
| 475 |
#if (HAS_HD63701) |
| 476 |
CPU0(HD63701, hd63701, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 477 |
#endif |
| 478 |
#if (HAS_NSC8105) |
| 479 |
CPU0(NSC8105, nsc8105, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 480 |
#endif |
| 481 |
#if (HAS_M6805) |
| 482 |
CPU0(M6805, m6805, 1, 0,1.00, 8, 16, 0,11,BE,1, 3 ), |
| 483 |
#endif |
| 484 |
#if (HAS_M68705) |
| 485 |
CPU0(M68705, m68705, 1, 0,1.00, 8, 16, 0,11,BE,1, 3 ), |
| 486 |
#endif |
| 487 |
#if (HAS_HD63705) |
| 488 |
CPU0(HD63705, hd63705, 8, 0,1.00, 8, 16, 0,16,BE,1, 3 ), |
| 489 |
#endif |
| 490 |
#if (HAS_HD6309) |
| 491 |
CPU0(HD6309, hd6309, 2, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 492 |
#endif |
| 493 |
#if (HAS_M6809) |
| 494 |
CPU0(M6809, m6809, 2, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 495 |
#endif |
| 496 |
#if (HAS_KONAMI) |
| 497 |
CPU0(KONAMI, konami, 2, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 498 |
#endif |
| 499 |
#if (HAS_M68000) |
| 500 |
CPU0(M68000, m68000, 8, -1,1.00,16,24bew, 0,24,BE,2,10 ), |
| 501 |
#endif |
| 502 |
#if (HAS_M68010) |
| 503 |
CPU0(M68010, m68010, 8, -1,1.00,16,24bew, 0,24,BE,2,10 ), |
| 504 |
#endif |
| 505 |
#if (HAS_M68EC020) |
| 506 |
CPU0(M68EC020, m68ec020, 8, -1,1.00,32,24bedw, 0,24,BE,4,10 ), |
| 507 |
#endif |
| 508 |
#if (HAS_M68020) |
| 509 |
CPU0(M68020, m68020, 8, -1,1.00,32,32bedw, 0,32,BE,4,10 ), |
| 510 |
#endif |
| 511 |
#if (HAS_T11) |
| 512 |
CPU0(T11, t11, 4, 0,1.00,16,16lew, 0,16,LE,2, 6 ), |
| 513 |
#endif |
| 514 |
#if (HAS_S2650) |
| 515 |
CPU0(S2650, s2650, 2, 0,1.00, 8, 16, 0,15,LE,1, 3 ), |
| 516 |
#endif |
| 517 |
#if (HAS_TMS34010) |
| 518 |
CPU0(TMS34010, tms34010, 2, 0,1.00,16,29lew, 3,29,LE,2,10 ), |
| 519 |
#endif |
| 520 |
#if (HAS_TMS34020) |
| 521 |
CPU0(TMS34020, tms34020, 2, 0,1.00,16,29lew, 3,29,LE,2,10 ), |
| 522 |
#endif |
| 523 |
#if (HAS_TMS9900) |
| 524 |
CPU0(TMS9900, tms9900, 1, 0,1.00,16,16bew, 0,16,BE,2, 6 ), |
| 525 |
#endif |
| 526 |
#if (HAS_TMS9940) |
| 527 |
CPU0(TMS9940, tms9940, 1, 0,1.00,16,16bew, 0,16,BE,2, 6 ), |
| 528 |
#endif |
| 529 |
#if (HAS_TMS9980) |
| 530 |
CPU0(TMS9980, tms9980a, 1, 0,1.00, 8, 16, 0,16,BE,1, 6 ), |
| 531 |
#endif |
| 532 |
#if (HAS_TMS9985) |
| 533 |
CPU0(TMS9985, tms9985, 1, 0,1.00, 8, 16, 0,16,BE,1, 6 ), |
| 534 |
#endif |
| 535 |
#if (HAS_TMS9989) |
| 536 |
CPU0(TMS9989, tms9989, 1, 0,1.00, 8, 16, 0,16,BE,1, 6 ), |
| 537 |
#endif |
| 538 |
#if (HAS_TMS9995) |
| 539 |
CPU0(TMS9995, tms9995, 1, 0,1.00, 8, 16, 0,16,BE,1, 6 ), |
| 540 |
#endif |
| 541 |
#if (HAS_TMS99105A) |
| 542 |
CPU0(TMS99105A,tms99105a,1, 0,1.00,16,16bew, 0,16,BE,2, 6 ), |
| 543 |
#endif |
| 544 |
#if (HAS_TMS99110A) |
| 545 |
CPU0(TMS99110A,tms99110a,1, 0,1.00,16,16bew, 0,16,BE,2, 6 ), |
| 546 |
#endif |
| 547 |
#if (HAS_Z8000) |
| 548 |
CPU0(Z8000, z8000, 2, 0,1.00,16,16bew, 0,16,BE,2, 6 ), |
| 549 |
#endif |
| 550 |
#if (HAS_TMS320C10) |
| 551 |
CPU3(TMS320C10,tms320c10,2, 0,1.00,16,16bew, -1,16,BE,2, 4 ), |
| 552 |
#endif |
| 553 |
#if (HAS_CCPU) |
| 554 |
CPU3(CCPU, ccpu, 2, 0,1.00,16,16bew, 0,15,BE,2, 3 ), |
| 555 |
#endif |
| 556 |
#if (HAS_ADSP2100) |
| 557 |
CPU3(ADSP2100, adsp2100, 4, 0,1.00,16,17lew, -1,14,LE,2, 4 ), |
| 558 |
#endif |
| 559 |
#if (HAS_ADSP2105) |
| 560 |
CPU3(ADSP2105, adsp2105, 4, 0,1.00,16,17lew, -1,14,LE,2, 4 ), |
| 561 |
#endif |
| 562 |
#if (HAS_PSXCPU) |
| 563 |
CPU0(PSXCPU, mips, 8, -1,1.00,16,32lew, 0,32,LE,4, 4 ), |
| 564 |
#endif |
| 565 |
#if (HAS_ASAP) |
| 566 |
#define asap_ICount asap_icount |
| 567 |
CPU0(ASAP, asap, 1, 0,1.00,32,32ledw, 0,32,LE,4, 12 ), |
| 568 |
#endif |
| 569 |
#if (HAS_UPD7810) |
| 570 |
#define upd7810_ICount upd7810_icount |
| 571 |
CPU0(UPD7810, upd7810, 2, 0,1.00, 8, 16, 0,16,LE,1, 4 ), |
| 572 |
#endif |
| 573 |
#if (HAS_JAGUAR) |
| 574 |
#define jaguargp_ICount jaguar_icount |
| 575 |
#define jaguards_ICount jaguar_icount |
| 576 |
CPU0(JAGUARGPU,jaguargp, 6, 0,1.00,32,24bedw, 0,24,BE,4, 12 ), |
| 577 |
CPU0(JAGUARDSP,jaguards, 6, 0,1.00,32,24bedw, 0,24,BE,4, 12 ), |
| 578 |
#endif |
| 579 |
#if (HAS_R3000) |
| 580 |
#define r3000be_ICount r3000_icount |
| 581 |
#define r3000le_ICount r3000_icount |
| 582 |
CPU0(R3000BE, r3000be, 1, 0,1.00,32,29bedw, 0,29,BE,4, 4 ), |
| 583 |
CPU0(R3000LE, r3000le, 1, 0,1.00,32,29ledw, 0,29,LE,4, 4 ), |
| 584 |
#endif |
| 585 |
#if (HAS_TMS320C31) |
| 586 |
#define tms320c31_ICount tms320c31_icount |
| 587 |
CPU0(TMS320C31,tms320c31,4, 0,1.00,32,26ledw,-2,26,LE,4, 4 ), |
| 588 |
#endif |
| 589 |
#if (HAS_ARM) |
| 590 |
CPU0(ARM, arm, 2, 0,1.00,32,26ledw, 0,26,LE,4, 4 ), |
| 591 |
#endif |
| 592 |
#if (HAS_SH2) |
| 593 |
CPU4(SH2, sh2, 16, 0,1.00,32,32bedw, 0,32,BE,2, 2 ), |
| 594 |
#endif |
| 595 |
|
| 596 |
#ifdef MESS |
| 597 |
#if (HAS_APEXC) |
| 598 |
CPU0(APEXC, apexc, 0, 0,1.00,32,18bedw, 0,18,LE,1, 1 ), |
| 599 |
#endif |
| 600 |
#if (HAS_CDP1802) |
| 601 |
#define cdp1802_ICount cdp1802_icount |
| 602 |
CPU0(CDP1802, cdp1802, 1, 0,1.00, 8, 16, 0,16,BE,1, 3 ), |
| 603 |
#endif |
| 604 |
#if (HAS_CP1600) |
| 605 |
#define cp1600_ICount cp1600_icount |
| 606 |
CPU0(CP1600, cp1600, 0, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 607 |
#endif |
| 608 |
#if (HAS_F8) |
| 609 |
#define f8_ICount f8_icount |
| 610 |
CPU4(F8, f8, 1, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 611 |
#endif |
| 612 |
#if (HAS_G65816) |
| 613 |
CPU0(G65816, g65816, 1, 0,1.00, 8, 24, 0,24,BE,1, 3 ), |
| 614 |
#endif |
| 615 |
#if (HAS_LH5801) |
| 616 |
#define lh5801_ICount lh5801_icount |
| 617 |
CPU0(LH5801, lh5801, 1, 0,1.00, 8, 17, 0,17,BE,1, 5 ), |
| 618 |
#endif |
| 619 |
#if (HAS_PDP1) |
| 620 |
CPU0(PDP1, pdp1, 0, 0,1.00, 8, 16, 0,18,LE,1, 3 ), |
| 621 |
#endif |
| 622 |
#if (HAS_SATURN) |
| 623 |
#define saturn_ICount saturn_icount |
| 624 |
CPU0(SATURN, saturn, 1, 0,1.00, 8,20, 0,20,LE,1, 21 ), |
| 625 |
#endif |
| 626 |
#if (HAS_SC61860) |
| 627 |
#define sc61860_ICount sc61860_icount |
| 628 |
CPU0(SC61860, sc61860, 1, 0,1.00, 8, 16, 0,16,BE,1, 4 ), |
| 629 |
#endif |
| 630 |
#if (HAS_SPC700) |
| 631 |
CPU0(SPC700, spc700, 0, 0,1.00, 8, 16, 0,16,LE,1, 3 ), |
| 632 |
#endif |
| 633 |
#if (HAS_Z80GB) |
| 634 |
CPU0(Z80GB, z80gb, 5,255,1.00, 8, 16, 0,16,LE,1, 4 ), |
| 635 |
#endif |
| 636 |
#if (HAS_Z80_MSX) |
| 637 |
CPU1(Z80_MSX, z80_msx, 1,255,1.00, 8, 16, 0,16,LE,1, 4 ), |
| 638 |
#endif |
| 639 |
#endif |
| 640 |
}; |
| 641 |
|
| 642 |
|
| 643 |
|
| 644 |
/************************************* |
| 645 |
* |
| 646 |
* Default debugger window layout |
| 647 |
* |
| 648 |
*************************************/ |
| 649 |
|
| 650 |
UINT8 default_win_layout[] = |
| 651 |
{ |
| 652 |
0, 0,80, 5, /* register window (top rows) */ |
| 653 |
0, 5,24,17, /* disassembler window (left, middle columns) */ |
| 654 |
25, 5,55, 8, /* memory #1 window (right, upper middle) */ |
| 655 |
25,14,55, 8, /* memory #2 window (right, lower middle) */ |
| 656 |
0,23,80, 1 /* command line window (bottom row) */ |
| 657 |
}; |
| 658 |
|
| 659 |
|
| 660 |
|
| 661 |
/************************************* |
| 662 |
* |
| 663 |
* Other variables we own |
| 664 |
* |
| 665 |
*************************************/ |
| 666 |
|
| 667 |
int activecpu; /* index of active CPU (or -1) */ |
| 668 |
int totalcpu; /* total number of CPUs */ |
| 669 |
|
| 670 |
static struct cpuinfo cpu[MAX_CPU]; |
| 671 |
|
| 672 |
static int cpu_active_context[CPU_COUNT]; |
| 673 |
static int cpu_context_stack[4]; |
| 674 |
static int cpu_context_stack_ptr; |
| 675 |
|
| 676 |
|
| 677 |
|
| 678 |
/************************************* |
| 679 |
* |
| 680 |
* Set a new CPU context |
| 681 |
* |
| 682 |
*************************************/ |
| 683 |
|
| 684 |
INLINE void set_cpu_context(int cpunum) |
| 685 |
{ |
| 686 |
int newfamily = cpu[cpunum].family; |
| 687 |
int oldcontext = cpu_active_context[newfamily]; |
| 688 |
|
| 689 |
/* if we need to change contexts, save the one that was there */ |
| 690 |
if (oldcontext != cpunum && oldcontext != -1) |
| 691 |
(*cpu[oldcontext].intf.get_context)(cpu[oldcontext].context); |
| 692 |
|
| 693 |
/* swap memory spaces */ |
| 694 |
activecpu = cpunum; |
| 695 |
memory_set_context(cpunum); |
| 696 |
|
| 697 |
/* if the new CPU's context is not swapped in, do it now */ |
| 698 |
if (oldcontext != cpunum) |
| 699 |
{ |
| 700 |
(*cpu[cpunum].intf.set_context)(cpu[cpunum].context); |
| 701 |
cpu_active_context[newfamily] = cpunum; |
| 702 |
} |
| 703 |
} |
| 704 |
|
| 705 |
|
| 706 |
|
| 707 |
/************************************* |
| 708 |
* |
| 709 |
* Push/pop to a new CPU context |
| 710 |
* |
| 711 |
*************************************/ |
| 712 |
|
| 713 |
void cpuintrf_push_context(int cpunum) |
| 714 |
{ |
| 715 |
/* push the old context onto the stack */ |
| 716 |
cpu_context_stack[cpu_context_stack_ptr++] = activecpu; |
| 717 |
|
| 718 |
/* do the rest only if this isn't the activecpu */ |
| 719 |
if (cpunum != activecpu && cpunum != -1) |
| 720 |
set_cpu_context(cpunum); |
| 721 |
|
| 722 |
/* this is now the active CPU */ |
| 723 |
activecpu = cpunum; |
| 724 |
} |
| 725 |
|
| 726 |
|
| 727 |
void cpuintrf_pop_context(void) |
| 728 |
{ |
| 729 |
/* push the old context onto the stack */ |
| 730 |
int cpunum = cpu_context_stack[--cpu_context_stack_ptr]; |
| 731 |
|
| 732 |
/* do the rest only if this isn't the activecpu */ |
| 733 |
if (cpunum != activecpu && cpunum != -1) |
| 734 |
set_cpu_context(cpunum); |
| 735 |
|
| 736 |
/* this is now the active CPU */ |
| 737 |
activecpu = cpunum; |
| 738 |
} |
| 739 |
|
| 740 |
|
| 741 |
|
| 742 |
/************************************* |
| 743 |
* |
| 744 |
* Initialize a single CPU |
| 745 |
* |
| 746 |
*************************************/ |
| 747 |
|
| 748 |
int cpuintrf_init(void) |
| 749 |
{ |
| 750 |
int cputype; |
| 751 |
|
| 752 |
/* verify the order of entries in the cpuintrf[] array */ |
| 753 |
for (cputype = 0; cputype < CPU_COUNT; cputype++) |
| 754 |
{ |
| 755 |
/* make sure the index in the array matches the current index */ |
| 756 |
if (cpuintrf[cputype].cpu_num != cputype) |
| 757 |
{ |
| 758 |
printf("CPU #%d [%s] wrong ID %d: check enum CPU_... in src/cpuintrf.h!\n", cputype, cputype_name(cputype), cpuintrf[cputype].cpu_num); |
| 759 |
exit(1); |
| 760 |
} |
| 761 |
|
| 762 |
/* also reset the active CPU context info */ |
| 763 |
cpu_active_context[cputype] = -1; |
| 764 |
} |
| 765 |
|
| 766 |
/* zap the CPU data structure */ |
| 767 |
memset(cpu, 0, sizeof(cpu)); |
| 768 |
totalcpu = 0; |
| 769 |
|
| 770 |
/* reset the context stack */ |
| 771 |
memset(cpu_context_stack, -1, sizeof(cpu_context_stack)); |
| 772 |
cpu_context_stack_ptr = 0; |
| 773 |
|
| 774 |
return 0; |
| 775 |
} |
| 776 |
|
| 777 |
|
| 778 |
|
| 779 |
/************************************* |
| 780 |
* |
| 781 |
* Initialize a single CPU |
| 782 |
* |
| 783 |
*************************************/ |
| 784 |
|
| 785 |
int cpuintrf_init_cpu(int cpunum, int cputype) |
| 786 |
{ |
| 787 |
char familyname[256]; |
| 788 |
int j, size; |
| 789 |
|
| 790 |
/* fill in the type and interface */ |
| 791 |
cpu[cpunum].intf = cpuintrf[cputype]; |
| 792 |
cpu[cpunum].cputype = cputype; |
| 793 |
|
| 794 |
/* determine the family index */ |
| 795 |
strcpy(familyname, cputype_core_file(cputype)); |
| 796 |
for (j = 0; j < CPU_COUNT; j++) |
| 797 |
if (!strcmp(familyname, cputype_core_file(j))) |
| 798 |
{ |
| 799 |
cpu[cpunum].family = j; |
| 800 |
break; |
| 801 |
} |
| 802 |
|
| 803 |
/* determine the context size */ |
| 804 |
size = (*cpu[cpunum].intf.get_context)(NULL); |
| 805 |
if (size == 0) |
| 806 |
{ |
| 807 |
/* that can't really be true */ |
| 808 |
logerror("CPU #%d claims to need no context buffer!\n", cpunum); |
| 809 |
return 1; |
| 810 |
} |
| 811 |
|
| 812 |
/* allocate a context buffer for the CPU */ |
| 813 |
cpu[cpunum].context = malloc(size); |
| 814 |
if (cpu[cpunum].context == NULL) |
| 815 |
{ |
| 816 |
/* that's really bad :( */ |
| 817 |
logerror("CPU #%d failed to allocate context buffer (%d bytes)!\n", cpunum, size); |
| 818 |
return 1; |
| 819 |
} |
| 820 |
|
| 821 |
/* zap the context buffer */ |
| 822 |
memset(cpu[cpunum].context, 0, size); |
| 823 |
|
| 824 |
/* initialize the CPU and stash the context */ |
| 825 |
activecpu = cpunum; |
| 826 |
(*cpu[cpunum].intf.init)(); |
| 827 |
(*cpu[cpunum].intf.get_context)(cpu[cpunum].context); |
| 828 |
activecpu = -1; |
| 829 |
|
| 830 |
/* clear out the registered CPU for this family */ |
| 831 |
cpu_active_context[cpu[cpunum].family] = -1; |
| 832 |
|
| 833 |
/* make sure the total includes us */ |
| 834 |
totalcpu = cpunum + 1; |
| 835 |
|
| 836 |
return 0; |
| 837 |
} |
| 838 |
|
| 839 |
|
| 840 |
|
| 841 |
/************************************* |
| 842 |
* |
| 843 |
* Exit/free a single CPU |
| 844 |
* |
| 845 |
*************************************/ |
| 846 |
|
| 847 |
void cpuintrf_exit_cpu(int cpunum) |
| 848 |
{ |
| 849 |
/* if the CPU core defines an exit function, call it now */ |
| 850 |
if (cpu[cpunum].intf.exit) |
| 851 |
(*cpu[cpunum].intf.exit)(); |
| 852 |
|
| 853 |
/* free the context buffer for that CPU */ |
| 854 |
if (cpu[cpunum].context) |
| 855 |
free(cpu[cpunum].context); |
| 856 |
cpu[cpunum].context = NULL; |
| 857 |
} |
| 858 |
|
| 859 |
|
| 860 |
|
| 861 |
/************************************* |
| 862 |
* |
| 863 |
* Interfaces to the active CPU |
| 864 |
* |
| 865 |
*************************************/ |
| 866 |
|
| 867 |
/*-------------------------- |
| 868 |
Adjust/get icount |
| 869 |
--------------------------*/ |
| 870 |
|
| 871 |
void activecpu_adjust_icount(int delta) |
| 872 |
{ |
| 873 |
VERIFY_ACTIVECPU_VOID(activecpu_adjust_icount); |
| 874 |
*cpu[activecpu].intf.icount += delta; |
| 875 |
} |
| 876 |
|
| 877 |
|
| 878 |
int activecpu_get_icount(void) |
| 879 |
{ |
| 880 |
VERIFY_ACTIVECPU(0, activecpu_get_icount); |
| 881 |
return *cpu[activecpu].intf.icount; |
| 882 |
} |
| 883 |
|
| 884 |
|
| 885 |
/*-------------------------- |
| 886 |
Reset banking pointers |
| 887 |
--------------------------*/ |
| 888 |
|
| 889 |
void activecpu_reset_banking(void) |
| 890 |
{ |
| 891 |
VERIFY_ACTIVECPU_VOID(activecpu_reset_banking); |
| 892 |
(*cpu[activecpu].intf.set_op_base)(activecpu_get_pc_byte()); |
| 893 |
} |
| 894 |
|
| 895 |
|
| 896 |
/*-------------------------- |
| 897 |
IRQ line setting |
| 898 |
--------------------------*/ |
| 899 |
|
| 900 |
void activecpu_set_irq_line(int irqline, int state) |
| 901 |
{ |
| 902 |
VERIFY_ACTIVECPU_VOID(activecpu_set_irq_line); |
| 903 |
if (state != INTERNAL_CLEAR_LINE && state != INTERNAL_ASSERT_LINE) |
| 904 |
{ |
| 905 |
logerror("activecpu_set_irq_line called when cpu_set_irq_line should have been used!\n"); |
| 906 |
return; |
| 907 |
} |
| 908 |
(*cpu[activecpu].intf.set_irq_line)(irqline, state - INTERNAL_CLEAR_LINE); |
| 909 |
} |
| 910 |
|
| 911 |
|
| 912 |
/*-------------------------- |
| 913 |
Get/set cycle table |
| 914 |
--------------------------*/ |
| 915 |
|
| 916 |
const void *activecpu_get_cycle_table(int which) |
| 917 |
{ |
| 918 |
VERIFY_ACTIVECPU(NULL, activecpu_get_cycle_table); |
| 919 |
return (*cpu[activecpu].intf.get_cycle_table)(which); |
| 920 |
} |
| 921 |
|
| 922 |
|
| 923 |
void activecpu_set_cycle_tbl(int which, void *new_table) |
| 924 |
{ |
| 925 |
VERIFY_ACTIVECPU_VOID(activecpu_set_cycle_tbl); |
| 926 |
(*cpu[activecpu].intf.set_cycle_table)(which, new_table); |
| 927 |
} |
| 928 |
|
| 929 |
|
| 930 |
/*-------------------------- |
| 931 |
Get/set registers |
| 932 |
--------------------------*/ |
| 933 |
|
| 934 |
unsigned activecpu_get_reg(int regnum) |
| 935 |
{ |
| 936 |
VERIFY_ACTIVECPU(0, activecpu_get_reg); |
| 937 |
return (*cpu[activecpu].intf.get_reg)(regnum); |
| 938 |
} |
| 939 |
|
| 940 |
|
| 941 |
void activecpu_set_reg(int regnum, unsigned val) |
| 942 |
{ |
| 943 |
VERIFY_ACTIVECPU_VOID(activecpu_set_reg); |
| 944 |
(*cpu[activecpu].intf.set_reg)(regnum, val); |
| 945 |
} |
| 946 |
|
| 947 |
|
| 948 |
/*-------------------------- |
| 949 |
Get/set PC |
| 950 |
--------------------------*/ |
| 951 |
|
| 952 |
offs_t activecpu_get_pc_byte(void) |
| 953 |
{ |
| 954 |
offs_t base, pc; |
| 955 |
int shift; |
| 956 |
|
| 957 |
VERIFY_ACTIVECPU(0, activecpu_get_pc_byte); |
| 958 |
shift = cpu[activecpu].intf.address_shift; |
| 959 |
base = cpu[activecpu].intf.pgm_memory_base; |
| 960 |
pc = (*cpu[activecpu].intf.get_reg)(REG_PC); |
| 961 |
return base + ((shift < 0) ? (pc << -shift) : (pc >> shift)); |
| 962 |
} |
| 963 |
|
| 964 |
|
| 965 |
void activecpu_set_op_base(unsigned val) |
| 966 |
{ |
| 967 |
VERIFY_ACTIVECPU_VOID(activecpu_set_op_base); |
| 968 |
(*cpu[activecpu].intf.set_op_base)(val); |
| 969 |
} |
| 970 |
|
| 971 |
|
| 972 |
/*-------------------------- |
| 973 |
Disassembly |
| 974 |
--------------------------*/ |
| 975 |
|
| 976 |
unsigned activecpu_dasm(char *buffer, unsigned pc) |
| 977 |
{ |
| 978 |
VERIFY_ACTIVECPU(1, activecpu_dasm); |
| 979 |
return (*cpu[activecpu].intf.cpu_dasm)(buffer, pc); |
| 980 |
} |
| 981 |
|
| 982 |
|
| 983 |
/*-------------------------- |
| 984 |
Register dumps |
| 985 |
--------------------------*/ |
| 986 |
|
| 987 |
const char *activecpu_flags(void) |
| 988 |
{ |
| 989 |
VERIFY_ACTIVECPU("", activecpu_flags); |
| 990 |
return (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_FLAGS); |
| 991 |
} |
| 992 |
|
| 993 |
|
| 994 |
const char *activecpu_dump_reg(int regnum) |
| 995 |
{ |
| 996 |
VERIFY_ACTIVECPU("", activecpu_dump_reg); |
| 997 |
return (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_REG + regnum); |
| 998 |
} |
| 999 |
|
| 1000 |
|
| 1001 |
/*-------------------------- |
| 1002 |
State dumps |
| 1003 |
--------------------------*/ |
| 1004 |
|
| 1005 |
const char *activecpu_dump_state(void) |
| 1006 |
{ |
| 1007 |
static char buffer[1024+1]; |
| 1008 |
unsigned addr_width = (activecpu_address_bits() + 3) / 4; |
| 1009 |
char *dst = buffer; |
| 1010 |
const char *src; |
| 1011 |
const INT8 *regs; |
| 1012 |
int width; |
| 1013 |
|
| 1014 |
VERIFY_ACTIVECPU("", activecpu_dump_state); |
| 1015 |
|
| 1016 |
dst += sprintf(dst, "CPU #%d [%s]\n", activecpu, activecpu_name()); |
| 1017 |
width = 0; |
| 1018 |
regs = (INT8 *)activecpu_reg_layout(); |
| 1019 |
while (*regs) |
| 1020 |
{ |
| 1021 |
if (*regs == -1) |
| 1022 |
{ |
| 1023 |
dst += sprintf(dst, "\n"); |
| 1024 |
width = 0; |
| 1025 |
} |
| 1026 |
else |
| 1027 |
{ |
| 1028 |
src = activecpu_dump_reg(*regs); |
| 1029 |
if (*src) |
| 1030 |
{ |
| 1031 |
if (width + strlen(src) + 1 >= 80) |
| 1032 |
{ |
| 1033 |
dst += sprintf(dst, "\n"); |
| 1034 |
width = 0; |
| 1035 |
} |
| 1036 |
dst += sprintf(dst, "%s ", src); |
| 1037 |
width += strlen(src) + 1; |
| 1038 |
} |
| 1039 |
} |
| 1040 |
regs++; |
| 1041 |
} |
| 1042 |
dst += sprintf(dst, "\n%0*X: ", addr_width, activecpu_get_pc()); |
| 1043 |
activecpu_dasm(dst, activecpu_get_pc()); |
| 1044 |
strcat(dst, "\n\n"); |
| 1045 |
|
| 1046 |
return buffer; |
| 1047 |
} |
| 1048 |
|
| 1049 |
|
| 1050 |
/*-------------------------- |
| 1051 |
Get/set static info |
| 1052 |
--------------------------*/ |
| 1053 |
|
| 1054 |
#define CPU_FUNC(rettype, name, defresult, result) \ |
| 1055 |
rettype name(void) \ |
| 1056 |
{ \ |
| 1057 |
VERIFY_ACTIVECPU(defresult, name) \ |
| 1058 |
return result; \ |
| 1059 |
} |
| 1060 |
|
| 1061 |
CPU_FUNC(int, activecpu_default_irq_vector, 0, cpu[activecpu].intf.default_vector) |
| 1062 |
CPU_FUNC(unsigned, activecpu_address_bits, 0, cpu[activecpu].intf.address_bits) |
| 1063 |
CPU_FUNC(unsigned, activecpu_address_mask, 0, 0xffffffffUL >> (32 - cpu[activecpu].intf.address_bits)) |
| 1064 |
CPU_FUNC(int, activecpu_address_shift, 0, cpu[activecpu].intf.address_shift) |
| 1065 |
CPU_FUNC(unsigned, activecpu_endianess, 0, cpu[activecpu].intf.endianess) |
| 1066 |
CPU_FUNC(unsigned, activecpu_databus_width, 0, cpu[activecpu].intf.databus_width) |
| 1067 |
CPU_FUNC(unsigned, activecpu_align_unit, 0, cpu[activecpu].intf.align_unit) |
| 1068 |
CPU_FUNC(unsigned, activecpu_max_inst_len, 0, cpu[activecpu].intf.max_inst_len) |
| 1069 |
CPU_FUNC(const char *, activecpu_name, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_NAME)) |
| 1070 |
CPU_FUNC(const char *, activecpu_core_family, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_FAMILY)) |
| 1071 |
CPU_FUNC(const char *, activecpu_core_version, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_VERSION)) |
| 1072 |
CPU_FUNC(const char *, activecpu_core_file, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_FILE)) |
| 1073 |
CPU_FUNC(const char *, activecpu_core_credits, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_CREDITS)) |
| 1074 |
CPU_FUNC(const char *, activecpu_reg_layout, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_REG_LAYOUT)) |
| 1075 |
CPU_FUNC(const char *, activecpu_win_layout, "", (*cpu[activecpu].intf.cpu_info)(NULL, CPU_INFO_WIN_LAYOUT)) |
| 1076 |
|
| 1077 |
|
| 1078 |
|
| 1079 |
/************************************* |
| 1080 |
* |
| 1081 |
* Interfaces to a specific CPU |
| 1082 |
* |
| 1083 |
*************************************/ |
| 1084 |
|
| 1085 |
/*-------------------------- |
| 1086 |
Execute |
| 1087 |
--------------------------*/ |
| 1088 |
|
| 1089 |
int cpunum_execute(int cpunum, int cycles) |
| 1090 |
{ |
| 1091 |
int ran; |
| 1092 |
VERIFY_CPUNUM(0, cpunum_execute); |
| 1093 |
cpuintrf_push_context(cpunum); |
| 1094 |
(*cpu[cpunum].intf.set_op_base)(activecpu_get_pc_byte()); |
| 1095 |
ran = (*cpu[cpunum].intf.execute)(cycles); |
| 1096 |
cpuintrf_pop_context(); |
| 1097 |
return ran; |
| 1098 |
} |
| 1099 |
|
| 1100 |
|
| 1101 |
/*-------------------------- |
| 1102 |
Reset and set IRQ ack |
| 1103 |
--------------------------*/ |
| 1104 |
|
| 1105 |
void cpunum_reset(int cpunum, void *param, int (*irqack)(int)) |
| 1106 |
{ |
| 1107 |
VERIFY_CPUNUM_VOID(cpunum_reset); |
| 1108 |
cpuintrf_push_context(cpunum); |
| 1109 |
(*cpu[cpunum].intf.set_op_base)(0); |
| 1110 |
(*cpu[cpunum].intf.reset)(param); |
| 1111 |
if (irqack) |
| 1112 |
(*cpu[cpunum].intf.set_irq_callback)(irqack); |
| 1113 |
cpuintrf_pop_context(); |
| 1114 |
} |
| 1115 |
|
| 1116 |
|
| 1117 |
/*-------------------------- |
| 1118 |
Read a byte |
| 1119 |
--------------------------*/ |
| 1120 |
|
| 1121 |
data8_t cpunum_read_byte(int cpunum, offs_t address) |
| 1122 |
{ |
| 1123 |
int result; |
| 1124 |
VERIFY_CPUNUM(0, cpunum_read_byte); |
| 1125 |
cpuintrf_push_context(cpunum); |
| 1126 |
result = (*cpu[cpunum].intf.memory_read)(address); |
| 1127 |
cpuintrf_pop_context(); |
| 1128 |
return result; |
| 1129 |
} |
| 1130 |
|
| 1131 |
|
| 1132 |
/*-------------------------- |
| 1133 |
Write a byte |
| 1134 |
--------------------------*/ |
| 1135 |
|
| 1136 |
void cpunum_write_byte(int cpunum, offs_t address, data8_t data) |
| 1137 |
{ |
| 1138 |
VERIFY_CPUNUM_VOID(cpunum_write_byte); |
| 1139 |
cpuintrf_push_context(cpunum); |
| 1140 |
(*cpu[cpunum].intf.memory_write)(address, data); |
| 1141 |
cpuintrf_pop_context(); |
| 1142 |
} |
| 1143 |
|
| 1144 |
|
| 1145 |
/*-------------------------- |
| 1146 |
Get context pointer |
| 1147 |
--------------------------*/ |
| 1148 |
|
| 1149 |
void *cpunum_get_context_ptr(int cpunum) |
| 1150 |
{ |
| 1151 |
VERIFY_CPUNUM(NULL, cpunum_get_context_ptr); |
| 1152 |
return (cpu_active_context[cpu[cpunum].family] == cpunum) ? NULL : cpu[cpunum].context; |
| 1153 |
} |
| 1154 |
|
| 1155 |
|
| 1156 |
/*-------------------------- |
| 1157 |
Get/set cycle table |
| 1158 |
--------------------------*/ |
| 1159 |
|
| 1160 |
const void *cpunum_get_cycle_table(int cpunum, int which) |
| 1161 |
{ |
| 1162 |
const void *result; |
| 1163 |
VERIFY_CPUNUM(NULL, cpunum_get_cycle_table); |
| 1164 |
cpuintrf_push_context(cpunum); |
| 1165 |
result = (*cpu[cpunum].intf.get_cycle_table)(which); |
| 1166 |
cpuintrf_pop_context(); |
| 1167 |
return result; |
| 1168 |
} |
| 1169 |
|
| 1170 |
|
| 1171 |
void cpunum_set_cycle_tbl(int cpunum, int which, void *new_table) |
| 1172 |
{ |
| 1173 |
VERIFY_CPUNUM_VOID(cpunum_set_cycle_tbl); |
| 1174 |
cpuintrf_push_context(cpunum); |
| 1175 |
(*cpu[cpunum].intf.set_cycle_table)(which, new_table); |
| 1176 |
cpuintrf_pop_context(); |
| 1177 |
} |
| 1178 |
|
| 1179 |
|
| 1180 |
/*-------------------------- |
| 1181 |
Get/set registers |
| 1182 |
--------------------------*/ |
| 1183 |
|
| 1184 |
unsigned cpunum_get_reg(int cpunum, int regnum) |
| 1185 |
{ |
| 1186 |
unsigned result; |
| 1187 |
VERIFY_CPUNUM(0, cpunum_get_reg); |
| 1188 |
cpuintrf_push_context(cpunum); |
| 1189 |
result = (*cpu[cpunum].intf.get_reg)(regnum); |
| 1190 |
cpuintrf_pop_context(); |
| 1191 |
return result; |
| 1192 |
} |
| 1193 |
|
| 1194 |
|
| 1195 |
void cpunum_set_reg(int cpunum, int regnum, unsigned val) |
| 1196 |
{ |
| 1197 |
VERIFY_CPUNUM_VOID(cpunum_set_reg); |
| 1198 |
cpuintrf_push_context(cpunum); |
| 1199 |
(*cpu[cpunum].intf.set_reg)(regnum, val); |
| 1200 |
cpuintrf_pop_context(); |
| 1201 |
} |
| 1202 |
|
| 1203 |
|
| 1204 |
/*-------------------------- |
| 1205 |
Get/set PC |
| 1206 |
--------------------------*/ |
| 1207 |
|
| 1208 |
offs_t cpunum_get_pc_byte(int cpunum) |
| 1209 |
{ |
| 1210 |
offs_t base, pc; |
| 1211 |
int shift; |
| 1212 |
|
| 1213 |
VERIFY_CPUNUM(0, cpunum_get_pc_byte); |
| 1214 |
shift = cpu[cpunum].intf.address_shift; |
| 1215 |
base = cpu[cpunum].intf.pgm_memory_base; |
| 1216 |
cpuintrf_push_context(cpunum); |
| 1217 |
pc = (*cpu[cpunum].intf.get_reg)(REG_PC); |
| 1218 |
cpuintrf_pop_context(); |
| 1219 |
return base + ((shift < 0) ? (pc << -shift) : (pc >> shift)); |
| 1220 |
} |
| 1221 |
|
| 1222 |
|
| 1223 |
void cpunum_set_op_base(int cpunum, unsigned val) |
| 1224 |
{ |
| 1225 |
VERIFY_CPUNUM_VOID(cpunum_set_op_base); |
| 1226 |
cpuintrf_push_context(cpunum); |
| 1227 |
(*cpu[cpunum].intf.set_op_base)(val); |
| 1228 |
cpuintrf_pop_context(); |
| 1229 |
} |
| 1230 |
|
| 1231 |
|
| 1232 |
/*-------------------------- |
| 1233 |
Disassembly |
| 1234 |
--------------------------*/ |
| 1235 |
|
| 1236 |
unsigned cpunum_dasm(int cpunum, char *buffer, unsigned pc) |
| 1237 |
{ |
| 1238 |
unsigned result; |
| 1239 |
VERIFY_CPUNUM(1, cpunum_dasm); |
| 1240 |
cpuintrf_push_context(cpunum); |
| 1241 |
result = (*cpu[cpunum].intf.cpu_dasm)(buffer, pc); |
| 1242 |
cpuintrf_pop_context(); |
| 1243 |
return result; |
| 1244 |
} |
| 1245 |
|
| 1246 |
|
| 1247 |
/*-------------------------- |
| 1248 |
Register dumps |
| 1249 |
--------------------------*/ |
| 1250 |
|
| 1251 |
const char *cpunum_flags(int cpunum) |
| 1252 |
{ |
| 1253 |
const char *result; |
| 1254 |
VERIFY_CPUNUM("", cpunum_flags); |
| 1255 |
cpuintrf_push_context(cpunum); |
| 1256 |
result = (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_FLAGS); |
| 1257 |
cpuintrf_pop_context(); |
| 1258 |
return result; |
| 1259 |
} |
| 1260 |
|
| 1261 |
|
| 1262 |
const char *cpunum_dump_reg(int cpunum, int regnum) |
| 1263 |
{ |
| 1264 |
const char *result; |
| 1265 |
VERIFY_CPUNUM("", cpunum_dump_reg); |
| 1266 |
cpuintrf_push_context(cpunum); |
| 1267 |
result = (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_REG + regnum); |
| 1268 |
cpuintrf_pop_context(); |
| 1269 |
return result; |
| 1270 |
} |
| 1271 |
|
| 1272 |
|
| 1273 |
/*-------------------------- |
| 1274 |
State dumps |
| 1275 |
--------------------------*/ |
| 1276 |
|
| 1277 |
const char *cpunum_dump_state(int cpunum) |
| 1278 |
{ |
| 1279 |
static char buffer[1024+1]; |
| 1280 |
VERIFY_CPUNUM("", cpunum_dump_state); |
| 1281 |
cpuintrf_push_context(cpunum); |
| 1282 |
strcpy(buffer, activecpu_dump_state()); |
| 1283 |
cpuintrf_pop_context(); |
| 1284 |
return buffer; |
| 1285 |
} |
| 1286 |
|
| 1287 |
|
| 1288 |
/*-------------------------- |
| 1289 |
Get/set static info |
| 1290 |
--------------------------*/ |
| 1291 |
|
| 1292 |
#define CPUNUM_FUNC(rettype, name, defresult, result) \ |
| 1293 |
rettype name(int cpunum) \ |
| 1294 |
{ \ |
| 1295 |
VERIFY_CPUNUM(defresult, name) \ |
| 1296 |
return result; \ |
| 1297 |
} |
| 1298 |
|
| 1299 |
CPUNUM_FUNC(int, cpunum_default_irq_vector, 0, cpu[cpunum].intf.default_vector) |
| 1300 |
CPUNUM_FUNC(unsigned, cpunum_address_bits, 0, cpu[cpunum].intf.address_bits) |
| 1301 |
CPUNUM_FUNC(unsigned, cpunum_address_mask, 0, 0xffffffffUL >> (32 - cpu[cpunum].intf.address_bits)) |
| 1302 |
CPUNUM_FUNC(int, cpunum_address_shift, 0, cpu[cpunum].intf.address_shift) |
| 1303 |
CPUNUM_FUNC(unsigned, cpunum_endianess, 0, cpu[cpunum].intf.endianess) |
| 1304 |
CPUNUM_FUNC(unsigned, cpunum_databus_width, 0, cpu[cpunum].intf.databus_width) |
| 1305 |
CPUNUM_FUNC(unsigned, cpunum_align_unit, 0, cpu[cpunum].intf.align_unit) |
| 1306 |
CPUNUM_FUNC(unsigned, cpunum_max_inst_len, 0, cpu[cpunum].intf.max_inst_len) |
| 1307 |
CPUNUM_FUNC(const char *, cpunum_name, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_NAME)) |
| 1308 |
CPUNUM_FUNC(const char *, cpunum_core_family, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_FAMILY)) |
| 1309 |
CPUNUM_FUNC(const char *, cpunum_core_version, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_VERSION)) |
| 1310 |
CPUNUM_FUNC(const char *, cpunum_core_file, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_FILE)) |
| 1311 |
CPUNUM_FUNC(const char *, cpunum_core_credits, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_CREDITS)) |
| 1312 |
CPUNUM_FUNC(const char *, cpunum_reg_layout, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_REG_LAYOUT)) |
| 1313 |
CPUNUM_FUNC(const char *, cpunum_win_layout, "", (*cpu[cpunum].intf.cpu_info)(NULL, CPU_INFO_WIN_LAYOUT)) |
| 1314 |
|
| 1315 |
|
| 1316 |
|
| 1317 |
/************************************* |
| 1318 |
* |
| 1319 |
* Static info about a type of CPU |
| 1320 |
* |
| 1321 |
*************************************/ |
| 1322 |
|
| 1323 |
#define CPUTYPE_FUNC(rettype, name, defresult, result) \ |
| 1324 |
rettype name(int cputype) \ |
| 1325 |
{ \ |
| 1326 |
cputype &= ~CPU_FLAGS_MASK; \ |
| 1327 |
if (cputype >= 0 && cputype < CPU_COUNT) \ |
| 1328 |
return result; \ |
| 1329 |
else \ |
| 1330 |
logerror(#name "() called with invalid cpu type!\n");\ |
| 1331 |
return defresult; \ |
| 1332 |
} |
| 1333 |
|
| 1334 |
CPUTYPE_FUNC(int, cputype_default_irq_vector, 0, cpuintrf[cputype].default_vector) |
| 1335 |
CPUTYPE_FUNC(unsigned, cputype_address_bits, 0, cpuintrf[cputype].address_bits) |
| 1336 |
CPUTYPE_FUNC(unsigned, cputype_address_mask, 0, 0xffffffffUL >> (32 - cpuintrf[cputype].address_bits)) |
| 1337 |
CPUTYPE_FUNC(int, cputype_address_shift, 0, cpuintrf[cputype].address_shift) |
| 1338 |
CPUTYPE_FUNC(unsigned, cputype_endianess, 0, cpuintrf[cputype].endianess) |
| 1339 |
CPUTYPE_FUNC(unsigned, cputype_databus_width, 0, cpuintrf[cputype].databus_width) |
| 1340 |
CPUTYPE_FUNC(unsigned, cputype_align_unit, 0, cpuintrf[cputype].align_unit) |
| 1341 |
CPUTYPE_FUNC(unsigned, cputype_max_inst_len, 0, cpuintrf[cputype].max_inst_len) |
| 1342 |
CPUTYPE_FUNC(const char *, cputype_name, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_NAME)) |
| 1343 |
CPUTYPE_FUNC(const char *, cputype_core_family, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_FAMILY)) |
| 1344 |
CPUTYPE_FUNC(const char *, cputype_core_version, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_VERSION)) |
| 1345 |
CPUTYPE_FUNC(const char *, cputype_core_file, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_FILE)) |
| 1346 |
CPUTYPE_FUNC(const char *, cputype_core_credits, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_CREDITS)) |
| 1347 |
CPUTYPE_FUNC(const char *, cputype_reg_layout, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_REG_LAYOUT)) |
| 1348 |
CPUTYPE_FUNC(const char *, cputype_win_layout, "", (*cpuintrf[cputype].cpu_info)(NULL, CPU_INFO_WIN_LAYOUT)) |
| 1349 |
|
| 1350 |
|
| 1351 |
|
| 1352 |
/************************************* |
| 1353 |
* |
| 1354 |
* Dump states of all CPUs |
| 1355 |
* |
| 1356 |
*************************************/ |
| 1357 |
|
| 1358 |
void cpu_dump_states(void) |
| 1359 |
{ |
| 1360 |
int cpunum; |
| 1361 |
|
| 1362 |
for (cpunum = 0; cpunum < totalcpu; cpunum++) |
| 1363 |
puts(cpunum_dump_state(cpunum)); |
| 1364 |
fflush(stdout); |
| 1365 |
} |
| 1366 |
|
| 1367 |
|
| 1368 |
|
| 1369 |
/************************************* |
| 1370 |
* |
| 1371 |
* Dummy CPU definition |
| 1372 |
* |
| 1373 |
*************************************/ |
| 1374 |
|
| 1375 |
static void dummy_init(void) { } |
| 1376 |
static void dummy_reset(void *param) { } |
| 1377 |
static void dummy_exit(void) { } |
| 1378 |
static int dummy_execute(int cycles) { return cycles; } |
| 1379 |
static void dummy_burn(int cycles) { } |
| 1380 |
static unsigned dummy_get_context(void *regs) { return 0; } |
| 1381 |
static void dummy_set_context(void *regs) { } |
| 1382 |
static unsigned dummy_get_reg(int regnum) { return 0; } |
| 1383 |
static void dummy_set_reg(int regnum, unsigned val) { } |
| 1384 |
static void dummy_set_irq_line(int irqline, int state) { } |
| 1385 |
static void dummy_set_irq_callback(int (*callback)(int irqline)) { } |
| 1386 |
|
| 1387 |
static const char *dummy_info(void *context, int regnum) |
| 1388 |
{ |
| 1389 |
switch (regnum) |
| 1390 |
{ |
| 1391 |
case CPU_INFO_NAME: return ""; |
| 1392 |
case CPU_INFO_FAMILY: return "no CPU"; |
| 1393 |
case CPU_INFO_VERSION: return "0.0"; |
| 1394 |
case CPU_INFO_FILE: return __FILE__; |
| 1395 |
case CPU_INFO_CREDITS: return "The MAME team."; |
| 1396 |
} |
| 1397 |
return ""; |
| 1398 |
} |
| 1399 |
|
| 1400 |
static unsigned dummy_dasm(char *buffer, unsigned pc) |
| 1401 |
{ |
| 1402 |
strcpy(buffer, "???"); |
| 1403 |
return 1; |
| 1404 |
} |
| 1405 |
|
| 1406 |
|
| 1407 |
|
| 1408 |
/************************************* |
| 1409 |
* |
| 1410 |
* 68000 reset kludge |
| 1411 |
* |
| 1412 |
*************************************/ |
| 1413 |
|
| 1414 |
#if (HAS_M68000 || HAS_M68010 || HAS_M68020 || HAS_M68EC020) |
| 1415 |
void cpu_set_m68k_reset(int cpunum, void (*resetfn)(void)) |
| 1416 |
{ |
| 1417 |
void m68k_set_reset_instr_callback(void (*callback)(void)); |
| 1418 |
|
| 1419 |
if ( 1 |
| 1420 |
#if (HAS_M68000) |
| 1421 |
&& cpu[cpunum].cputype != CPU_M68000 |
| 1422 |
#endif |
| 1423 |
#if (HAS_M68010) |
| 1424 |
&& cpu[cpunum].cputype != CPU_M68010 |
| 1425 |
#endif |
| 1426 |
#if (HAS_M68020) |
| 1427 |
&& cpu[cpunum].cputype != CPU_M68020 |
| 1428 |
#endif |
| 1429 |
#if (HAS_M68EC020) |
| 1430 |
&& cpu[cpunum].cputype != CPU_M68EC020 |
| 1431 |
#endif |
| 1432 |
) |
| 1433 |
{ |
| 1434 |
logerror("Trying to set m68k reset vector on non-68k cpu\n"); |
| 1435 |
exit(1); |
| 1436 |
} |
| 1437 |
|
| 1438 |
cpuintrf_push_context(cpunum); |
| 1439 |
m68k_set_reset_instr_callback(resetfn); |
| 1440 |
cpuintrf_pop_context(); |
| 1441 |
} |
| 1442 |
#endif |
| |
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