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external-llvm: Commit

external/llvm


Commit MetaInfo

Revision954cf79878026a8f200793e4041d1be976a57037 (tree)
Time2020-07-26 11:24:56
AuthorMauro Rossi <issor.oruam@gmai...>
CommiterChih-Wei Huang

Log Message

android: AMDGPU/GlobalISel: fix tablegen rules (llvm90)

Porting to Android.bp of commit
70d549800ca ("AMDGPU/GlobalISel: Enable TableGen'd instruction selector")

AMDGPU/GlobalISel requires separated "llvm90-gen-amdgpuisel" llvm90_tblgen rules
and the file "AMDGPUGISel.td" is used to generate "AMDGPUGenGlobalISel.inc"

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>

Change Summary

Incremental Difference

--- a/lib/Target/AMDGPU/Android.bp
+++ b/lib/Target/AMDGPU/Android.bp
@@ -9,7 +9,11 @@ cc_library_static {
99
1010 cc_defaults {
1111 name: "llvm90-amdgpu-defaults",
12- generated_headers: ["llvm90-gen-amdgpu", "llvm90-gen-r600"],
12+ generated_headers: [
13+ "llvm90-gen-amdgpu",
14+ "llvm90-gen-amdgpuisel",
15+ "llvm90-gen-r600",
16+ ],
1317 static_libs: ["llvm90-amdgpu-headers"],
1418 }
1519
@@ -39,7 +43,6 @@ llvm90_tblgen {
3943 "AMDGPUGenIntrinsicEnums.inc",
4044 "AMDGPUGenIntrinsicImpl.inc",
4145 "AMDGPUGenRegisterBank.inc",
42- "AMDGPUGenGlobalISel.inc",
4346 "AMDGPUGenMCPseudoLowering.inc",
4447 "AMDGPUGenSearchableTables.inc",
4548 "AMDGPUGenDisassemblerTables.inc",
@@ -47,6 +50,14 @@ llvm90_tblgen {
4750 }
4851
4952 llvm90_tblgen {
53+ name: "llvm90-gen-amdgpuisel",
54+ in: "AMDGPUGISel.td",
55+ outs: [
56+ "AMDGPUGenGlobalISel.inc",
57+ ],
58+}
59+
60+llvm90_tblgen {
5061 name: "llvm90-gen-r600",
5162 in: "R600.td",
5263 outs: [
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