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chibios: Commit


Commit MetaInfo

Revision13496 (tree)
Time2020-04-02 02:06:02
Authorgdisirio

Log Message

(empty log message)

Change Summary

Incremental Difference

--- trunk/demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/cfg/chconf.h (revision 13495)
+++ trunk/demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/cfg/chconf.h (revision 13496)
@@ -589,7 +589,7 @@
589589 * @p panic_msg variable set to @p NULL.
590590 */
591591 #if !defined(CH_DBG_ENABLE_STACK_CHECK)
592-#define CH_DBG_ENABLE_STACK_CHECK TRUE
592+#define CH_DBG_ENABLE_STACK_CHECK FALSE
593593 #endif
594594
595595 /**
--- trunk/demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/main.c (revision 13495)
+++ trunk/demos/STM32/RT-STM32L552ZE-NUCLEO144-TEST/main.c (revision 13496)
@@ -26,7 +26,7 @@
2626 * This is a periodic thread that does absolutely nothing except flashing
2727 * a LED.
2828 */
29-static THD_WORKING_AREA(waThread1, 128);
29+static THD_WORKING_AREA(waThread1, 256);
3030 static THD_FUNCTION(Thread1, arg) {
3131
3232 (void)arg;
--- trunk/os/common/ports/ARMCAx-TZ/chcore_timer.h (revision 13495)
+++ trunk/os/common/ports/ARMCAx-TZ/chcore_timer.h (nonexistent)
@@ -1,126 +0,0 @@
1-/*
2- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
3-
4- This file is part of ChibiOS.
5-
6- ChibiOS is free software; you can redistribute it and/or modify
7- it under the terms of the GNU General Public License as published by
8- the Free Software Foundation; either version 3 of the License, or
9- (at your option) any later version.
10-
11- ChibiOS is distributed in the hope that it will be useful,
12- but WITHOUT ANY WARRANTY; without even the implied warranty of
13- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14- GNU General Public License for more details.
15-
16- You should have received a copy of the GNU General Public License
17- along with this program. If not, see <http://www.gnu.org/licenses/>.
18-*/
19-
20-/**
21- * @file chcore_timer.h
22- * @brief System timer header file.
23- *
24- * @addtogroup ARMCMAx-TZ_TIMER
25- * @{
26- */
27-
28-#ifndef CHCORE_TIMER_H
29-#define CHCORE_TIMER_H
30-
31-/*===========================================================================*/
32-/* Module constants. */
33-/*===========================================================================*/
34-
35-/*===========================================================================*/
36-/* Module pre-compile time settings. */
37-/*===========================================================================*/
38-
39-/*===========================================================================*/
40-/* Derived constants and error checks. */
41-/*===========================================================================*/
42-
43-/*===========================================================================*/
44-/* Module data structures and types. */
45-/*===========================================================================*/
46-
47-/*===========================================================================*/
48-/* Module macros. */
49-/*===========================================================================*/
50-
51-/*===========================================================================*/
52-/* External declarations. */
53-/*===========================================================================*/
54-
55-/*===========================================================================*/
56-/* Module inline functions. */
57-/*===========================================================================*/
58-
59-/**
60- * @brief Starts the alarm.
61- * @note Makes sure that no spurious alarms are triggered after
62- * this call.
63- *
64- * @param[in] time the time to be set for the first alarm
65- *
66- * @notapi
67- */
68-static inline void port_timer_start_alarm(systime_t time) {
69- void stStartAlarm(systime_t time);
70-
71- stStartAlarm(time);
72-}
73-
74-/**
75- * @brief Stops the alarm interrupt.
76- *
77- * @notapi
78- */
79-static inline void port_timer_stop_alarm(void) {
80- void stStopAlarm(void);
81-
82- stStopAlarm();
83-}
84-
85-/**
86- * @brief Sets the alarm time.
87- *
88- * @param[in] time the time to be set for the next alarm
89- *
90- * @notapi
91- */
92-static inline void port_timer_set_alarm(systime_t time) {
93- void stSetAlarm(systime_t time);
94-
95- stSetAlarm(time);
96-}
97-
98-/**
99- * @brief Returns the system time.
100- *
101- * @return The system time.
102- *
103- * @notapi
104- */
105-static inline systime_t port_timer_get_time(void) {
106- systime_t stGetCounter(void);
107-
108- return stGetCounter();
109-}
110-
111-/**
112- * @brief Returns the current alarm time.
113- *
114- * @return The currently set alarm time.
115- *
116- * @notapi
117- */
118-static inline systime_t port_timer_get_alarm(void) {
119- systime_t stGetAlarm(void);
120-
121- return stGetAlarm();
122-}
123-
124-#endif /* CHCORE_TIMER_H */
125-
126-/** @} */
--- trunk/os/common/ports/ARMCAx-TZ/chcore.h (revision 13495)
+++ trunk/os/common/ports/ARMCAx-TZ/chcore.h (nonexistent)
@@ -1,547 +0,0 @@
1-/*
2- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
3-
4- This file is part of ChibiOS.
5-
6- ChibiOS is free software; you can redistribute it and/or modify
7- it under the terms of the GNU General Public License as published by
8- the Free Software Foundation; either version 3 of the License, or
9- (at your option) any later version.
10-
11- ChibiOS is distributed in the hope that it will be useful,
12- but WITHOUT ANY WARRANTY; without even the implied warranty of
13- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14- GNU General Public License for more details.
15-
16- You should have received a copy of the GNU General Public License
17- along with this program. If not, see <http://www.gnu.org/licenses/>.
18-*/
19-
20-/**
21- * @file ARMCAx-TZ/chcore.h
22- * @brief ARMCAx-TZ architecture port macros and structures.
23- *
24- * @addtogroup ARMCAx-TZ_CORE
25- * @{
26- */
27-
28-#ifndef CHCORE_H
29-#define CHCORE_H
30-
31-/*===========================================================================*/
32-/* Module constants. */
33-/*===========================================================================*/
34-
35-/**
36- * @name Port Capabilities and Constants
37- * @{
38- */
39-/**
40- * @brief This port supports a realtime counter.
41- */
42-#define PORT_SUPPORTS_RT TRUE
43-
44-/**
45- * @brief Natural alignment constant.
46- * @note It is the minimum alignment for pointer-size variables.
47- */
48-#define PORT_NATURAL_ALIGN sizeof (void *)
49-
50-/**
51- * @brief Stack alignment constant.
52- * @note It is the alignment required for the stack pointer.
53- */
54-#define PORT_STACK_ALIGN sizeof (stkalign_t)
55-
56-/**
57- * @brief Working Areas alignment constant.
58- * @note It is the alignment to be enforced for thread working areas.
59- */
60-#define PORT_WORKING_AREA_ALIGN sizeof (stkalign_t)
61-/** @} */
62-
63-/**
64- * @name Architecture and Compiler
65- * @{
66- */
67-/**
68- * @brief Macro defining a generic ARM architecture.
69- */
70-#define PORT_ARCHITECTURE_ARM_TZ
71-
72-/* The following code is not processed when the file is included from an
73- asm module because those intrinsic macros are not necessarily defined
74- by the assembler too.*/
75-#if !defined(_FROM_ASM_)
76-
77-/**
78- * @brief Compiler name and version.
79- */
80-#if defined(__GNUC__) || defined(__DOXYGEN__)
81-#define PORT_COMPILER_NAME "GCC " __VERSION__
82-
83-#else
84-#error "unsupported compiler"
85-#endif
86-
87-#endif /* !defined(_FROM_ASM_) */
88-/** @} */
89-
90-/**
91- * @name ARM variants
92- * @{
93- */
94-#define ARM_CORE_CORTEX_A5 105
95-#define ARM_CORE_CORTEX_A8 108
96-#define ARM_CORE_CORTEX_A9 109
97-/** @} */
98-
99-/* Inclusion of the ARM implementation specific parameters.*/
100-#include "armparams.h"
101-
102-/*===========================================================================*/
103-/* Module pre-compile time settings. */
104-/*===========================================================================*/
105-
106-/**
107- * @brief Enables an alternative timer implementation.
108- * @details Usually the port uses a timer interface defined in the file
109- * @p chcore_timer.h, if this option is enabled then the file
110- * @p chcore_timer_alt.h is included instead.
111- */
112-#if !defined(PORT_USE_ALT_TIMER)
113-#define PORT_USE_ALT_TIMER FALSE
114-#endif
115-
116-/**
117- * @brief Stack size for the system idle thread.
118- * @details This size depends on the idle thread implementation, usually
119- * the idle thread should take no more space than those reserved
120- * by @p PORT_INT_REQUIRED_STACK.
121- * @note In this port it is set to 32 because the idle thread does have
122- * a stack frame when compiling without optimizations. You may
123- * reduce this value to zero when compiling with optimizations.
124- */
125-#if !defined(PORT_IDLE_THREAD_STACK_SIZE) || defined(__DOXYGEN__)
126-#define PORT_IDLE_THREAD_STACK_SIZE 32
127-#endif
128-
129-/**
130- * @brief Per-thread stack overhead for interrupts servicing.
131- * @details This constant is used in the calculation of the correct working
132- * area size.
133- */
134-#if !defined(PORT_INT_REQUIRED_STACK) || defined(__DOXYGEN__)
135-#define PORT_INT_REQUIRED_STACK 32
136-#endif
137-
138-/**
139- * @brief If enabled allows the idle thread to enter a low power mode.
140- */
141-#ifndef ARM_ENABLE_WFI_IDLE
142-#define ARM_ENABLE_WFI_IDLE FALSE
143-#endif
144-
145-/*===========================================================================*/
146-/* Derived constants and error checks. */
147-/*===========================================================================*/
148-
149-/* The following code is not processed when the file is included from an
150- asm module.*/
151-#if !defined(_FROM_ASM_)
152-
153-/* ARM core check.*/
154-#if (ARM_CORE == ARM_CORE_CORTEX_A5) || defined(__DOXYGEN__)
155-#define PORT_ARCHITECTURE_ARM_ARM7
156-#define PORT_ARCHITECTURE_NAME "ARMv7 (TZ)"
157-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A5"
158-
159-#elif ARM_CORE == ARM_CORE_CORTEX_A8
160-#define PORT_ARCHITECTURE_ARM_CORTEXA8
161-#define PORT_ARCHITECTURE_NAME "ARMv7"
162-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A8"
163-
164-#elif ARM_CORE == ARM_CORE_CORTEX_A9
165-#define PORT_ARCHITECTURE_ARM_CORTEXA9
166-#define PORT_ARCHITECTURE_NAME "ARMv7"
167-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A9"
168-
169-#else
170-#error "unknown or unsupported ARM core"
171-#endif
172-
173-#define PORT_INFO "Pure THUMB mode"
174-
175-#endif /* !defined(_FROM_ASM_) */
176-
177-/*===========================================================================*/
178-/* Module data structures and types. */
179-/*===========================================================================*/
180-
181-/* The following code is not processed when the file is included from an
182- asm module.*/
183-#if !defined(_FROM_ASM_)
184-
185-/**
186- * @brief Type of stack and memory alignment enforcement.
187- * @note In this architecture the stack alignment is enforced to 64 bits.
188- */
189-typedef uint64_t stkalign_t;
190-
191-/**
192- * @brief Generic ARM register.
193- */
194-typedef void *regarm_t;
195-
196-/**
197- * @brief Interrupt saved context.
198- * @details This structure represents the stack frame saved during an
199- * interrupt handler.
200- */
201-struct port_extctx {
202- regarm_t spsr_irq;
203- regarm_t lr_irq;
204- regarm_t r0;
205- regarm_t r1;
206- regarm_t r2;
207- regarm_t r3;
208- regarm_t r12;
209- regarm_t lr_usr;
210-};
211-
212-/**
213- * @brief System saved context.
214- * @details This structure represents the inner stack frame during a context
215- * switch.
216- */
217-struct port_intctx {
218- regarm_t r4;
219- regarm_t r5;
220- regarm_t r6;
221- regarm_t r7;
222- regarm_t r8;
223- regarm_t r9;
224- regarm_t r10;
225- regarm_t r11;
226- regarm_t lr;
227-};
228-
229-/**
230- * @brief Platform dependent part of the @p thread_t structure.
231- * @details In this port the structure just holds a pointer to the
232- * @p port_intctx structure representing the stack pointer
233- * at context switch time.
234- */
235-struct port_context {
236- struct port_intctx *sp;
237-};
238-
239-/*===========================================================================*/
240-/* Module macros. */
241-/*===========================================================================*/
242-
243-/**
244- * @brief Platform dependent part of the @p chThdCreateI() API.
245- * @details This code usually setup the context switching frame represented
246- * by an @p port_intctx structure.
247- */
248-#define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) { \
249- (tp)->ctx.sp = (struct port_intctx *)((uint8_t *)(wtop) - \
250- sizeof (struct port_intctx)); \
251- (tp)->ctx.sp->r4 = (regarm_t)(pf); \
252- (tp)->ctx.sp->r5 = (regarm_t)(arg); \
253- (tp)->ctx.sp->lr = (regarm_t)(_port_thread_start); \
254-}
255-
256-/**
257- * @brief Computes the thread working area global size.
258- * @note There is no need to perform alignments in this macro.
259- */
260-#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
261- sizeof(struct port_extctx) + \
262- ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
263-
264-/**
265- * @brief Static working area allocation.
266- * @details This macro is used to allocate a static thread working area
267- * aligned as both position and size.
268- *
269- * @param[in] s the name to be assigned to the stack array
270- * @param[in] n the stack size to be assigned to the thread
271- */
272-#define PORT_WORKING_AREA(s, n) \
273- stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
274-
275-/**
276- * @brief Priority level verification macro.
277- * @todo Add the required parameters to armparams.h.
278- */
279-#define PORT_IRQ_IS_VALID_PRIORITY(n) false
280-
281-/**
282- * @brief IRQ prologue code.
283- * @details This macro must be inserted at the start of all IRQ handlers
284- * enabled to invoke system APIs.
285- */
286-#define PORT_IRQ_PROLOGUE()
287-
288-/**
289- * @brief IRQ epilogue code.
290- * @details This macro must be inserted at the end of all IRQ handlers
291- * enabled to invoke system APIs.
292- */
293-#define PORT_IRQ_EPILOGUE() return chSchIsPreemptionRequired()
294-
295-/**
296- * @brief IRQ handler function declaration.
297- * @note @p id can be a function name or a vector number depending on the
298- * port implementation.
299- */
300-#ifdef __cplusplus
301-#define PORT_IRQ_HANDLER(id) extern "C" bool id(void)
302-#else
303-#define PORT_IRQ_HANDLER(id) bool id(void)
304-#endif
305-
306-/**
307- * @brief Fast IRQ handler function declaration.
308- * @note @p id can be a function name or a vector number depending on the
309- * port implementation.
310- */
311-#define PORT_FAST_IRQ_HANDLER(id) \
312- bool id(void)
313-
314-/**
315- * @brief Performs a context switch between two threads.
316- * @details This is the most critical code in any port, this function
317- * is responsible for the context switch between 2 threads.
318- * @note The implementation of this code affects <b>directly</b> the context
319- * switch performance so optimize here as much as you can.
320- * @note Implemented as inlined code for performance reasons.
321- *
322- * @param[in] ntp the thread to be switched in
323- * @param[in] otp the thread to be switched out
324- */
325-#if defined(THUMB)
326-
327-#if CH_DBG_ENABLE_STACK_CHECK == TRUE
328-#define port_switch(ntp, otp) { \
329- register struct port_intctx *r13 asm ("r13"); \
330- if ((stkalign_t *)(r13 - 1) < otp->wabase) \
331- chSysHalt("stack overflow"); \
332- _port_switch_thumb(ntp, otp); \
333-}
334-#else
335-#define port_switch(ntp, otp) _port_switch_thumb(ntp, otp)
336-#endif
337-
338-#else /* !defined(THUMB) */
339-
340-#if CH_DBG_ENABLE_STACK_CHECK == TRUE
341-#define port_switch(ntp, otp) { \
342- register struct port_intctx *r13 asm ("r13"); \
343- if ((stkalign_t *)(r13 - 1) < otp->wabase) \
344- chSysHalt("stack overflow"); \
345- _port_switch_arm(ntp, otp); \
346-}
347-#else
348-#define port_switch(ntp, otp) _port_switch_arm(ntp, otp)
349-#endif
350-
351-#endif /* !defined(THUMB) */
352-
353-/*===========================================================================*/
354-/* External declarations. */
355-/*===========================================================================*/
356-
357-#ifdef __cplusplus
358-extern "C" {
359-#endif
360-#if defined(THUMB_PRESENT)
361- syssts_t _port_get_cpsr(void);
362-#endif
363-#if defined(THUMB)
364- void _port_switch_thumb(thread_t *ntp, thread_t *otp);
365-#else
366- void _port_switch_arm(thread_t *ntp, thread_t *otp);
367-#endif
368- void _port_thread_start(void);
369-#ifdef __cplusplus
370-}
371-#endif
372-
373-/*===========================================================================*/
374-/* Module inline functions. */
375-/*===========================================================================*/
376-
377-/**
378- * @brief Port-related initialization code.
379- */
380-static inline void port_init(void) {
381-
382-}
383-
384-/**
385- * @brief Returns a word encoding the current interrupts status.
386- *
387- * @return The interrupts status.
388- */
389-static inline syssts_t port_get_irq_status(void) {
390- syssts_t sts;
391-
392-#if defined(THUMB)
393- sts = _port_get_cpsr();
394-#else
395- __asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
396-#endif
397- /*lint -save -e530 [9.1] Asm instruction not seen by lint.*/
398- return sts;
399- /*lint -restore*/
400-}
401-
402-/**
403- * @brief Checks the interrupt status.
404- *
405- * @param[in] sts the interrupt status word
406- *
407- * @return The interrupt status.
408- * @retval false the word specified a disabled interrupts status.
409- * @retval true the word specified an enabled interrupts status.
410- */
411-static inline bool port_irq_enabled(syssts_t sts) {
412-
413- return (sts & (syssts_t)0x40) == (syssts_t)0;
414-}
415-
416-/**
417- * @brief Determines the current execution context.
418- *
419- * @return The execution context.
420- * @retval false not running in ISR mode.
421- * @retval true running in ISR mode.
422- */
423-static inline bool port_is_isr_context(void) {
424- syssts_t sts;
425-
426-#if defined(THUMB)
427- sts = _port_get_cpsr();
428-#else
429- __asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
430-#endif
431-
432- /*lint -save -e530 [9.1] Asm instruction not seen by lint.*/
433- return (sts & (syssts_t)0x1F) == (syssts_t)0x11;
434- /*lint -restore*/
435-}
436-
437-/**
438- * @brief Kernel-lock action.
439- * @details In this port it disables the FIQ and keep IRQ state.
440- */
441-static inline void port_lock(void) {
442-
443- __asm volatile ("cpsid if" : : : "memory");
444-}
445-
446-/**
447- * @brief Kernel-unlock action.
448- * @details In this port it enables the FIQ and IRQ sources.
449- */
450-static inline void port_unlock(void) {
451- __asm volatile ("cpsie if" : : : "memory");
452-}
453-
454-/**
455- * @brief Kernel-lock action from an interrupt handler.
456- * @note Empty in this port.
457- */
458-static inline void port_lock_from_isr(void) {
459-
460-}
461-
462-/**
463- * @brief Kernel-unlock action from an interrupt handler.
464- * @note Empty in this port.
465- */
466-static inline void port_unlock_from_isr(void) {
467-
468-}
469-
470-/**
471- * @brief Disables all the interrupt sources.
472- * @details In this port it disables FIQ sources and keeps IRQ sources
473- * disabled.
474- */
475-static inline void port_disable(void) {
476-
477- __asm volatile ("msr CPSR_c, #0xDF" : : : "memory");
478-}
479-
480-/**
481- * @brief Disables the interrupt sources below kernel-level priority.
482- * @note Interrupt sources above kernel level remains enabled.
483- * @note In this port it disables the FIQ and IRQ sources.
484- */
485-static inline void port_suspend(void) {
486-
487- __asm volatile ("msr CPSR_c, #0xDF" : : : "memory");
488-}
489-
490-/**
491- * @brief Enables all the interrupt sources.
492- * @note In this port it enables the FIQ and IRQ sources.
493- */
494-static inline void port_enable(void) {
495-
496- __asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
497-}
498-
499-/**
500- * @brief Enters an architecture-dependent IRQ-waiting mode.
501- * @details The function is meant to return when an interrupt becomes pending.
502- * The simplest implementation is an empty function or macro but this
503- * would not take advantage of architecture-specific power saving
504- * modes.
505- * @note Implemented as an inlined @p WFI instruction.
506- */
507-static inline void port_wait_for_interrupt(void) {
508-
509- asm volatile ("wfi" : : : "memory");
510-}
511-
512-/**
513- * @brief Returns the current value of the realtime counter.
514- *
515- * @return The realtime counter value.
516- */
517-static inline rtcnt_t port_rt_get_counter_value(void) {
518-
519-#if ((ARM_CORE == ARM_CORE_CORTEX_A5) || (ARM_CORE == ARM_CORE_CORTEX_A9) || defined(__DOXYGEN__))
520-
521- rtcnt_t cyc;
522-
523- __asm volatile("mrc p15, 0, %[p0], c9, c13, 0" : [p0] "=r" (cyc) :);
524-
525- return cyc;
526-#else
527-/*
528- * TODO develop same function for ARM_CORE_CORTEX_A8
529- */
530- return 0;
531-
532-#endif
533-}
534-
535-#if CH_CFG_ST_TIMEDELTA > 0
536-#if PORT_USE_ALT_TIMER == FALSE
537-#include "chcore_timer.h"
538-#else /* PORT_USE_ALT_TIMER */
539-#include "chcore_timer_alt.h"
540-#endif /* PORT_USE_ALT_TIMER */
541-#endif /* CH_CFG_ST_TIMEDELTA > 0 */
542-
543-#endif /* !defined(_FROM_ASM_) */
544-
545-#endif /* CHCORE_H */
546-
547-/** @} */
--- trunk/os/common/ports/ARMCAx-TZ/compilers/GCC/chtypes.h (revision 13495)
+++ trunk/os/common/ports/ARMCAx-TZ/compilers/GCC/chtypes.h (nonexistent)
@@ -1,115 +0,0 @@
1-/*
2- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
3-
4- This file is part of ChibiOS.
5-
6- ChibiOS is free software; you can redistribute it and/or modify
7- it under the terms of the GNU General Public License as published by
8- the Free Software Foundation; either version 3 of the License, or
9- (at your option) any later version.
10-
11- ChibiOS is distributed in the hope that it will be useful,
12- but WITHOUT ANY WARRANTY; without even the implied warranty of
13- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14- GNU General Public License for more details.
15-
16- You should have received a copy of the GNU General Public License
17- along with this program. If not, see <http://www.gnu.org/licenses/>.
18-*/
19-
20-/**
21- * @file ARMCMAx-TZ/compilers/GCC/chtypes.h
22- * @brief ARMCMAx-TZ port system types.
23- *
24- * @addtogroup ARMCMAx-TZ_GCC_CORE
25- * @{
26- */
27-
28-#ifndef CHTYPES_H
29-#define CHTYPES_H
30-
31-#include <stddef.h>
32-#include <stdint.h>
33-#include <stdbool.h>
34-
35-/**
36- * @name Common constants
37- */
38-/**
39- * @brief Generic 'false' boolean constant.
40- */
41-#if !defined(FALSE) || defined(__DOXYGEN__)
42-#define FALSE 0
43-#endif
44-
45-/**
46- * @brief Generic 'true' boolean constant.
47- */
48-#if !defined(TRUE) || defined(__DOXYGEN__)
49-#define TRUE 1
50-#endif
51-/** @} */
52-
53-/**
54- * @name Kernel types
55- * @{
56- */
57-typedef uint32_t rtcnt_t; /**< Realtime counter. */
58-typedef uint64_t rttime_t; /**< Realtime accumulator. */
59-typedef uint32_t syssts_t; /**< System status word. */
60-typedef uint8_t tmode_t; /**< Thread flags. */
61-typedef uint8_t tstate_t; /**< Thread state. */
62-typedef uint8_t trefs_t; /**< Thread references counter. */
63-typedef uint8_t tslices_t; /**< Thread time slices counter.*/
64-typedef uint32_t tprio_t; /**< Thread priority. */
65-typedef int32_t msg_t; /**< Inter-thread message. */
66-typedef int32_t eventid_t; /**< Numeric event identifier. */
67-typedef uint32_t eventmask_t; /**< Mask of event identifiers. */
68-typedef uint32_t eventflags_t; /**< Mask of event flags. */
69-typedef int32_t cnt_t; /**< Generic signed counter. */
70-typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
71-/** @} */
72-
73-/**
74- * @brief ROM constant modifier.
75- * @note It is set to use the "const" keyword in this port.
76- */
77-#define ROMCONST const
78-
79-/**
80- * @brief Makes functions not inlineable.
81- * @note If the compiler does not support such attribute then some
82- * time-dependent services could be degraded.
83- */
84-#define NOINLINE __attribute__((noinline))
85-
86-/**
87- * @brief Optimized thread function declaration macro.
88- */
89-#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
90-
91-/**
92- * @brief Packed variable specifier.
93- */
94-#define PACKED_VAR __attribute__((packed))
95-
96-/**
97- * @brief Memory alignment enforcement for variables.
98- */
99-#define ALIGNED_VAR(n) __attribute__((aligned(n)))
100-
101-/**
102- * @brief Size of a pointer.
103- * @note To be used where the sizeof operator cannot be used, preprocessor
104- * expressions for example.
105- */
106-#define SIZEOF_PTR 4
107-
108-/**
109- * @brief True if alignment is low-high in current architecture.
110- */
111-#define REVERSE_ORDER 1
112-
113-#endif /* CHTYPES_H */
114-
115-/** @} */
--- trunk/os/common/ports/ARMCAx-TZ/chtssi.c (revision 13495)
+++ trunk/os/common/ports/ARMCAx-TZ/chtssi.c (nonexistent)
@@ -1,522 +0,0 @@
1-/*
2- ChibiOS - Copyright (C) 2006..2018 Isidoro Orabona
3-
4- Licensed under the Apache License, Version 2.0 (the "License");
5- you may not use this file except in compliance with the License.
6- You may obtain a copy of the License at
7-
8- http://www.apache.org/licenses/LICENSE-2.0
9-
10- Unless required by applicable law or agreed to in writing, software
11- distributed under the License is distributed on an "AS IS" BASIS,
12- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13- See the License for the specific language governing permissions and
14- limitations under the License.
15-*/
16-
17-/**
18- * @file chtssi.c
19- * @brief Trusted services related API and definition.
20- *
21- * @addtogroup TSSI
22- * @{
23- */
24-
25-#include "ch.h"
26-#include "hal.h"
27-#include "chtssi.h"
28-#include "ARMCA5.h"
29-#if defined(__GNUC__) || defined(__DOXYGEN__)
30-#include "cmsis_gcc.h"
31-#else
32-#include "cmsis_armcc.h"
33-#endif
34-#include "ccportab.h"
35-#include <string.h>
36-
37-/*===========================================================================*/
38-/* Module local definitions. */
39-/*===========================================================================*/
40-/* Granted timeslices to trusted service. DO NOT modify those values.
41- They have non secure world counterparts.*/
42-typedef enum {
43- TS_TIMEINT_1000_US = 1000,
44- TS_TIMEINT_10000_US = 10000
45-} ts_timeint_t;
46-
47-#define LOWORD(in64) ((int64_t)in64 & 0x0FFFFFFFF)
48-#define TS_TIME2I(tmo) \
49- (tmo == TS_TIMEINT_10000_US ? TIME_US2I(TS_TIMEINT_10000_US) : \
50- TIME_US2I(TS_TIMEINT_1000_US))
51-#define FDT_MAGIC 0xd00dfeed
52-
53-/*===========================================================================*/
54-/* Module exported variables. */
55-/*===========================================================================*/
56-
57-/* If a services file is missing in the user application.*/
58-CC_WEAK ts_state_t ts_state[TS_MAX_SVCS];
59-CC_WEAK const thread_descriptor_t ts_configs[TS_MAX_SVCS];
60-CC_WEAK const fc_descriptor_t ts_fc_configs[1];
61-uint32_t ts_fc_configs_n;
62-
63-/* The reference to the suspended NSEC main thread.*/
64-thread_reference_t _ns_thread = NULL;
65-
66-/* The services may broadcast and listen event flags via this object.*/
67-EVENTSOURCE_DECL(tsEventSource);
68-
69-extern uint32_t __ram0_start__;
70-
71-/*===========================================================================*/
72-/* Module local types. */
73-/*===========================================================================*/
74-
75-struct fdt_header {
76- uint32_t magic; /* magic word FDT_MAGIC */
77- uint32_t totalsize; /* total size of DT block */
78- uint32_t off_dt_struct; /* offset to structure */
79- uint32_t off_dt_strings; /* offset to strings */
80- uint32_t off_mem_rsvmap; /* offset to memory reserve map */
81- uint32_t version; /* format version */
82- uint32_t last_comp_version; /* last compatible version */
83-
84- /* version 2 fields below */
85- uint32_t boot_cpuid_phys; /* Which physical CPU id we're
86- booting on */
87- /* version 3 fields below */
88- uint32_t size_dt_strings; /* size of the strings block */
89-
90- /* version 17 fields below */
91- uint32_t size_dt_struct; /* size of the structure block */
92-};
93-
94-/*===========================================================================*/
95-/* Module local variables. */
96-/*===========================================================================*/
97-
98-/* The ts module listen to the tsEventSource via this object.*/
99-static event_listener_t tsEventListener;
100-
101-/*===========================================================================*/
102-/* Module local functions. */
103-/*===========================================================================*/
104-
105-static inline uint32_t uswap32(uint32_t v)
106-{
107- uint32_t result;
108-
109- __asm volatile ("rev %0, %1" : "=r" (result) : "r" (v));
110- return result;
111-}
112-
113-static bool isAddrSpaceValid(uint8_t *addr, size_t size)
114-{
115- if (size == 0)
116- return TRUE;
117- return (bool)((addr - NSEC_MEMORY_START_ADDR) <
118- (NSEC_MEMORY_END_ADDR - NSEC_MEMORY_START_ADDR)) &&
119- (bool)((addr + size - NSEC_MEMORY_START_ADDR) <
120- (NSEC_MEMORY_END_ADDR - NSEC_MEMORY_START_ADDR));
121-}
122-
123-static bool isHndlValid(ts_state_t *handle)
124-{
125- if ((handle < TS_STATE(0)) || (handle >= TS_STATE(TS_MAX_SVCS)))
126- return FALSE;
127- if (((char *)handle - (char *)TS_STATE(0)) % sizeof *TS_STATE(0))
128- return FALSE;
129- return TRUE;
130-}
131-
132-static ts_state_t *findSvcsEntry(const char *name)
133-{
134- int i;
135- for (i = 0; i < TS_MAX_SVCS; ++i) {
136- if (TS_CONF_TABLE(i)->name == NULL)
137- continue;
138- if (!strcmp(TS_CONF_TABLE(i)->name, name))
139- return TS_CONF_TABLE(i)->arg;
140- }
141- return NULL;
142-}
143-
144-/*===========================================================================*/
145-/* Module exported functions. */
146-/*===========================================================================*/
147-
148-/**
149- * @brief The trusted service call entry point.
150- * @pre The foreign interrupts are disabled.
151- * @post A request is passed to the thread registered for the service.
152- * @post The service thread is resumed.
153- *
154- * @param[in] svc_handle the handle of the service to be invoked.
155- * @param[in,out] svc_data service request data, often a reference to a more
156- * complex structure.
157- * @param[in] svc_datalen size of the svc_data memory area.
158- * @param[in] svc_timeout after this time interval, the service execution
159- * will be interrupted. Time is in microseconds.
160- * This interval represents the time slice granted
161- * to the services to continue their work.
162- *
163- * @return A 64bit value. It is the OR of the 32bit service
164- * status combined with a 32bit event mask (in the
165- * hi-word).
166- * The retval values are returned in the lower word
167- * as 32bit int.
168- * @retval SMC_SVC_OK generic success value.
169- * @retval SMC_SVC_INTR call interrupted.
170- * @retval SMC_SVC_BUSY the service has a pending request.
171- * @retval SMC_SVC_INVALID bad parameters.
172- * @retval SMC_SVC_NOENT no such service.
173- * @retval SMC_SVC_BADH bad handle.
174- *
175- * @notapi
176- */
177-int64_t smcEntry(ts_state_t *svc_handle, ts_params_area_t svc_data,
178- size_t svc_datalen, ts_timeint_t svc_timeout) {
179- ts_state_t *tssp = NULL;
180- msg_t r;
181-
182- if (svc_handle == TS_HND_STQRY) {
183-
184- /* Internal query status service.*/
185- ts_state_t *tsqryd;
186-
187- /* svc_data is the handle of the service to whom 'query' the state.*/
188- tsqryd = (ts_state_t *)svc_data;
189-
190- /* handle argument validation.*/
191- if (!isHndlValid(tsqryd))
192- return LOWORD(SMC_SVC_BADH);
193-
194- /* if the service has done, return its last status.*/
195- if (tsqryd->ts_thdp != NULL) {
196- r = tsqryd->ts_status;
197- return LOWORD(r);
198- }
199- }
200- else if (svc_handle != TS_HND_IDLE) {
201- if (!isAddrSpaceValid(svc_data, svc_datalen))
202- return LOWORD(SMC_SVC_INVALID);
203-
204- uint32_t i = (uint32_t)svc_handle;
205-
206- if ((i & TS_FASTCALL_MASK) == TS_FASTCALL_MASK) {
207-
208- /* Fast call user service.*/
209- i &= ~TS_FASTCALL_MASK;
210-
211- if (i >= ts_fc_configs_n)
212- return LOWORD(SMC_SVC_BADH);
213-
214- return TS_FC_CONF_TABLE(i)->funcp(svc_data, svc_datalen);
215- }
216- else if (svc_handle == TS_HND_VERSION) {
217-
218- /* Internal get version service.*/
219- return LOWORD(TSSI_VERSION);
220- }
221- else if (svc_handle == TS_HND_DISCOVERY) {
222-
223- /* Internal discovery service.*/
224- if (svc_datalen) {
225- *((char *)svc_data + svc_datalen - 1) = '\0';
226- tssp = findSvcsEntry((char *)svc_data);
227- }
228- if (tssp == NULL)
229- return LOWORD(SMC_SVC_NOENT);
230- return LOWORD((int32_t)tssp);
231- }
232- else {
233-
234- /* User service.*/
235- if (!isHndlValid(svc_handle))
236- return LOWORD(SMC_SVC_BADH);
237- tssp = svc_handle;
238-
239- /* If the service is not waiting requests, it's busy.*/
240- if (tssp->ts_thdp == NULL)
241- return LOWORD(SMC_SVC_BUSY);
242- tssp->ts_datap = svc_data;
243- tssp->ts_datalen = svc_datalen;
244- }
245- }
246-
247-#if (CH_DBG_SYSTEM_STATE_CHECK == TRUE)
248- _dbg_check_lock();
249-#endif
250-
251- /* Limit the max timeout interval.*/
252- if (svc_timeout > TS_MAX_TMO)
253- svc_timeout = TS_MAX_TMO;
254-
255- if (tssp)
256- chThdResumeS(&tssp->ts_thdp, MSG_OK);
257- r = chThdSuspendTimeoutS(&_ns_thread, TS_TIME2I(svc_timeout));
258-
259- /* Map MSG_TIMEOUT to SMC_SVC_INTR.*/
260- if (r == MSG_TIMEOUT)
261- r = SMC_SVC_INTR;
262-
263- /* Get and clear any pending event flags.*/
264- eventflags_t f = chEvtGetAndClearFlagsI(&tsEventListener);
265-
266-#if (CH_DBG_SYSTEM_STATE_CHECK == TRUE)
267- _dbg_check_unlock();
268-#endif
269- return LOWORD(r) | ((int64_t)f << 32);
270-}
271-
272-/**
273- * @brief The calling thread is a service and wait the arrival of
274- * a request.
275- * @post The service object state is filled with the parameters of
276- * the requester.
277- *
278- * @param[in] svcp the service object reference.
279- *
280- * @return The wakeup message.
281- * @retval MSG_OK a new request has to be processed.
282- *
283- * @api
284- */
285-msg_t tssiWaitRequest(ts_state_t *svcp)
286-{
287- msg_t r;
288-
289- chDbgCheck(svcp != NULL);
290-
291- chSysLock();
292- if (_ns_thread) {
293- /* Ack a previous service invocation. Not schedule.*/
294- chThdResumeI(&_ns_thread, SMC_SVC_INTR);
295- }
296- r = chThdSuspendS(&svcp->ts_thdp);
297- chSysUnlock();
298- return r;
299-}
300-
301-/**
302- * @brief Check that the specified memory space is a subspace of
303- * the non secure memory space.
304- *
305- * @param[in] addr start address of the memory space.
306- * @param[in] size size of the memory space.
307- *
308- * @return TRUE, if the space is valid.
309- *
310- * @api
311- */
312-bool tsIsAddrSpaceValid(void *addr, size_t size)
313-{
314- return isAddrSpaceValid((uint8_t *)addr, size);
315-}
316-
317-/**
318- * @brief Initializes the trusted services and jumps in the NSEC world.
319- *
320- * @init
321- */
322-CC_NO_RETURN void tssiInit(void)
323-{
324- int32_t i;
325- uint32_t d;
326- uint32_t *tt;
327- struct fdt_header *pfdt = (struct fdt_header *)NSEC_MEMORY_START_ADDR;
328- void *moveto = NULL;
329-
330- /*
331- * The main DDR memory, PORT0, is divided in 4 region, each 32MB large.
332- * The last region is split in two areas, each 16MB large.
333- * The first 3 region and the lower area of this last region is non secure.
334- * All the rest of the regions space is secured.
335- * The same applies to AESB view of the DDR, PORT1, and LCDC view.
336- *
337- * Those settings depend on the designed memory mapping.
338- */
339- mtxSetSlaveRegionSize(MATRIX0, H64MX_SLAVE_DDR_PORT0, MATRIX_AREA_SIZE_32M, REGION_0_MSK);
340- mtxSetSlaveRegionSize(MATRIX0, H64MX_SLAVE_DDR_PORT1, MATRIX_AREA_SIZE_32M, REGION_0_MSK);
341- mtxSetSlaveRegionSize(MATRIX0, H64MX_SLAVE_DDR_PORT2, MATRIX_AREA_SIZE_32M, REGION_0_MSK);
342- mtxSetSlaveRegionSize(MATRIX0, H64MX_SLAVE_DDR_PORT3, MATRIX_AREA_SIZE_32M, REGION_0_MSK);
343-
344- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT0, MATRIX_AREA_SIZE_32M,
345- REGION_0_MSK | REGION_1_MSK | REGION_2_MSK);
346- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT1, MATRIX_AREA_SIZE_32M,
347- REGION_0_MSK | REGION_1_MSK | REGION_2_MSK);
348- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT2, MATRIX_AREA_SIZE_32M,
349- REGION_0_MSK | REGION_1_MSK | REGION_2_MSK);
350- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT3, MATRIX_AREA_SIZE_32M,
351- REGION_0_MSK | REGION_1_MSK | REGION_2_MSK);
352-
353- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT0, MATRIX_AREA_SIZE_16M, REGION_3_MSK);
354- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT1, MATRIX_AREA_SIZE_16M, REGION_3_MSK);
355- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT2, MATRIX_AREA_SIZE_16M, REGION_3_MSK);
356- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_DDR_PORT3, MATRIX_AREA_SIZE_16M, REGION_3_MSK);
357-
358- mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_DDR_PORT0,
359- mtxRegionLansech(REGION_0, UPPER_AREA_SECURABLE) |
360- mtxRegionLansech(REGION_1, UPPER_AREA_SECURABLE) |
361- mtxRegionLansech(REGION_2, UPPER_AREA_SECURABLE) |
362- mtxRegionLansech(REGION_3, UPPER_AREA_SECURABLE),
363- mtxRegionRdnsech(REGION_0, NOT_SECURE_READ) |
364- mtxRegionRdnsech(REGION_1, NOT_SECURE_READ) |
365- mtxRegionRdnsech(REGION_2, NOT_SECURE_READ),
366- mtxRegionWrnsech(REGION_0, NOT_SECURE_WRITE) |
367- mtxRegionWrnsech(REGION_1, NOT_SECURE_WRITE) |
368- mtxRegionWrnsech(REGION_2, NOT_SECURE_WRITE));
369-
370- mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_DDR_PORT1,
371- mtxRegionLansech(REGION_0, UPPER_AREA_SECURABLE) |
372- mtxRegionLansech(REGION_1, UPPER_AREA_SECURABLE) |
373- mtxRegionLansech(REGION_2, UPPER_AREA_SECURABLE) |
374- mtxRegionLansech(REGION_3, UPPER_AREA_SECURABLE),
375- mtxRegionRdnsech(REGION_0, NOT_SECURE_READ) |
376- mtxRegionRdnsech(REGION_1, NOT_SECURE_READ) |
377- mtxRegionRdnsech(REGION_2, NOT_SECURE_READ),
378- mtxRegionWrnsech(REGION_0, NOT_SECURE_WRITE) |
379- mtxRegionWrnsech(REGION_1, NOT_SECURE_WRITE) |
380- mtxRegionWrnsech(REGION_2, NOT_SECURE_WRITE));
381-
382- mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_DDR_PORT2,
383- mtxRegionLansech(REGION_0, UPPER_AREA_SECURABLE) |
384- mtxRegionLansech(REGION_1, UPPER_AREA_SECURABLE) |
385- mtxRegionLansech(REGION_2, UPPER_AREA_SECURABLE) |
386- mtxRegionLansech(REGION_3, UPPER_AREA_SECURABLE),
387- mtxRegionRdnsech(REGION_0, NOT_SECURE_READ) |
388- mtxRegionRdnsech(REGION_1, NOT_SECURE_READ) |
389- mtxRegionRdnsech(REGION_2, NOT_SECURE_READ),
390- mtxRegionWrnsech(REGION_0, NOT_SECURE_WRITE) |
391- mtxRegionWrnsech(REGION_1, NOT_SECURE_WRITE) |
392- mtxRegionWrnsech(REGION_2, NOT_SECURE_WRITE));
393-
394- mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_DDR_PORT3,
395- mtxRegionLansech(REGION_0, UPPER_AREA_SECURABLE) |
396- mtxRegionLansech(REGION_1, UPPER_AREA_SECURABLE) |
397- mtxRegionLansech(REGION_2, UPPER_AREA_SECURABLE) |
398- mtxRegionLansech(REGION_3, UPPER_AREA_SECURABLE),
399- mtxRegionRdnsech(REGION_0, NOT_SECURE_READ) |
400- mtxRegionRdnsech(REGION_1, NOT_SECURE_READ) |
401- mtxRegionRdnsech(REGION_2, NOT_SECURE_READ),
402- mtxRegionWrnsech(REGION_0, NOT_SECURE_WRITE) |
403- mtxRegionWrnsech(REGION_1, NOT_SECURE_WRITE) |
404- mtxRegionWrnsech(REGION_2, NOT_SECURE_WRITE));
405-
406-#if !SAMA_USE_SDMMC
407-
408- /* Configure the SDMMCx regions as non secure.*/
409- mtxSetSlaveSplitAddr(MATRIX0, H64MX_SLAVE_SDMMC, MATRIX_AREA_SIZE_128M, REGION_1_MSK|REGION_2_MSK);
410- mtxConfigSlaveSec(MATRIX0, H64MX_SLAVE_SDMMC,
411- mtxRegionLansech(REGION_1, UPPER_AREA_SECURABLE) |
412- mtxRegionLansech(REGION_2, UPPER_AREA_SECURABLE),
413- mtxRegionRdnsech(REGION_1, NOT_SECURE_READ) |
414- mtxRegionRdnsech(REGION_2, NOT_SECURE_READ),
415- mtxRegionWrnsech(REGION_1, NOT_SECURE_WRITE) |
416- mtxRegionWrnsech(REGION_2, NOT_SECURE_WRITE));
417-#endif
418-
419- /* Mark the whole non secure memory region non executable
420- by the secure side, and set the Non-Secure access bit, so that
421- any access to this region is in the non-secure physical
422- space. This ensures the coherence of the cache between
423- secure and non secure accesses.*/
424- tt = (uint32_t *)(__get_TTBR0() & 0xFFFFC000);
425- for (d = ((uint32_t)NSEC_MEMORY_START_ADDR >> 20);
426- d < ((uint32_t)NSEC_MEMORY_END_ADDR >> 20); d += 1) {
427- MMU_SecureSection(tt + d, NON_SECURE);
428- MMU_XNSection(tt + d, NON_EXECUTE);
429- }
430-
431- /* The same, but for the AESB view of the DDR memory region.*/
432- for (d = ((uint32_t)(NSEC_MEMORY_START_ADDR + 0x20000000) >> 20);
433- d < ((uint32_t)(NSEC_MEMORY_END_ADDR + 0x20000000) >> 20); d += 1) {
434- MMU_SecureSection(tt + d, NON_SECURE);
435- MMU_XNSection(tt + d, NON_EXECUTE);
436- }
437- MMU_InvalidateTLB();
438-
439- /* Flush the modified MMU table.*/
440- cacheCleanRegion(tt, d * sizeof (uint32_t));
441- __DSB();
442- __ISB();
443-
444- /* Make sure that prio is NORMALPRIO.*/
445- chThdSetPriority(NORMALPRIO);
446-
447- /* Initialize the services.*/
448- for (i = 0; i < TS_MAX_SVCS; ++i) {
449- if (TS_CONF_TABLE(i)->arg == NULL)
450- continue;
451-
452- /* Check that the initialization of the TS_TABLE against TS_STATE_TABLE
453- has been set right.*/
454- if (TS_CONF_TABLE(i)->arg != TS_STATE(i)) {
455- chSysHalt("Bad TS_STATE setting in the services configuration table.");
456- }
457-
458- /* Check that the service priority has been set right.*/
459- if ((TS_CONF_TABLE(i)->prio <= NORMALPRIO) ||
460- (TS_CONF_TABLE(i)->prio >= HIGHPRIO)) {
461- chSysHalt("Bad prio setting in the services configuration table.");
462- }
463-
464- /* Create the service thread.*/
465- chThdCreate(TS_CONF_TABLE(i));
466- }
467-
468- /* Fast call services.*/
469- for (i = 0; TS_FC_CONF_TABLE(i)->name; ++i) {
470-
471- /* Check that the 'code' field of the
472- fast call table has been set right.*/
473- if ((TS_FC_CONF_TABLE(i)->code &~ TS_FASTCALL_MASK) != (uint32_t)i) {
474- chSysHalt("Bad 'code' setting in the fast call configuration table.");
475- }
476- }
477- ts_fc_configs_n = i;
478-
479- /* Register to the daemon services events. All flags.*/
480- chEvtRegister(&tsEventSource, &tsEventListener, EVT_DAEMON_REQ_ATN);
481-
482- /* Now set the priority at the max.*/
483- chThdSetPriority(HIGHPRIO);
484-
485- /* Allow non secure access to CP10 and CP11.*/
486- asm volatile (
487- "mrc p15, 0, r0, c1, c1, 2 \n"
488- "orr r0, r0, #0b11<<10 \n"
489- "mcr p15, 0, r0, c1, c1, 2 \n"
490- );
491-
492- /* Check if a fdt image exists at the start
493- of the non secure memory region.*/
494- if (uswap32(pfdt->magic) == FDT_MAGIC) {
495- uint32_t fdtsize;
496-
497- /* Detected a fdt structure.
498- Move it to the end of non secure area.*/
499- fdtsize = uswap32(pfdt->totalsize);
500- fdtsize = (fdtsize + 4095) &~ 4095;
501- moveto = (void *)(SEC_MEMORY_START_ADDR - fdtsize);
502- memmove(moveto, pfdt, fdtsize);
503-
504- /* Invalidate the original fdt image.*/
505- pfdt->magic = 0;
506- }
507-
508- /* Jump in the NON SECURE world.
509- This thread becomes the non secure environment as view by
510- the secure world.*/
511-
512- /* r2 address of the moved fdt, if any.*/
513- asm volatile (
514- "mov r2, %0 \n" :: "r" (moveto)
515- );
516-
517- _ns_trampoline(NSEC_MEMORY_START_ADDR + NSEC_MEMORY_EXE_OFFSET);
518-
519- /* It never goes here.*/
520-}
521-
522-/** @} */
--- trunk/os/common/ports/ARMCAx-TZ/chtssi.h (revision 13495)
+++ trunk/os/common/ports/ARMCAx-TZ/chtssi.h (nonexistent)
@@ -1,288 +0,0 @@
1-/*
2- ChibiOS - Copyright (C) 2006..2018 Isidoro Orabona.
3-
4- This file is part of ChibiOS.
5-
6- ChibiOS is free software; you can redistribute it and/or modify
7- it under the terms of the GNU General Public License as published by
8- the Free Software Foundation; either version 3 of the License, or
9- (at your option) any later version.
10-
11- ChibiOS is distributed in the hope that it will be useful,
12- but WITHOUT ANY WARRANTY; without even the implied warranty of
13- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14- GNU General Public License for more details.
15-
16- You should have received a copy of the GNU General Public License
17- along with this program. If not, see <http://www.gnu.org/licenses/>.
18-*/
19-
20-/**
21- * @file chtssi.h
22- * @brief tssi module macros and structures.
23- *
24- * @addtogroup TSSI
25- * @{
26- */
27-
28-#ifndef CHTSSI_H
29-#define CHTSSI_H
30-
31-#include "ch.h"
32-#include "ccportab.h"
33-
34-/*===========================================================================*/
35-/* Module constants. */
36-/*===========================================================================*/
37-
38-/* TSSI interface version. This code is returned also at run time by
39- calling the internal service TS_HND_VERSION.*/
40-#define TSSI_VERSION 0x01000000 /* 00 major, 000 minor, 000 build.*/
41-
42-/* Service registry errors as returned by smc.*/
43-#define SMC_SVC_OK (int32_t)0 /* No error.*/
44-#define SMC_SVC_INTR (int32_t)-4 /* Service interrupted.*/
45-#define SMC_SVC_NOENT (int32_t)-2 /* No existent service.*/
46-#define SMC_SVC_INVALID (int32_t)-22 /* Invalid service
47- parameter(s).*/
48-#define SMC_SVC_BADH (int32_t)-9 /* Invalid service handle.*/
49-#define SMC_SVC_EXIST (int32_t)-17 /* Service already exists.*/
50-#define SMC_SVC_NHND (int32_t)-23 /* No more services or
51- service resources.*/
52-#define SMC_SVC_BUSY (int32_t)-16 /* Service busy.*/
53-
54-/* Special trusted service handles.*/
55-#define TS_HND_TRAMP ((ts_state_t *)0) /* Trampoline service handle.*/
56-#define TS_HND_DISCOVERY ((ts_state_t *)1) /* Discovery service handle.*/
57-#define TS_HND_STQRY ((ts_state_t *)2) /* Query status service handle.*/
58-#define TS_HND_IDLE ((ts_state_t *)3) /* Idle service handle.*/
59-#define TS_HND_VERSION ((ts_state_t *)4) /* Get version service handle.*/
60-
61-/* Fast call service bitmask.
62- Service handles that contain this mask access to
63- the fast call table.*/
64-#define TS_FASTCALL_MASK 0xFFFF0000
65-
66-/* Services events event mask.*/
67-#define EVT_DAEMON_REQ_ATN EVENT_MASK(0)
68-
69-/*===========================================================================*/
70-/* Module pre-compile time settings. */
71-/*===========================================================================*/
72-
73-/**
74- * @name TSSI module settings.
75- * @{
76- */
77-
78-/**
79- * @brief Max number of services.
80- */
81-#define TS_MAX_SVCS 64
82-
83-/**
84- * @brief Max smc call timeout, in microseconds.
85- */
86-#define TS_MAX_TMO 10000
87-
88-/**
89- * @brief Secure and non secure memory address spaces.
90- */
91-#if !defined(NSEC_MEMORY_START_ADDR)
92-#define NSEC_MEMORY_START_ADDR ((uint8_t *)0x20000000)
93-#endif
94-#if !defined(NSEC_MEMORY_EXE_OFFSET)
95-#define NSEC_MEMORY_EXE_OFFSET ((uint32_t) 0x00000000)
96-#endif
97-#if !defined(NSEC_MEMORY_END_ADDR)
98-#define NSEC_MEMORY_END_ADDR ((uint8_t *)0x27000000)
99-#endif
100-#if !defined(SEC_MEMORY_START_ADDR)
101-#define SEC_MEMORY_START_ADDR ((uint8_t *)0x27000000)
102-#endif
103-#if !defined(SEC_MEMORY_SIZE)
104-#define SEC_MEMORY_SIZE ((size_t)0x1000000)
105-#endif
106-
107-/** @} */
108-
109-/*===========================================================================*/
110-/* Derived constants and error checks. */
111-/*===========================================================================*/
112-
113-/*===========================================================================*/
114-/* Module data structures and types. */
115-/*===========================================================================*/
116-typedef uint8_t * ts_params_area_t;
117-
118-typedef struct tssi_service_state {
119- uint32_t ts_status;
120- thread_reference_t ts_thdp;
121- ts_params_area_t ts_datap;
122- uint32_t ts_datalen;
123-} ts_state_t;
124-
125-/**
126- * @brief Fast call function.
127- */
128-typedef msg_t (*fcfunc_t)(ts_params_area_t ts_datap, uint32_t ts_datalen);
129-
130-/**
131- * @brief Type of a fast call descriptor.
132- */
133-typedef struct {
134- /**
135- * @brief Fast call service name.
136- */
137- const char *name;
138-
139- /* The code identifying the service.
140- Used for checking purpose, it must correspond to the
141- order that the service lists in the descriptor table.*/
142- uint32_t code;
143- /**
144- * @brief Fast call function pointer.
145- */
146- fcfunc_t funcp;
147-} fc_descriptor_t;
148-
149-/*===========================================================================*/
150-/* Module macros. */
151-/*===========================================================================*/
152-
153-/**
154- * @name Services tables definition macros.
155- * @{
156- */
157-
158-/**
159- * @brief Table of the runtime state of the services.
160- */
161-#define TS_STATE_TABLE \
162- ts_state_t ts_state[TS_MAX_SVCS] = {0};
163-
164-/**
165- * @brief Accessor to the runtime state of service i.
166- */
167-#define TS_STATE(i) (&ts_state[i])
168-
169-
170-/**
171- * @brief Start of user service table.
172- */
173-#define TS_CONF_TABLE_BEGIN \
174- const thread_descriptor_t ts_configs[TS_MAX_SVCS] = {
175-
176-/**
177- * @brief Entry of user services table.
178- */
179-#define TS_CONF_TABLE_ENTRY(name, wap, prio, funcp, tsstatep) \
180- {name, wap, ((stkalign_t *)(wap)) + (sizeof (wap) / sizeof(stkalign_t)), \
181- prio, funcp, tsstatep},
182-
183-/**
184- * @brief End of user services table.
185- */
186-#define TS_CONF_TABLE_END \
187-};
188-
189-/**
190- * @brief Accessor to the service table entry i.
191- */
192-#define TS_CONF_TABLE(i) (&ts_configs[i])
193-
194-/**
195- * @brief Trusted services base prio.
196- */
197-#define TS_BASE_PRIO (NORMALPRIO+1)
198-
199-/**
200- * @brief Set the service status.
201- * @note The service sets the status at a value representing the status
202- * of the completion of the request. This value is
203- * service dependent.
204- */
205-#define TS_SET_STATUS(svcp, newst) (((ts_state_t *)svcp)->ts_status = newst)
206-
207-/**
208- * @brief Get the pointer to the client shared memory.
209- * @note The client sets the data field at the start address
210- * of a shared memory allocated from the non secure memory space.
211- */
212-#define TS_GET_DATA(svcp) ((char *)((ts_state_t *)svcp)->ts_datap)
213-
214-/**
215- * @brief Get the size of the client shared memory.
216- * @note The client sets the datalen field to the size
217- * of a shared memory allocated from the non secure memory space.
218- */
219-#define TS_GET_DATALEN(svcp) (((ts_state_t *)svcp)->ts_datalen)
220-
221-/** @} */
222-
223-/**
224- * @name Fast call table definition macros.
225- * @note Fast call services run at max priority level, so it is
226- * mandatory that they last less time as possible.
227- * @note Fast call services should be invoked using
228- * the tsInvoke0 function in order to optimize the
229- * performances.
230- * @note Fast call services don't have a runtime state, so
231- * the response management is in charge to the higher levels.
232- * @{
233- */
234-
235-/**
236- * @brief Start of user fast call service table.
237- */
238-#define TS_FC_CONF_TABLE_BEGIN \
239- const fc_descriptor_t ts_fc_configs[] = {
240-
241-/**
242- * @brief Entry of user fast call services table.
243- */
244-#define TS_FC_CONF_TABLE_ENTRY(name, code, funcp) \
245- {name, code, funcp},
246-
247-/**
248- * @brief End of user fast call services table.
249- */
250-#define TS_FC_CONF_TABLE_END \
251-};
252-
253-/**
254- * @brief Accessor to the fast call service table entry i.
255- */
256-#define TS_FC_CONF_TABLE(i) (&ts_fc_configs[i])
257-
258-/**
259- * @brief Number of entries in the fast call service table.
260- */
261-#define TS_FC_CONF_TABLE_N (sizeof ts_fc_configs / sizeof ts_fc_configs[0])
262-
263-/** @} */
264-
265-/*===========================================================================*/
266-/* External declarations. */
267-/*===========================================================================*/
268-
269-#ifdef __cplusplus
270-extern "C" {
271-#endif
272- extern event_source_t tsEventSource;
273- extern ts_state_t ts_state[];
274- extern const thread_descriptor_t ts_configs[];
275- extern thread_reference_t _ns_thread;
276- CC_NO_RETURN void _ns_trampoline(uint8_t *addr);
277- CC_NO_RETURN void tssiInit(void);
278- msg_t tssiWaitRequest(ts_state_t *svcp);
279- bool tsIsAddrSpaceValid(void *addr, size_t size);
280-#ifdef __cplusplus
281-}
282-#endif
283-
284-/*===========================================================================*/
285-/* Module inline functions. */
286-/*===========================================================================*/
287-
288-#endif /* CHTSSI_H */
--- trunk/os/common/ports/ARMCAx-TZ/chcore.c (revision 13495)
+++ trunk/os/common/ports/ARMCAx-TZ/chcore.c (nonexistent)
@@ -1,54 +0,0 @@
1-/*
2- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
3-
4- This file is part of ChibiOS.
5-
6- ChibiOS is free software; you can redistribute it and/or modify
7- it under the terms of the GNU General Public License as published by
8- the Free Software Foundation; either version 3 of the License, or
9- (at your option) any later version.
10-
11- ChibiOS is distributed in the hope that it will be useful,
12- but WITHOUT ANY WARRANTY; without even the implied warranty of
13- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14- GNU General Public License for more details.
15-
16- You should have received a copy of the GNU General Public License
17- along with this program. If not, see <http://www.gnu.org/licenses/>.
18-*/
19-
20-/**
21- * @file ARMCMAx-TZ/chcore.c
22- * @brief ARMCMAx-TZ port code.
23- *
24- * @addtogroup ARMCMAx-TZ_CORE
25- * @{
26- */
27-
28-#include "ch.h"
29-
30-/*===========================================================================*/
31-/* Module local definitions. */
32-/*===========================================================================*/
33-
34-/*===========================================================================*/
35-/* Module exported variables. */
36-/*===========================================================================*/
37-
38-/*===========================================================================*/
39-/* Module local types. */
40-/*===========================================================================*/
41-
42-/*===========================================================================*/
43-/* Module local variables. */
44-/*===========================================================================*/
45-
46-/*===========================================================================*/
47-/* Module local functions. */
48-/*===========================================================================*/
49-
50-/*===========================================================================*/
51-/* Module exported functions. */
52-/*===========================================================================*/
53-
54-/** @} */
--- trunk/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s (revision 13495)
+++ trunk/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s (revision 13496)
@@ -44,9 +44,18 @@
4444 * RTOS-specific context offset.
4545 */
4646 #if defined(_CHIBIOS_RT_CONF_)
47+#if CH_CFG_USE_REGISTRY
48+#define CURRENT_OFFSET 20 /* ch.rlist.current */
49+#define CONTEXT_OFFSET 20
50+#else
51+#define CURRENT_OFFSET 12 /* nil.current */
4752 #define CONTEXT_OFFSET 12
53+#endif
54+
4855 #elif defined(_CHIBIOS_NIL_CONF_)
56+#define CURRENT_OFFSET 0
4957 #define CONTEXT_OFFSET 0
58+
5059 #else
5160 #error "invalid chconf.h"
5261 #endif
--- trunk/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s (revision 13495)
+++ trunk/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s (revision 13496)
@@ -44,9 +44,18 @@
4444 * RTOS-specific context offset.
4545 */
4646 #if defined(_CHIBIOS_RT_CONF_)
47+#if CH_CFG_USE_REGISTRY
48+#define CURRENT_OFFSET 20 /* ch.rlist.current */
49+#define CONTEXT_OFFSET 20
50+#else
51+#define CURRENT_OFFSET 12 /* nil.current */
4752 #define CONTEXT_OFFSET 12
53+#endif
54+
4855 #elif defined(_CHIBIOS_NIL_CONF_)
56+#define CURRENT_OFFSET 0
4957 #define CONTEXT_OFFSET 0
58+
5059 #else
5160 #error "invalid chconf.h"
5261 #endif
--- trunk/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s (revision 13495)
+++ trunk/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s (revision 13496)
@@ -44,9 +44,18 @@
4444 * RTOS-specific context offset.
4545 */
4646 #if defined(_CHIBIOS_RT_CONF_)
47+#if CH_CFG_USE_REGISTRY
48+#define CURRENT_OFFSET 20 /* ch.rlist.current */
49+#define CONTEXT_OFFSET 20
50+#else
51+#define CURRENT_OFFSET 12 /* nil.current */
4752 #define CONTEXT_OFFSET 12
53+#endif
54+
4855 #elif defined(_CHIBIOS_NIL_CONF_)
56+#define CURRENT_OFFSET 0
4957 #define CONTEXT_OFFSET 0
58+
5059 #else
5160 #error "invalid chconf.h"
5261 #endif
--- trunk/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s (revision 13495)
+++ trunk/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s (revision 13496)
@@ -44,9 +44,18 @@
4444 * RTOS-specific context offset.
4545 */
4646 #if defined(_CHIBIOS_RT_CONF_)
47+#if CH_CFG_USE_REGISTRY
48+#define CURRENT_OFFSET 20 /* ch.rlist.current */
49+#define CONTEXT_OFFSET 20
50+#else
51+#define CURRENT_OFFSET 12 /* nil.current */
4752 #define CONTEXT_OFFSET 12
53+#endif
54+
4855 #elif defined(_CHIBIOS_NIL_CONF_)
56+#define CURRENT_OFFSET 0
4957 #define CONTEXT_OFFSET 0
58+
5059 #else
5160 #error "invalid chconf.h"
5261 #endif
--- trunk/os/common/ports/ARMv8-M-ML/chcore.c (revision 13495)
+++ trunk/os/common/ports/ARMv8-M-ML/chcore.c (revision 13496)
@@ -57,26 +57,17 @@
5757 * @param[in] sp the stack pointer being switched-out
5858 * @return The stack pointer being switched-in.
5959 */
60-void *port_swap_stacks(void *sp) {
60+thread_t *port_schedule_next(void) {
6161 thread_t *ntp;
6262
63-#if CH_DBG_ENABLE_STACK_CHECK == TRUE
64- currp->ctx.splim = __get_PSPLIM();
65-#endif
66-
6763 chSysLock();
6864
6965 /* TODO statistics, tracing etc */
70- currp->ctx.sp = sp;
7166 ntp = chSchRunAhead();
7267
7368 chSysUnlock();
7469
75-#if CH_DBG_ENABLE_STACK_CHECK == TRUE
76- __set_PSPLIM(ntp->ctx.splim);
77-#endif
78-
79- return ntp->ctx.sp;
70+ return ntp;
8071 }
8172
8273 /**
--- trunk/os/common/ports/ARMv8-M-ML/chcore.h (revision 13495)
+++ trunk/os/common/ports/ARMv8-M-ML/chcore.h (revision 13496)
@@ -255,25 +255,14 @@
255255 * switch.
256256 */
257257 struct port_intctx {
258- uint32_t basepri;
259- uint32_t r4;
260- uint32_t r5;
261- uint32_t r6;
262- uint32_t r7;
263- uint32_t r8;
264- uint32_t r9;
265- uint32_t r10;
266- uint32_t r11;
267- uint32_t lr_exc;
268- /* Start of the hardware saved frame.*/
269- uint32_t r0;
270- uint32_t r1;
271- uint32_t r2;
272- uint32_t r3;
273- uint32_t r12;
274- uint32_t lr_thd;
275- uint32_t pc;
276- uint32_t xpsr;
258+ uint32_t r0;
259+ uint32_t r1;
260+ uint32_t r2;
261+ uint32_t r3;
262+ uint32_t r12;
263+ uint32_t lr_thd;
264+ uint32_t pc;
265+ uint32_t xpsr;
277266 };
278267
279268 /**
@@ -284,9 +273,19 @@
284273 */
285274 struct port_context {
286275 struct port_intctx *sp;
276+ uint32_t basepri;
277+ uint32_t r4;
278+ uint32_t r5;
279+ uint32_t r6;
280+ uint32_t r7;
281+ uint32_t r8;
282+ uint32_t r9;
283+ uint32_t r10;
284+ uint32_t r11;
287285 #if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || defined(__DOXYGEN__)
288286 uint32_t splim;
289287 #endif
288+ uint32_t lr_exc;
290289 };
291290
292291 #endif /* !defined(_FROM_ASM_) */
@@ -364,24 +363,24 @@
364363 */
365364 #if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || defined(__DOXYGEN__)
366365 #define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) do { \
366+ (tp)->ctx.sp = (struct port_intctx *)((uint8_t *)(wtop) - \
367+ sizeof (struct port_intctx)); \
368+ (tp)->ctx.basepri = CORTEX_BASEPRI_KERNEL; \
369+ (tp)->ctx.r5 = (uint32_t)(arg); \
370+ (tp)->ctx.r4 = (uint32_t)(pf); \
367371 (tp)->ctx.splim = (uint32_t)(wbase); \
368- (tp)->ctx.sp = (struct port_intctx *) \
369- ((uint8_t *)(wtop) - sizeof (struct port_intctx));\
370- (tp)->ctx.sp->basepri = CORTEX_BASEPRI_KERNEL; \
371- (tp)->ctx.sp->r5 = (uint32_t)(arg); \
372- (tp)->ctx.sp->r4 = (uint32_t)(pf); \
373- (tp)->ctx.sp->lr_exc = (uint32_t)0xFFFFFFFD; \
372+ (tp)->ctx.lr_exc = (uint32_t)0xFFFFFFFD; \
374373 (tp)->ctx.sp->xpsr = (uint32_t)0x01000000; \
375374 (tp)->ctx.sp->pc = (uint32_t)__port_thread_start; \
376375 } while (false)
377376 #else
378377 #define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) do { \
379- (tp)->ctx.sp = (struct port_intctx *) \
380- ((uint8_t *)(wtop) - sizeof (struct port_intctx));\
381- (tp)->ctx.sp->basepri = CORTEX_BASEPRI_KERNEL; \
382- (tp)->ctx.sp->r5 = (uint32_t)(arg); \
383- (tp)->ctx.sp->r4 = (uint32_t)(pf); \
384- (tp)->ctx.sp->lr_exc = (uint32_t)0xFFFFFFFD; \
378+ (tp)->ctx.sp = (struct port_intctx *)((uint8_t *)(wtop) - \
379+ sizeof (struct port_intctx)); \
380+ (tp)->ctx.basepri = CORTEX_BASEPRI_KERNEL; \
381+ (tp)->ctx.r5 = (uint32_t)(arg); \
382+ (tp)->ctx.r4 = (uint32_t)(pf); \
383+ (tp)->ctx.lr_exc = (uint32_t)0xFFFFFFFD; \
385384 (tp)->ctx.sp->xpsr = (uint32_t)0x01000000; \
386385 (tp)->ctx.sp->pc = (uint32_t)__port_thread_start; \
387386 } while (false)
@@ -459,7 +458,6 @@
459458 * @param[in] ntp the thread to be switched in
460459 * @param[in] otp the thread to be switched out
461460 */
462-#if (CH_DBG_ENABLE_STACK_CHECK == FALSE) || defined(__DOXYGEN__)
463461 #define port_switch(ntp, otp) do { \
464462 _dbg_leave_lock(); \
465463 register thread_t *_ntp asm ("r0") = (ntp); \
@@ -467,19 +465,6 @@
467465 asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp) : "memory"); \
468466 _dbg_enter_lock(); \
469467 } while (false)
470-#else
471-#define port_switch(ntp, otp) do { \
472- _dbg_leave_lock(); \
473- register thread_t *_ntp asm ("r0") = (ntp); \
474- register thread_t *_otp asm ("r1") = (otp); \
475- struct port_intctx *r13 = (struct port_intctx *)__get_PSP(); \
476- if ((stkalign_t *)(r13 - 1) < (otp)->wabase) { \
477- chSysHalt("stack overflow"); \
478- } \
479- asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp) : "memory"); \
480- _dbg_enter_lock(); \
481-} while (false)
482-#endif
483468
484469 /*===========================================================================*/
485470 /* External declarations. */
--- trunk/os/common/ports/e200/compilers/CW/chcoreasm.s (revision 13495)
+++ trunk/os/common/ports/e200/compilers/CW/chcoreasm.s (revision 13496)
@@ -51,13 +51,19 @@
5151
5252 #if !defined(__DOXYGEN__)
5353
54-/*
55- * RTOS-specific context offset.
56- */
5754 #if defined(_CHIBIOS_RT_CONF_)
55+#if CH_CFG_USE_REGISTRY
56+#define CURRENT_OFFSET 20 /* ch.rlist.current */
57+#define CONTEXT_OFFSET 20
58+#else
59+#define CURRENT_OFFSET 12 /* nil.current */
5860 #define CONTEXT_OFFSET 12
61+#endif
62+
5963 #elif defined(_CHIBIOS_NIL_CONF_)
64+#define CURRENT_OFFSET 0
6065 #define CONTEXT_OFFSET 0
66+
6167 #else
6268 #error "invalid chconf.h"
6369 #endif
@@ -80,8 +86,8 @@
8086 se_stw r0, 0(r1)
8187 e_stmw r14, 4(r1)
8288
83- se_stw r1, 12(r4)
84- se_lwz r1, 12(r3)
89+ se_stw r1, CONTEXT_OFFSET(r4)
90+ se_lwz r1, CONTEXT_OFFSET(r3)
8591
8692 e_lmw r14, 4(r1)
8793 se_lwz r0, 0(r1)
--- trunk/os/common/ports/e200/compilers/GHS/chcoreasm.s (revision 13495)
+++ trunk/os/common/ports/e200/compilers/GHS/chcoreasm.s (revision 13496)
@@ -52,9 +52,18 @@
5252 * RTOS-specific context offset.
5353 */
5454 #if defined(_CHIBIOS_RT_CONF_)
55+#if CH_CFG_USE_REGISTRY
56+#define CURRENT_OFFSET 20 /* ch.rlist.current */
57+#define CONTEXT_OFFSET 20
58+#else
59+#define CURRENT_OFFSET 12 /* nil.current */
5560 #define CONTEXT_OFFSET 12
61+#endif
62+
5663 #elif defined(_CHIBIOS_NIL_CONF_)
64+#define CURRENT_OFFSET 0
5765 #define CONTEXT_OFFSET 0
66+
5867 #else
5968 #error "invalid chconf.h"
6069 #endif
--- trunk/os/rt/include/chschd.h (revision 13495)
+++ trunk/os/rt/include/chschd.h (revision 13496)
@@ -142,12 +142,15 @@
142142 struct ch_thread {
143143 threads_queue_t queue; /**< @brief Threads queue header. */
144144 tprio_t prio; /**< @brief Thread priority. */
145- struct port_context ctx; /**< @brief Processor context. */
146145 #if (CH_CFG_USE_REGISTRY == TRUE) || defined(__DOXYGEN__)
147146 thread_t *newer; /**< @brief Newer registry element. */
148147 thread_t *older; /**< @brief Older registry element. */
149148 #endif
150149 /* End of the fields shared with the ReadyList structure. */
150+ /**
151+ * @brief Processor context.
152+ */
153+ struct port_context ctx;
151154 #if (CH_CFG_USE_REGISTRY == TRUE) || defined(__DOXYGEN__)
152155 /**
153156 * @brief Thread name or @p NULL.
@@ -351,8 +354,6 @@
351354 threads_queue_t queue; /**< @brief Threads queue. */
352355 tprio_t prio; /**< @brief This field must be
353356 initialized to zero. */
354- struct port_context ctx; /**< @brief Not used, present because
355- offsets. */
356357 #if (CH_CFG_USE_REGISTRY == TRUE) || defined(__DOXYGEN__)
357358 thread_t *newer; /**< @brief Newer registry element. */
358359 thread_t *older; /**< @brief Older registry element. */
--- trunk/readme.txt (revision 13495)
+++ trunk/readme.txt (revision 13496)
@@ -74,6 +74,8 @@
7474 *****************************************************************************
7575
7676 *** Next ***
77+- RT: Relocated the "ctx" field in the thread structure in order to save
78+ some RAM, it caused unused space in the "ch" variable.
7779 - EX: Added support for ADXL355 Low Noise, Low Drift, Low Power, 3-Axis
7880 MEMS Accelerometers.
7981 - NEW: Safer messages mechanism for sandboxes (to be backported to 20.3.1).
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