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chibios: Commit


Commit MetaInfo

Revision13802 (tree)
Time2020-08-01 18:54:27
Authorgdisirio

Log Message

ARM port updated to latest spec.

Change Summary

Incremental Difference

--- trunk/demos/LPC21xx/RT-LPC214x-OLIMEX/chconf.h (revision 13801)
+++ trunk/demos/LPC21xx/RT-LPC214x-OLIMEX/chconf.h (revision 13802)
@@ -625,7 +625,7 @@
625625 * tickless mode.
626626 */
627627 #if !defined(CH_DBG_THREADS_PROFILING)
628-#define CH_DBG_THREADS_PROFILING TRUE
628+#define CH_DBG_THREADS_PROFILING FALSE
629629 #endif
630630
631631 /** @} */
--- trunk/os/common/ports/ARM/chcore.h (revision 13801)
+++ trunk/os/common/ports/ARM/chcore.h (revision 13802)
@@ -28,11 +28,32 @@
2828 #ifndef CHCORE_H
2929 #define CHCORE_H
3030
31+/* Inclusion of the ARM implementation specific parameters.*/
32+#include "armparams.h"
33+
3134 /*===========================================================================*/
3235 /* Module constants. */
3336 /*===========================================================================*/
3437
38+/* The following code is not processed when the file is included from an
39+ asm module because those intrinsic macros are not necessarily defined
40+ by the assembler too.*/
41+#if !defined(_FROM_ASM_)
42+
3543 /**
44+ * @brief Compiler name and version.
45+ */
46+#if defined(__GNUC__) || defined(__DOXYGEN__)
47+#define PORT_COMPILER_NAME "GCC " __VERSION__
48+
49+#else
50+#error "unsupported compiler"
51+#endif
52+
53+#endif /* !defined(_FROM_ASM_) */
54+/** @} */
55+
56+/**
3657 * @name Port Capabilities and Constants
3758 * @{
3859 */
@@ -61,47 +82,82 @@
6182 /** @} */
6283
6384 /**
64- * @name Architecture and Compiler
85+ * @name ARM variants
6586 * @{
6687 */
88+#define ARM_CORE_ARM7TDMI 7
89+#define ARM_CORE_ARM9 9
90+#define ARM_CORE_CORTEX_A5 105
91+#define ARM_CORE_CORTEX_A7 107
92+#define ARM_CORE_CORTEX_A8 108
93+#define ARM_CORE_CORTEX_A9 109
94+/** @} */
95+
6796 /**
97+ * @name Architecture
98+ * @{
99+ */
100+/**
68101 * @brief Macro defining a generic ARM architecture.
69102 */
70103 #define PORT_ARCHITECTURE_ARM
71104
72-/* The following code is not processed when the file is included from an
73- asm module because those intrinsic macros are not necessarily defined
74- by the assembler too.*/
75-#if !defined(_FROM_ASM_)
105+/* ARM core check.*/
106+#if (ARM_CORE == ARM_CORE_ARM7TDMI) || defined(__DOXYGEN__)
107+ #define PORT_ARCHITECTURE_ARM_ARM7
108+ #define PORT_ARCHITECTURE_NAME "ARMv4T"
109+ #define PORT_CORE_VARIANT_NAME "ARM7"
76110
77-/**
78- * @brief Compiler name and version.
79- */
80-#if defined(__GNUC__) || defined(__DOXYGEN__)
81-#define PORT_COMPILER_NAME "GCC " __VERSION__
111+#elif ARM_CORE == ARM_CORE_ARM9
112+ #define PORT_ARCHITECTURE_ARM_ARM9
113+ #define PORT_ARCHITECTURE_NAME "ARMv5T"
114+ #define PORT_CORE_VARIANT_NAME "ARM9"
82115
116+#elif ARM_CORE == ARM_CORE_CORTEX_A5
117+ #define PORT_ARCHITECTURE_ARM_CORTEXA5
118+ #define PORT_ARCHITECTURE_NAME "ARMv7"
119+ #define PORT_CORE_VARIANT_NAME "ARM Cortex-A5"
120+
121+#elif ARM_CORE == ARM_CORE_CORTEX_A7
122+ #define PORT_ARCHITECTURE_ARM_CORTEXA5
123+ #define PORT_ARCHITECTURE_NAME "ARMv7"
124+ #define PORT_CORE_VARIANT_NAME "ARM Cortex-A7"
125+
126+#elif ARM_CORE == ARM_CORE_CORTEX_A8
127+ #define PORT_ARCHITECTURE_ARM_CORTEXA8
128+ #define PORT_ARCHITECTURE_NAME "ARMv7"
129+ #define PORT_CORE_VARIANT_NAME "ARM Cortex-A8"
130+
131+#elif ARM_CORE == ARM_CORE_CORTEX_A9
132+ #define PORT_ARCHITECTURE_ARM_CORTEXA9
133+ #define PORT_ARCHITECTURE_NAME "ARMv7"
134+ #define PORT_CORE_VARIANT_NAME "ARM Cortex-A9"
135+
83136 #else
84-#error "unsupported compiler"
137+ #error "unknown or unsupported ARM core"
85138 #endif
86139
87-#endif /* !defined(_FROM_ASM_) */
88-/** @} */
140+#if defined(THUMB_PRESENT)
141+ #if defined(THUMB_NO_INTERWORKING)
142+ #define PORT_INFO "Pure THUMB mode"
143+ #else
144+ #define PORT_INFO "Interworking mode"
145+ #endif
146+#else
147+ #define PORT_INFO "Pure ARM mode"
148+#endif
89149
90-/**
91- * @name ARM variants
92- * @{
93- */
94-#define ARM_CORE_ARM7TDMI 7
95-#define ARM_CORE_ARM9 9
96-#define ARM_CORE_CORTEX_A5 105
97-#define ARM_CORE_CORTEX_A7 107
98-#define ARM_CORE_CORTEX_A8 108
99-#define ARM_CORE_CORTEX_A9 109
150+#if ARM_CORE < 100
151+ #define ARM_CORE_CLASSIC 1
152+ #define ARM_CORE_CORTEX_A 0
153+#elif ARM_CORE < 200
154+ #define ARM_CORE_CLASSIC 0
155+ #define ARM_CORE_CORTEX_A 1
156+#else
157+ #error "unknown or unsupported ARM core"
158+#endif
100159 /** @} */
101160
102-/* Inclusion of the ARM implementation specific parameters.*/
103-#include "armparams.h"
104-
105161 /*===========================================================================*/
106162 /* Module pre-compile time settings. */
107163 /*===========================================================================*/
@@ -149,66 +205,6 @@
149205 /* Derived constants and error checks. */
150206 /*===========================================================================*/
151207
152-#if ARM_CORE < 100
153-#define ARM_CORE_CLASSIC 1
154-#define ARM_CORE_CORTEX_A 0
155-#elif ARM_CORE < 200
156-#define ARM_CORE_CLASSIC 0
157-#define ARM_CORE_CORTEX_A 1
158-#else
159-#endif
160-
161-/* The following code is not processed when the file is included from an
162- asm module.*/
163-#if !defined(_FROM_ASM_)
164-
165-/* ARM core check.*/
166-#if (ARM_CORE == ARM_CORE_ARM7TDMI) || defined(__DOXYGEN__)
167-#define PORT_ARCHITECTURE_ARM_ARM7
168-#define PORT_ARCHITECTURE_NAME "ARMv4T"
169-#define PORT_CORE_VARIANT_NAME "ARM7"
170-
171-#elif ARM_CORE == ARM_CORE_ARM9
172-#define PORT_ARCHITECTURE_ARM_ARM9
173-#define PORT_ARCHITECTURE_NAME "ARMv5T"
174-#define PORT_CORE_VARIANT_NAME "ARM9"
175-
176-#elif ARM_CORE == ARM_CORE_CORTEX_A5
177-#define PORT_ARCHITECTURE_ARM_CORTEXA5
178-#define PORT_ARCHITECTURE_NAME "ARMv7"
179-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A5"
180-
181-#elif ARM_CORE == ARM_CORE_CORTEX_A7
182-#define PORT_ARCHITECTURE_ARM_CORTEXA5
183-#define PORT_ARCHITECTURE_NAME "ARMv7"
184-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A7"
185-
186-#elif ARM_CORE == ARM_CORE_CORTEX_A8
187-#define PORT_ARCHITECTURE_ARM_CORTEXA8
188-#define PORT_ARCHITECTURE_NAME "ARMv7"
189-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A8"
190-
191-#elif ARM_CORE == ARM_CORE_CORTEX_A9
192-#define PORT_ARCHITECTURE_ARM_CORTEXA9
193-#define PORT_ARCHITECTURE_NAME "ARMv7"
194-#define PORT_CORE_VARIANT_NAME "ARM Cortex-A9"
195-
196-#else
197-#error "unknown or unsupported ARM core"
198-#endif
199-
200-#if defined(THUMB_PRESENT)
201-#if defined(THUMB_NO_INTERWORKING)
202-#define PORT_INFO "Pure THUMB mode"
203-#else
204-#define PORT_INFO "Interworking mode"
205-#endif
206-#else
207-#define PORT_INFO "Pure ARM mode"
208-#endif
209-
210-#endif /* !defined(_FROM_ASM_) */
211-
212208 /*===========================================================================*/
213209 /* Module data structures and types. */
214210 /*===========================================================================*/
@@ -276,6 +272,18 @@
276272 /*===========================================================================*/
277273
278274 /**
275+ * @brief Priority level verification macro.
276+ * @note Not applicable in this architecture.
277+ */
278+#define PORT_IRQ_IS_VALID_PRIORITY(n) false
279+
280+/**
281+ * @brief Priority level verification macro.
282+ * @note Not applicable in this architecture.
283+ */
284+#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) false
285+
286+/**
279287 * @brief Platform dependent part of the @p chThdCreateI() API.
280288 * @details This code usually setup the context switching frame represented
281289 * by an @p port_intctx structure.
@@ -285,7 +293,7 @@
285293 sizeof (struct port_intctx)); \
286294 (tp)->ctx.sp->r4 = (regarm_t)(pf); \
287295 (tp)->ctx.sp->r5 = (regarm_t)(arg); \
288- (tp)->ctx.sp->lr = (regarm_t)(_port_thread_start); \
296+ (tp)->ctx.sp->lr = (regarm_t)(__port_thread_start); \
289297 }
290298
291299 /**
@@ -364,10 +372,10 @@
364372 register struct port_intctx *r13 asm ("r13"); \
365373 if ((stkalign_t *)(r13 - 1) < otp->wabase) \
366374 chSysHalt("stack overflow"); \
367- _port_switch_thumb(ntp, otp); \
375+ __port_switch_thumb(ntp, otp); \
368376 }
369377 #else
370-#define port_switch(ntp, otp) _port_switch_thumb(ntp, otp)
378+#define port_switch(ntp, otp) __port_switch_thumb(ntp, otp)
371379 #endif
372380
373381 #else /* !defined(THUMB) */
@@ -377,10 +385,10 @@
377385 register struct port_intctx *r13 asm ("r13"); \
378386 if ((stkalign_t *)(r13 - 1) < otp->wabase) \
379387 chSysHalt("stack overflow"); \
380- _port_switch_arm(ntp, otp); \
388+ __port_switch_arm(ntp, otp); \
381389 }
382390 #else
383-#define port_switch(ntp, otp) _port_switch_arm(ntp, otp)
391+#define port_switch(ntp, otp) __port_switch_arm(ntp, otp)
384392 #endif
385393
386394 #endif /* !defined(THUMB) */
@@ -393,14 +401,14 @@
393401 extern "C" {
394402 #endif
395403 #if defined(THUMB_PRESENT)
396- syssts_t _port_get_cpsr(void);
404+ syssts_t __port_get_cpsr(void);
397405 #endif
398406 #if defined(THUMB)
399- void _port_switch_thumb(thread_t *ntp, thread_t *otp);
407+ void __port_switch_thumb(thread_t *ntp, thread_t *otp);
400408 #else
401- void _port_switch_arm(thread_t *ntp, thread_t *otp);
409+ void __port_switch_arm(thread_t *ntp, thread_t *otp);
402410 #endif
403- void _port_thread_start(void);
411+ void __port_thread_start(void);
404412 #ifdef __cplusplus
405413 }
406414 #endif
@@ -412,8 +420,9 @@
412420 /**
413421 * @brief Port-related initialization code.
414422 */
415-static inline void port_init(void) {
423+static inline void port_init(os_instance_t *oip) {
416424
425+ (void)oip;
417426 }
418427
419428 /**
@@ -425,7 +434,7 @@
425434 syssts_t sts;
426435
427436 #if defined(THUMB)
428- sts = _port_get_cpsr();
437+ sts = __port_get_cpsr();
429438 #else
430439 __asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
431440 #endif
@@ -459,7 +468,7 @@
459468 syssts_t sts;
460469
461470 #if defined(THUMB)
462- sts = _port_get_cpsr();
471+ sts = __port_get_cpsr();
463472 #else
464473 __asm volatile ("mrs %[p0], CPSR" : [p0] "=r" (sts) :);
465474 #endif
@@ -477,7 +486,7 @@
477486 static inline void port_lock(void) {
478487
479488 #if defined(THUMB)
480- __asm volatile ("bl _port_lock_thumb" : : : "r3", "lr", "memory");
489+ __asm volatile ("bl __port_lock_thumb" : : : "r3", "lr", "memory");
481490 #else
482491 __asm volatile ("msr CPSR_c, #0x9F" : : : "memory");
483492 #endif
@@ -490,7 +499,7 @@
490499 static inline void port_unlock(void) {
491500
492501 #if defined(THUMB)
493- __asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr", "memory");
502+ __asm volatile ("bl __port_unlock_thumb" : : : "r3", "lr", "memory");
494503 #else
495504 __asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
496505 #endif
@@ -521,7 +530,7 @@
521530 static inline void port_disable(void) {
522531
523532 #if defined(THUMB)
524- __asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory");
533+ __asm volatile ("bl __port_disable_thumb" : : : "r3", "lr", "memory");
525534 #else
526535 __asm volatile ("mrs r3, CPSR \n\t"
527536 "orr r3, #0x80 \n\t"
@@ -540,7 +549,7 @@
540549 static inline void port_suspend(void) {
541550
542551 #if defined(THUMB)
543- __asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr", "memory");
552+ __asm volatile ("bl __port_suspend_thumb" : : : "r3", "lr", "memory");
544553 #else
545554 __asm volatile ("msr CPSR_c, #0x9F" : : : "memory");
546555 #endif
@@ -553,7 +562,7 @@
553562 static inline void port_enable(void) {
554563
555564 #if defined(THUMB)
556- __asm volatile ("bl _port_enable_thumb" : : : "r3", "lr", "memory");
565+ __asm volatile ("bl __port_enable_thumb" : : : "r3", "lr", "memory");
557566 #else
558567 __asm volatile ("msr CPSR_c, #0x1F" : : : "memory");
559568 #endif
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