Updated clock handling.
@@ -256,14 +256,7 @@ | ||
256 | 256 | usart_stop(uartp); |
257 | 257 | |
258 | 258 | /* Baud rate setting.*/ |
259 | -#if STM32_HAS_USART6 | |
260 | - if ((uartp->usart == USART1) || (uartp->usart == USART6)) | |
261 | -#else | |
262 | - if (uartp->usart == USART1) | |
263 | -#endif | |
264 | - fck = STM32_PCLK2 / uartp->config->speed; | |
265 | - else | |
266 | - fck = STM32_PCLK1 / uartp->config->speed; | |
259 | + fck = (uint32_t)(uartp->clock / uartp->config->speed); | |
267 | 260 | |
268 | 261 | /* Correcting USARTDIV when oversampling by 8 instead of 16. |
269 | 262 | Fraction is still 4 bits wide, but only lower 3 bits used. |
@@ -575,6 +568,7 @@ | ||
575 | 568 | #if STM32_UART_USE_USART1 |
576 | 569 | uartObjectInit(&UARTD1); |
577 | 570 | UARTD1.usart = USART1; |
571 | + UARTD1.clock = STM32_PCLK2; | |
578 | 572 | UARTD1.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
579 | 573 | UARTD1.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
580 | 574 | UARTD1.dmarx = NULL; |
@@ -584,6 +578,7 @@ | ||
584 | 578 | #if STM32_UART_USE_USART2 |
585 | 579 | uartObjectInit(&UARTD2); |
586 | 580 | UARTD2.usart = USART2; |
581 | + UARTD2.clock = STM32_PCLK1; | |
587 | 582 | UARTD2.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
588 | 583 | UARTD2.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
589 | 584 | UARTD2.dmarx = NULL; |
@@ -593,6 +588,7 @@ | ||
593 | 588 | #if STM32_UART_USE_USART3 |
594 | 589 | uartObjectInit(&UARTD3); |
595 | 590 | UARTD3.usart = USART3; |
591 | + UARTD3.clock = STM32_PCLK1; | |
596 | 592 | UARTD3.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
597 | 593 | UARTD3.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
598 | 594 | UARTD3.dmarx = NULL; |
@@ -602,6 +598,7 @@ | ||
602 | 598 | #if STM32_UART_USE_UART4 |
603 | 599 | uartObjectInit(&UARTD4); |
604 | 600 | UARTD4.usart = UART4; |
601 | + UARTD4.clock = STM32_PCLK1; | |
605 | 602 | UARTD4.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
606 | 603 | UARTD4.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
607 | 604 | UARTD4.dmarx = NULL; |
@@ -611,6 +608,7 @@ | ||
611 | 608 | #if STM32_UART_USE_UART5 |
612 | 609 | uartObjectInit(&UARTD5); |
613 | 610 | UARTD5.usart = UART5; |
611 | + UARTD5.clock = STM32_PCLK1; | |
614 | 612 | UARTD5.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
615 | 613 | UARTD5.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
616 | 614 | UARTD5.dmarx = NULL; |
@@ -620,6 +618,7 @@ | ||
620 | 618 | #if STM32_UART_USE_USART6 |
621 | 619 | uartObjectInit(&UARTD6); |
622 | 620 | UARTD6.usart = USART6; |
621 | + UARTD6.clock = STM32_PCLK2; | |
623 | 622 | UARTD6.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
624 | 623 | UARTD6.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
625 | 624 | UARTD6.dmarx = NULL; |
@@ -629,6 +628,7 @@ | ||
629 | 628 | #if STM32_UART_USE_UART7 |
630 | 629 | uartObjectInit(&UARTD7); |
631 | 630 | UARTD7.usart = UART7; |
631 | + UARTD7.clock = STM32_PCLK1; | |
632 | 632 | UARTD7.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
633 | 633 | UARTD7.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
634 | 634 | UARTD7.dmarx = NULL; |
@@ -638,6 +638,7 @@ | ||
638 | 638 | #if STM32_UART_USE_UART8 |
639 | 639 | uartObjectInit(&UARTD8); |
640 | 640 | UARTD8.usart = UART8; |
641 | + UARTD8.clock = STM32_PCLK1; | |
641 | 642 | UARTD8.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
642 | 643 | UARTD8.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
643 | 644 | UARTD8.dmarx = NULL; |
@@ -647,6 +648,7 @@ | ||
647 | 648 | #if STM32_UART_USE_UART9 |
648 | 649 | uartObjectInit(&UARTD9); |
649 | 650 | UARTD9.usart = UART9; |
651 | + UARTD9.clock = STM32_PCLK2; | |
650 | 652 | UARTD9.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
651 | 653 | UARTD9.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
652 | 654 | UARTD9.dmarx = NULL; |
@@ -656,6 +658,7 @@ | ||
656 | 658 | #if STM32_UART_USE_UART10 |
657 | 659 | uartObjectInit(&UARTD10); |
658 | 660 | UARTD10.usart = UART10; |
661 | + UARTD10.clock = STM32_PCLK2; | |
659 | 662 | UARTD10.dmarxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
660 | 663 | UARTD10.dmatxmode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE; |
661 | 664 | UARTD10.dmarx = NULL; |
@@ -872,6 +872,10 @@ | ||
872 | 872 | */ |
873 | 873 | USART_TypeDef *usart; |
874 | 874 | /** |
875 | + * @brief Clock frequency for the associated USART/UART. | |
876 | + */ | |
877 | + uint32_t clock; | |
878 | + /** | |
875 | 879 | * @brief Receive DMA mode bit mask. |
876 | 880 | */ |
877 | 881 | uint32_t dmarxmode; |