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chibios: Commit


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Revision13887 (tree)
Time2020-10-13 17:46:32
Authorgdisirio

Log Message

Fixed bug #1127.

Change Summary

Incremental Difference

--- branches/stable_20.3.x/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h (revision 13886)
+++ branches/stable_20.3.x/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h (revision 13887)
@@ -1,5 +1,5 @@
11 /*
2- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
2+ ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
33
44 Licensed under the Apache License, Version 2.0 (the "License");
55 you may not use this file except in compliance with the License.
@@ -694,9 +694,9 @@
694694 *
695695 * @api
696696 */
697-#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETHMACEN | \
698- RCC_AHB1ENR_ETHMACTXEN | \
699- RCC_AHB1ENR_ETHMACRXEN, lp)
697+#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETH1MACEN | \
698+ RCC_AHB1ENR_ETH1TXEN | \
699+ RCC_AHB1ENR_ETH1RXEN, lp)
700700
701701 /**
702702 * @brief Disables the ETH peripheral clock.
@@ -703,9 +703,9 @@
703703 *
704704 * @api
705705 */
706-#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \
707- RCC_AHB1ENR_ETHMACTXEN | \
708- RCC_AHB1ENR_ETHMACRXEN)
706+#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETH1MACEN | \
707+ RCC_AHB1ENR_ETH1TXEN | \
708+ RCC_AHB1ENR_ETH1RXEN)
709709
710710 /**
711711 * @brief Resets the ETH peripheral.
@@ -712,7 +712,7 @@
712712 *
713713 * @api
714714 */
715-#define rccResetETH() rccResetAHB1(RCC_AHB1RSTR_ETHMACRST)
715+#define rccResetETH() rccResetAHB1(RCC_AHB1RSTR_ETH1MACRST)
716716 /** @} */
717717
718718 /**
@@ -1013,7 +1013,7 @@
10131013 *
10141014 * @api
10151015 */
1016-#define rccEnableSDMMC2(lp) rccEnableAHB3(RCC_AHB3ENR_SDMMC2EN, lp)
1016+#define rccEnableSDMMC2(lp) rccEnableAHB2(RCC_AHB2ENR_SDMMC2EN, lp)
10171017
10181018 /**
10191019 * @brief Disables the SDMMC2 peripheral clock.
@@ -1020,7 +1020,7 @@
10201020 *
10211021 * @api
10221022 */
1023-#define rccDisableSDMMC2() rccDisableAHB3(RCC_AHB3ENR_SDMMC2EN)
1023+#define rccDisableSDMMC2() rccDisableAHB2(RCC_AHB2ENR_SDMMC2EN)
10241024
10251025 /**
10261026 * @brief Resets the SDMMC2 peripheral.
@@ -1027,7 +1027,7 @@
10271027 *
10281028 * @api
10291029 */
1030-#define rccResetSDMMC2() rccResetAHB3(RCC_AHB3RSTR_SDMMC2RST)
1030+#define rccResetSDMMC2() rccResetAHB2(RCC_AHB2RSTR_SDMMC2RST)
10311031 /** @} */
10321032
10331033 /**
@@ -1690,30 +1690,6 @@
16901690 /** @} */
16911691
16921692 /**
1693- * @brief Enables the LPUART1 peripheral clock.
1694- *
1695- * @param[in] lp low power enable flag
1696- *
1697- * @api
1698- */
1699-#define rccEnableLPUART1(lp) rccEnableAPB4(RCC_APB4ENR_LPUART1EN, lp)
1700-
1701-/**
1702- * @brief Disables the LPUART1 peripheral clock.
1703- *
1704- * @api
1705- */
1706-#define rccDisableLPUART1() rccDisableAPB4(RCC_APB4ENR_LPUART1EN)
1707-
1708-/**
1709- * @brief Resets the LPUART1 peripheral.
1710- *
1711- * @api
1712- */
1713-#define rccResetLPUART1() rccResetAPB4(RCC_APB4RSTR_LPUART1RST)
1714-/** @} */
1715-
1716-/**
17171693 * @name LTDC peripheral specific RCC operations
17181694 * @{
17191695 */
--- branches/stable_20.3.x/readme.txt (revision 13886)
+++ branches/stable_20.3.x/readme.txt (revision 13887)
@@ -74,6 +74,7 @@
7474 *****************************************************************************
7575
7676 *** 20.3.3 ***
77+- FIX: Fixed wrong SDMMC RCC macros for STM32H7xx (bug #1127).
7778 - FIX: Fixed STM32 ADCv3 hangin on initialization (bug #1126).
7879 - FIX: Fixed I2S-related problems in STM32F4xx registry (bug #1124).
7980 - FIX: Fixed STM32 EXTIv1 driver unable to enable/disable fixed lines
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