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chibios: Commit


Commit MetaInfo

Revision13888 (tree)
Time2020-10-13 17:46:38
Authorgdisirio

Log Message

Fixed bug #1127.

Change Summary

Incremental Difference

--- branches/stable_19.1.x/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h (revision 13887)
+++ branches/stable_19.1.x/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h (revision 13888)
@@ -1,5 +1,5 @@
11 /*
2- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
2+ ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
33
44 Licensed under the Apache License, Version 2.0 (the "License");
55 you may not use this file except in compliance with the License.
@@ -589,6 +589,29 @@
589589 * @api
590590 */
591591 #define rccResetDMA2() rccResetAHB1(RCC_AHB1RSTR_DMA2RST)
592+
593+/**
594+ * @brief Enables the MDMA peripheral clock.
595+ *
596+ * @param[in] lp low power enable flag
597+ *
598+ * @api
599+ */
600+#define rccEnableMDMA(lp) rccEnableAHB3(RCC_AHB3ENR_MDMAEN, lp)
601+
602+/**
603+ * @brief Disables the MDMA peripheral clock.
604+ *
605+ * @api
606+ */
607+#define rccDisableMDMA() rccDisableAHB3(RCC_AHB3ENR_MDMAEN)
608+
609+/**
610+ * @brief Resets the MDMA peripheral.
611+ *
612+ * @api
613+ */
614+#define rccResetMDMA() rccResetAHB3(RCC_AHB3ENR_MDMARST)
592615 /** @} */
593616
594617 /**
@@ -671,9 +694,9 @@
671694 *
672695 * @api
673696 */
674-#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETHMACEN | \
675- RCC_AHB1ENR_ETHMACTXEN | \
676- RCC_AHB1ENR_ETHMACRXEN, lp)
697+#define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETH1MACEN | \
698+ RCC_AHB1ENR_ETH1TXEN | \
699+ RCC_AHB1ENR_ETH1RXEN, lp)
677700
678701 /**
679702 * @brief Disables the ETH peripheral clock.
@@ -680,9 +703,9 @@
680703 *
681704 * @api
682705 */
683-#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \
684- RCC_AHB1ENR_ETHMACTXEN | \
685- RCC_AHB1ENR_ETHMACRXEN)
706+#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETH1MACEN | \
707+ RCC_AHB1ENR_ETH1TXEN | \
708+ RCC_AHB1ENR_ETH1RXEN)
686709
687710 /**
688711 * @brief Resets the ETH peripheral.
@@ -689,10 +712,38 @@
689712 *
690713 * @api
691714 */
692-#define rccResetETH() rccResetAHB1(RCC_AHB1RSTR_ETHMACRST)
715+#define rccResetETH() rccResetAHB1(RCC_AHB1RSTR_ETH1MACRST)
693716 /** @} */
694717
695718 /**
719+ * @name FDCAN peripherals specific RCC operations
720+ * @{
721+ */
722+/**
723+ * @brief Enables the FDCAN peripheral clock.
724+ *
725+ * @param[in] lp low power enable flag
726+ *
727+ * @api
728+ */
729+#define rccEnableFDCAN(lp) rccEnableAPB1H(RCC_APB1HENR_FDCANEN, lp)
730+
731+/**
732+ * @brief Disables the FDCAN peripheral clock.
733+ *
734+ * @api
735+ */
736+#define rccDisableFDCAN() rccDisableAPB1H(RCC_APB1HENR_FDCANEN)
737+
738+/**
739+ * @brief Resets the FDCAN peripheral.
740+ *
741+ * @api
742+ */
743+#define rccResetFDCAN() rccResetAPB1H(RCC_APB1HRSTR_FDCANRST)
744+/** @} */
745+
746+/**
696747 * @name I2C peripherals specific RCC operations
697748 * @{
698749 */
@@ -901,6 +952,34 @@
901952 /** @} */
902953
903954 /**
955+ * @name RNG peripherals specific RCC operations
956+ * @{
957+ */
958+/**
959+ * @brief Enables the RNG peripheral clock.
960+ *
961+ * @param[in] lp low power enable flag
962+ *
963+ * @api
964+ */
965+#define rccEnableRNG(lp) rccEnableAHB2(RCC_AHB2ENR_RNGEN, lp)
966+
967+/**
968+ * @brief Disables the RNG peripheral clock.
969+ *
970+ * @api
971+ */
972+#define rccDisableRNG() rccDisableAHB2(RCC_AHB2ENR_RNGEN)
973+
974+/**
975+ * @brief Resets the RNG peripheral.
976+ *
977+ * @api
978+ */
979+#define rccResetRNG() rccResetAHB2(RCC_AHB2RSTR_RNGRST)
980+/** @} */
981+
982+/**
904983 * @name SDMMC peripheral specific RCC operations
905984 * @{
906985 */
@@ -934,7 +1013,7 @@
9341013 *
9351014 * @api
9361015 */
937-#define rccEnableSDMMC2(lp) rccEnableAHB3(RCC_AHB3ENR_SDMMC2EN, lp)
1016+#define rccEnableSDMMC2(lp) rccEnableAHB2(RCC_AHB2ENR_SDMMC2EN, lp)
9381017
9391018 /**
9401019 * @brief Disables the SDMMC2 peripheral clock.
@@ -941,7 +1020,7 @@
9411020 *
9421021 * @api
9431022 */
944-#define rccDisableSDMMC2() rccDisableAHB3(RCC_AHB3ENR_SDMMC2EN)
1023+#define rccDisableSDMMC2() rccDisableAHB2(RCC_AHB2ENR_SDMMC2EN)
9451024
9461025 /**
9471026 * @brief Resets the SDMMC2 peripheral.
@@ -948,7 +1027,7 @@
9481027 *
9491028 * @api
9501029 */
951-#define rccResetSDMMC2() rccResetAHB3(RCC_AHB3RSTR_SDMMC2RST)
1030+#define rccResetSDMMC2() rccResetAHB2(RCC_AHB2RSTR_SDMMC2RST)
9521031 /** @} */
9531032
9541033 /**
--- branches/stable_19.1.x/readme.txt (revision 13887)
+++ branches/stable_19.1.x/readme.txt (revision 13888)
@@ -74,6 +74,7 @@
7474 *****************************************************************************
7575
7676 *** 19.1.5 ***
77+- FIX: Fixed wrong SDMMC RCC macros for STM32H7xx (bug #1127).
7778 - FIX: Fixed STM32 ADCv3 hangin on initialization (bug #1126).
7879 - FIX: Fixed I2S-related problems in STM32F4xx registry (bug #1124).
7980 - FIX: Fixed STM32 EXTIv1 driver unable to enable/disable fixed lines
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