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chibios: Commit


Commit MetaInfo

Revision14145 (tree)
Time2021-04-07 20:42:37
Authorgdisirio

Log Message

Removed MPU-related changes.

Change Summary

Incremental Difference

--- trunk/os/common/ports/ARMv6-M-RP2/chcore.h (revision 14144)
+++ trunk/os/common/ports/ARMv6-M-RP2/chcore.h (revision 14145)
@@ -81,8 +81,7 @@
8181 * @brief Working Areas alignment constant.
8282 * @note It is the alignment to be enforced for thread working areas.
8383 */
84-#define PORT_WORKING_AREA_ALIGN ((PORT_ENABLE_GUARD_PAGES == TRUE) ?\
85- 32U : PORT_STACK_ALIGN)
84+#define PORT_WORKING_AREA_ALIGN PORT_STACK_ALIGN
8685
8786 /**
8887 * @brief Number of cores supported.
@@ -149,26 +148,6 @@
149148 /*===========================================================================*/
150149
151150 /**
152- * @brief Enables stack overflow guard pages using MPU.
153- * @note This option can only be enabled if also option
154- * @p CH_DBG_ENABLE_STACK_CHECK is enabled.
155- * @note The use of this option has an overhead of 32 bytes for each
156- * thread.
157- */
158-#if !defined(PORT_ENABLE_GUARD_PAGES) || defined(__DOXYGEN__)
159-#define PORT_ENABLE_GUARD_PAGES FALSE
160-#endif
161-
162-/**
163- * @brief MPU region to be used to stack guards.
164- * @note Make sure this region is not included in the
165- * @p PORT_SWITCHED_REGIONS_NUMBER regions range.
166- */
167-#if !defined(PORT_USE_GUARD_MPU_REGION) || defined(__DOXYGEN__)
168-#define PORT_USE_GUARD_MPU_REGION MPU_REGION_7
169-#endif
170-
171-/**
172151 * @brief Stack size for the system idle thread.
173152 * @details This size depends on the idle thread implementation, usually
174153 * the idle thread should take no more space than those reserved
@@ -284,11 +263,7 @@
284263 #define PORT_CORE_VARIANT_NAME "Cortex-M0"
285264
286265 #elif (CORTEX_MODEL == 0) && defined(__CORE_CM0PLUS_H_DEPENDANT)
287- #if (PORT_ENABLE_GUARD_PAGES == FALSE) || defined(__DOXYGEN__)
288- #define PORT_CORE_VARIANT_NAME "Cortex-M0+"
289- #else
290- #define PORT_CORE_VARIANT_NAME "Cortex-M0+ (MPU)"
291- #endif
266+ #define PORT_CORE_VARIANT_NAME "Cortex-M0+"
292267
293268 #else
294269 #error "unknown ARMv6-M variant"
@@ -313,30 +288,15 @@
313288 #define CORTEX_MAX_KERNEL_PRIORITY 0
314289 #endif
315290
291+/*===========================================================================*/
292+/* Module data structures and types. */
293+/*===========================================================================*/
294+
316295 /* The following code is not processed when the file is included from an
317296 asm module.*/
318297 #if !defined(_FROM_ASM_)
319298
320299 /**
321- * @brief MPU guard page size.
322- */
323-#if (PORT_ENABLE_GUARD_PAGES == TRUE) || defined(__DOXYGEN__)
324- #if CH_DBG_ENABLE_STACK_CHECK == FALSE
325- #error "PORT_ENABLE_GUARD_PAGES requires CH_DBG_ENABLE_STACK_CHECK"
326- #endif
327- #if __MPU_PRESENT == 0
328- #error "MPU not present in current device"
329- #endif
330- #define PORT_GUARD_PAGE_SIZE 32U
331-#else
332- #define PORT_GUARD_PAGE_SIZE 0U
333-#endif
334-
335-/*===========================================================================*/
336-/* Module data structures and types. */
337-/*===========================================================================*/
338-
339-/**
340300 * @brief Type of a core identifier.
341301 * @note Core identifiers have ranges from 0 to @p PORT_CORES_NUMBER - 1.
342302 */
@@ -437,11 +397,9 @@
437397 * @brief Computes the thread working area global size.
438398 * @note There is no need to perform alignments in this macro.
439399 */
440-#define PORT_WA_SIZE(n) ((size_t)PORT_GUARD_PAGE_SIZE + \
441- sizeof (struct port_intctx) + \
400+#define PORT_WA_SIZE(n) (sizeof (struct port_intctx) + \
442401 sizeof (struct port_extctx) + \
443- (size_t)(n) + \
444- (size_t)PORT_INT_REQUIRED_STACK)
402+ ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
445403
446404 /**
447405 * @brief Static working area allocation.
@@ -451,15 +409,9 @@
451409 * @param[in] s the name to be assigned to the stack array
452410 * @param[in] n the stack size to be assigned to the thread
453411 */
454-#if (PORT_ENABLE_GUARD_PAGES == FALSE) || defined(__DOXYGEN__)
455- #define PORT_WORKING_AREA(s, n) \
456- stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
412+#define PORT_WORKING_AREA(s, n) \
413+ stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
457414
458-#else
459- #define PORT_WORKING_AREA(s, n) \
460- ALIGNED_VAR(32) stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
461-#endif
462-
463415 /**
464416 * @brief IRQ prologue code.
465417 * @details This macro must be inserted at the start of all IRQ handlers
@@ -517,26 +469,14 @@
517469 */
518470 #if (CH_DBG_ENABLE_STACK_CHECK == FALSE) || defined(__DOXYGEN__)
519471 #define port_switch(ntp, otp) __port_switch(ntp, otp)
520-
521472 #else
522- #if PORT_ENABLE_GUARD_PAGES == FALSE
523- #define port_switch(ntp, otp) do { \
524- struct port_intctx *r13 = (struct port_intctx *)__get_PSP(); \
525- if ((stkalign_t *)(r13 - 1) < (otp)->wabase) { \
526- chSysHalt("stack overflow"); \
527- } \
528- __port_switch(ntp, otp); \
529- } while (0)
530-
531- #else
532- #define port_switch(ntp, otp) do { \
533- __port_switch(ntp, otp); \
534- \
535- /* Setting up the guard page for the switched-in thread.*/ \
536- mpuSetRegionAddress(PORT_USE_GUARD_MPU_REGION, \
537- chThdGetSelfX()->wabase); \
538- } while (0)
539- #endif
473+ #define port_switch(ntp, otp) do { \
474+ struct port_intctx *r13 = (struct port_intctx *)__get_PSP(); \
475+ if ((stkalign_t *)(r13 - 1) < (otp)->wabase) { \
476+ chSysHalt("stack overflow"); \
477+ } \
478+ __port_switch(ntp, otp); \
479+ } while (0)
540480 #endif
541481
542482 /*===========================================================================*/
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