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chibios: Commit


Commit MetaInfo

Revision6052 (tree)
Time2013-07-31 18:11:02
Authorbarthess

Log Message

DBG aid. Initial commit.

Change Summary

Incremental Difference

--- branches/dbg_improvements/os/hal/include/dbguart.h (nonexistent)
+++ branches/dbg_improvements/os/hal/include/dbguart.h (revision 6052)
@@ -0,0 +1,91 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
3+ 2011,2012,2013 Giovanni Di Sirio.
4+
5+ This file is part of ChibiOS/RT.
6+
7+ ChibiOS/RT is free software; you can redistribute it and/or modify
8+ it under the terms of the GNU General Public License as published by
9+ the Free Software Foundation; either version 3 of the License, or
10+ (at your option) any later version.
11+
12+ ChibiOS/RT is distributed in the hope that it will be useful,
13+ but WITHOUT ANY WARRANTY; without even the implied warranty of
14+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15+ GNU General Public License for more details.
16+
17+ You should have received a copy of the GNU General Public License
18+ along with this program. If not, see <http://www.gnu.org/licenses/>.
19+*/
20+
21+/**
22+ * @file dbguart.h
23+ * @brief DBGUART Driver macros and structures.
24+ *
25+ * @addtogroup DBGUART
26+ * @{
27+ */
28+
29+#ifndef _DBGUART_H_
30+#define _DBGUART_H_
31+
32+#if HAL_USE_DBGUART || defined(__DOXYGEN__)
33+
34+/*===========================================================================*/
35+/* Driver constants. */
36+/*===========================================================================*/
37+/**
38+ * @brief Default bit rate for debug UART.
39+ * @details Configuration parameter, this is the baud rate selected for the
40+ * default configuration.
41+ */
42+#if !defined(DBGUART_BITRATE) || defined(__DOXYGEN__)
43+#define DBGUART_BITRATE 38400
44+#endif
45+
46+/*===========================================================================*/
47+/* Driver pre-compile time settings. */
48+/*===========================================================================*/
49+
50+/*===========================================================================*/
51+/* Derived constants and error checks. */
52+/*===========================================================================*/
53+
54+/*===========================================================================*/
55+/* Driver data structures and types. */
56+/*===========================================================================*/
57+
58+/**
59+ * @brief Driver state machine possible states.
60+ */
61+typedef enum {
62+ DBGUART_UNINIT = 0, /**< Not initialized. */
63+ DBGUART_STOP = 1, /**< Stopped. */
64+ DBGUART_READY = 2 /**< Ready. */
65+} dbguartstate_t;
66+
67+#include "dbguart_lld.h"
68+
69+/*===========================================================================*/
70+/* Driver macros. */
71+/*===========================================================================*/
72+
73+/*===========================================================================*/
74+/* External declarations. */
75+/*===========================================================================*/
76+
77+#ifdef __cplusplus
78+extern "C" {
79+#endif
80+ void dbguartInit(void);
81+ void dbguartObjectInit(DBGUARTDriver *uartp);
82+ void dbguartSend(DBGUARTDriver *uartp, size_t n, const void *txbuf);
83+#ifdef __cplusplus
84+}
85+#endif
86+
87+#endif /* HAL_USE_DBGUART */
88+
89+#endif /* _DBGUART_H_ */
90+
91+/** @} */
--- branches/dbg_improvements/os/hal/include/hal.h (revision 6051)
+++ branches/dbg_improvements/os/hal/include/hal.h (revision 6052)
@@ -59,6 +59,7 @@
5959 #include "sdc.h"
6060 #include "spi.h"
6161 #include "uart.h"
62+#include "dbguart.h"
6263 #include "usb.h"
6364
6465 /* Complex drivers.*/
--- branches/dbg_improvements/os/hal/platforms/STM32/USARTv1/dbguart_lld.c (nonexistent)
+++ branches/dbg_improvements/os/hal/platforms/STM32/USARTv1/dbguart_lld.c (revision 6052)
@@ -0,0 +1,185 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/**
18+ * @file templates/uart_lld.c
19+ * @brief UART Driver subsystem low level driver source template.
20+ *
21+ * @file STM32/dbguart_lld.c
22+ * @brief STM32 DBGUART subsystem low level driver source.
23+ *
24+ * @addtogroup DBGUART
25+ * @{
26+ */
27+
28+#include "ch.h"
29+#include "hal.h"
30+
31+#if HAL_USE_DBGUART || defined(__DOXYGEN__)
32+
33+/*===========================================================================*/
34+/* Driver local definitions. */
35+/*===========================================================================*/
36+
37+/*===========================================================================*/
38+/* Driver exported variables. */
39+/*===========================================================================*/
40+
41+/**
42+ * @brief DBGUART driver identifier.
43+ */
44+DBGUARTDriver DBGUARTD;
45+
46+/*===========================================================================*/
47+/* Driver local variables and types. */
48+/*===========================================================================*/
49+
50+/*===========================================================================*/
51+/* Driver local functions. */
52+/*===========================================================================*/
53+
54+/*===========================================================================*/
55+/* Driver interrupt handlers. */
56+/*===========================================================================*/
57+
58+/*===========================================================================*/
59+/* Driver exported functions. */
60+/*===========================================================================*/
61+
62+/**
63+ * @brief Low level UART driver initialization.
64+ *
65+ * @notapi
66+ */
67+void dbguart_lld_init(void) {
68+
69+#if STM32_DBGUART_USE_USART1
70+ dbguartObjectInit(&DBGUARTD);
71+ DBGUARTD.usart = USART1;
72+#endif
73+
74+#if STM32_DBGUART_USE_USART2
75+ dbguartObjectInit(&DBGUARTD);
76+ DBGUARTD.usart = USART2;
77+#endif
78+
79+#if STM32_DBGUART_USE_USART3
80+ dbguartObjectInit(&DBGUARTD);
81+ DBGUARTD.usart = USART3;
82+#endif
83+
84+#if STM32_DBGUART_USE_UART4
85+ dbguartObjectInit(&DBGUARTD);
86+ DBGUARTD.usart = UART4;
87+#endif
88+
89+#if STM32_DBGUART_USE_UART5
90+ dbguartObjectInit(&DBGUARTD);
91+ DBGUARTD.usart = UART5;
92+#endif
93+
94+#if STM32_DBGUART_USE_USART6
95+ dbguartObjectInit(&DBGUARTD);
96+ DBGUARTD.usart = USART1;
97+#endif
98+}
99+
100+/**
101+ * @brief Configures and activates the UART peripheral.
102+ *
103+ * @param[in] uartp pointer to the @p UARTDriver object
104+ *
105+ * @notapi
106+ */
107+void dbguart_lld_start(DBGUARTDriver *uartp) {
108+ USART_TypeDef *u = uartp->usart;
109+
110+#if STM32_DBGUART_USE_USART1
111+ rccEnableUSART1(false);
112+ rccResetUSART1();
113+#endif
114+#if STM32_DBGUART_USE_USART2
115+ rccEnableUSART2(false);
116+ rccResetUSART2();
117+#endif
118+#if STM32_DBGUART_USE_USART3
119+ rccEnableUSART3(false);
120+ rccResetUSART3();
121+#endif
122+#if STM32_DBGUART_USE_UART4
123+ rccEnableUART4(false);
124+ rccResetUART4();
125+#endif
126+#if STM32_DBGUART_USE_UART5
127+ rccEnableUART5(false);
128+ rccResetUART5();
129+#endif
130+#if STM32_DBGUART_USE_USART6
131+ rccEnableUSART5(false);
132+ rccResetUSART6();
133+#endif
134+
135+ /* Stop all operation */
136+ u->CR1 = 0;
137+ u->CR2 = 0;
138+ u->CR3 = 0;
139+
140+ /* Baud rate setting.*/
141+#if STM32_HAS_USART6
142+ if ((uartp->usart == USART1) || (uartp->usart == USART6))
143+#else
144+ if (uartp->usart == USART1)
145+#endif
146+ u->BRR = STM32_PCLK2 / DBGUART_BITRATE;
147+ else
148+ u->BRR = STM32_PCLK1 / DBGUART_BITRATE;
149+
150+ /* Resetting eventual pending status flags.*/
151+ (void)u->SR; /* SR reset step 1.*/
152+ (void)u->DR; /* SR reset step 2.*/
153+ u->SR = 0;
154+
155+ u->CR1 = USART_CR1_UE | USART_CR1_TE;
156+}
157+
158+/**
159+ * @brief Starts a transmission on the UART peripheral.
160+ * @note The buffers are organized as uint8_t arrays for data sizes below
161+ * or equal to 8 bits else it is organized as uint16_t arrays.
162+ *
163+ * @param[in] uartp pointer to the @p UARTDriver object
164+ * @param[in] n number of data frames to send
165+ * @param[in] txbuf the pointer to the transmit buffer
166+ *
167+ * @notapi
168+ */
169+void dbguart_lld_send(DBGUARTDriver *uartp, size_t n, const void *txbuf) {
170+
171+ USART_TypeDef *u = uartp->usart;
172+ const uint8_t *buf = txbuf;
173+
174+ while (n--) {
175+ u->DR = *buf++;
176+ while (!(u->SR & USART_SR_TXE)) {;}
177+ }
178+
179+ /* wait until last byte writing to wire */
180+ while (!(u->SR & USART_SR_TC)) {;}
181+}
182+
183+#endif /* HAL_USE_DBGUART */
184+
185+/** @} */
--- branches/dbg_improvements/os/hal/platforms/STM32/USARTv1/dbguart_lld.h (nonexistent)
+++ branches/dbg_improvements/os/hal/platforms/STM32/USARTv1/dbguart_lld.h (revision 6052)
@@ -0,0 +1,218 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/**
18+ * @file STM32/dbguart_lld.h
19+ * @brief STM32 DBGUART subsystem low level driver header.
20+ *
21+ * @addtogroup DBGUART
22+ * @{
23+ */
24+
25+#ifndef _DBGUART_LLD_H_
26+#define _DBGUART_LLD_H_
27+
28+#if HAL_USE_DBGUART || defined(__DOXYGEN__)
29+
30+/*===========================================================================*/
31+/* Driver constants. */
32+/*===========================================================================*/
33+
34+/*===========================================================================*/
35+/* Driver pre-compile time settings. */
36+/*===========================================================================*/
37+
38+/**
39+ * @name Configuration options
40+ * @{
41+ */
42+/**
43+ * @brief UART driver on USART1 enable switch.
44+ * @details If set to @p TRUE the support for USART1 is included.
45+ * @note The default is @p FALSE.
46+ */
47+#if !defined(STM32_DBGUART_USE_USART1) || defined(__DOXYGEN__)
48+#define STM32_DBGUART_USE_USART1 FALSE
49+#endif
50+
51+/**
52+ * @brief UART driver on USART2 enable switch.
53+ * @details If set to @p TRUE the support for USART2 is included.
54+ * @note The default is @p FALSE.
55+ */
56+#if !defined(STM32_DBGUART_USE_USART2) || defined(__DOXYGEN__)
57+#define STM32_DBGUART_USE_USART2 FALSE
58+#endif
59+
60+/**
61+ * @brief UART driver on USART3 enable switch.
62+ * @details If set to @p TRUE the support for USART3 is included.
63+ * @note The default is @p FALSE.
64+ */
65+#if !defined(STM32_DBGUART_USE_USART3) || defined(__DOXYGEN__)
66+#define STM32_DBGUART_USE_USART3 FALSE
67+#endif
68+
69+/**
70+ * @brief UART driver on UART4 enable switch.
71+ * @details If set to @p TRUE the support for UART4 is included.
72+ * @note The default is @p FALSE.
73+ */
74+#if !defined(STM32_DBGUART_USE_UART4) || defined(__DOXYGEN__)
75+#define STM32_DBGUART_USE_UART4 FALSE
76+#endif
77+
78+/**
79+ * @brief UART driver on UART5 enable switch.
80+ * @details If set to @p TRUE the support for UART5 is included.
81+ * @note The default is @p FALSE.
82+ */
83+#if !defined(STM32_DBGUART_USE_UART4) || defined(__DOXYGEN__)
84+#define STM32_DBGUART_USE_UART5 FALSE
85+#endif
86+
87+/**
88+ * @brief UART driver on USART6 enable switch.
89+ * @details If set to @p TRUE the support for USART6 is included.
90+ * @note The default is @p FALSE.
91+ */
92+#if !defined(STM32_DBGUART_USE_USART6) || defined(__DOXYGEN__)
93+#define STM32_DBGUART_USE_USART6 FALSE
94+#endif
95+
96+/** @} */
97+
98+/*===========================================================================*/
99+/* Derived constants and error checks. */
100+/*===========================================================================*/
101+
102+#if STM32_DBGUART_USE_USART1
103+ #if !STM32_HAS_USART1
104+ #error "USART1 not present in the selected device"
105+ #endif
106+#endif
107+
108+#if STM32_DBGUART_USE_USART2
109+ #if !STM32_HAS_USART2
110+ #error "USART2 not present in the selected device"
111+ #endif
112+
113+ #if STM32_DBGUART_USE_USART1
114+ #error "Only one UART can be selected for debug output"
115+ #endif
116+#endif
117+
118+#if STM32_DBGUART_USE_USART3
119+ #if !STM32_HAS_USART3
120+ #error "USART3 not present in the selected device"
121+ #endif
122+
123+ #if STM32_DBGUART_USE_USART1 || STM32_DBGUART_USE_USART2
124+ #error "Only one UART can be selected for debug output"
125+ #endif
126+#endif
127+
128+#if STM32_DBGUART_USE_UART4
129+ #if !STM32_HAS_UART4
130+ #error "UART4 not present in the selected device"
131+ #endif
132+
133+ #if STM32_DBGUART_USE_USART1 || STM32_DBGUART_USE_USART2 || \
134+ STM32_DBGUART_USE_USART3
135+ #error "Only one UART can be selected for debug output"
136+ #endif
137+#endif
138+
139+#if STM32_DBGUART_USE_UART5
140+ #if !STM32_HAS_UART5
141+ #error "UART5 not present in the selected device"
142+ #endif
143+
144+ #if STM32_DBGUART_USE_USART1 || STM32_DBGUART_USE_USART2 || \
145+ STM32_DBGUART_USE_USART3 || STM32_DBGUART_USE_UART4
146+ #error "Only one UART can be selected for debug output"
147+ #endif
148+#endif
149+
150+#if STM32_DBGUART_USE_USART6
151+ #if !STM32_HAS_USART6
152+ #error "USART6 not present in the selected device"
153+ #endif
154+
155+ #if STM32_DBGUART_USE_USART1 || STM32_DBGUART_USE_USART2 || \
156+ STM32_DBGUART_USE_USART3 || STM32_DBGUART_USE_UART4 || \
157+ STM32_DBGUART_USE_UART5
158+ #error "Only one UART can be selected for debug output"
159+ #endif
160+#endif
161+
162+#if !STM32_DBGUART_USE_USART1 && !STM32_DBGUART_USE_USART2 && \
163+ !STM32_DBGUART_USE_USART3 && !STM32_DBGUART_USE_UART4 && \
164+ !STM32_DBGUART_USE_UART5 && !STM32_DBGUART_USE_USART6
165+#error "DBGUART driver activated but no USART/UART peripheral assigned"
166+#endif
167+
168+/*===========================================================================*/
169+/* Driver data structures and types. */
170+/*===========================================================================*/
171+
172+/**
173+ * @brief Type of structure representing an UART driver.
174+ */
175+typedef struct DBGUARTDriver DBGUARTDriver;
176+
177+/**
178+ * @brief Structure representing an UART driver.
179+ * @note Implementations may extend this structure to contain more,
180+ * architecture dependent, fields.
181+ */
182+struct DBGUARTDriver {
183+ /**
184+ * @brief Driver state.
185+ */
186+ dbguartstate_t state;
187+ /* End of the mandatory fields.*/
188+ /**
189+ * @brief Pointer to the USART registers block.
190+ */
191+ USART_TypeDef *usart;
192+};
193+
194+/*===========================================================================*/
195+/* Driver macros. */
196+/*===========================================================================*/
197+
198+/*===========================================================================*/
199+/* External declarations. */
200+/*===========================================================================*/
201+
202+extern DBGUARTDriver DBGUARTD;
203+
204+#ifdef __cplusplus
205+extern "C" {
206+#endif
207+ void dbguart_lld_init(void);
208+ void dbguart_lld_start(DBGUARTDriver *uartp);
209+ void dbguart_lld_send(DBGUARTDriver *uartp, size_t n, const void *txbuf);
210+#ifdef __cplusplus
211+}
212+#endif
213+
214+#endif /* HAL_USE_DBGUART */
215+
216+#endif /* _DBGUART_LLD_H_ */
217+
218+/** @} */
--- branches/dbg_improvements/os/hal/src/dbguart.c (nonexistent)
+++ branches/dbg_improvements/os/hal/src/dbguart.c (revision 6052)
@@ -0,0 +1,102 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
3+ 2011,2012,2013 Giovanni Di Sirio.
4+
5+ This file is part of ChibiOS/RT.
6+
7+ ChibiOS/RT is free software; you can redistribute it and/or modify
8+ it under the terms of the GNU General Public License as published by
9+ the Free Software Foundation; either version 3 of the License, or
10+ (at your option) any later version.
11+
12+ ChibiOS/RT is distributed in the hope that it will be useful,
13+ but WITHOUT ANY WARRANTY; without even the implied warranty of
14+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15+ GNU General Public License for more details.
16+
17+ You should have received a copy of the GNU General Public License
18+ along with this program. If not, see <http://www.gnu.org/licenses/>.
19+*/
20+
21+/**
22+ * @file dbguart.c
23+ * @brief DBGUART Driver code.
24+ *
25+ * @addtogroup DBGUART
26+ * @{
27+ */
28+
29+#include "ch.h"
30+#include "hal.h"
31+
32+#if HAL_USE_DBGUART || defined(__DOXYGEN__)
33+
34+/*===========================================================================*/
35+/* Driver local definitions. */
36+/*===========================================================================*/
37+
38+/*===========================================================================*/
39+/* Driver exported variables. */
40+/*===========================================================================*/
41+
42+/*===========================================================================*/
43+/* Driver local variables and types. */
44+/*===========================================================================*/
45+
46+/*===========================================================================*/
47+/* Driver local functions. */
48+/*===========================================================================*/
49+
50+/*===========================================================================*/
51+/* Driver exported functions. */
52+/*===========================================================================*/
53+
54+/**
55+ * @brief UART Driver initialization.
56+ * @note This function is implicitly invoked by @p halInit(), there is
57+ * no need to explicitly initialize the driver.
58+ *
59+ * @init
60+ */
61+void dbguartInit(void) {
62+
63+ dbguart_lld_init();
64+}
65+
66+/**
67+ * @brief Initializes the standard part of a @p UARTDriver structure.
68+ *
69+ * @param[out] uartp pointer to the @p UARTDriver object
70+ *
71+ * @init
72+ */
73+void dbguartObjectInit(DBGUARTDriver *uartp) {
74+
75+ chDbgCheck(uartp != NULL, "dbguartObjectInit");
76+ uartp->state = DBGUART_STOP;
77+}
78+
79+/**
80+ * @brief Starts a transmission on the UART peripheral.
81+ * @note The buffers are organized as uint8_t arrays for data sizes below
82+ * or equal to 8 bits else it is organized as uint16_t arrays.
83+ *
84+ * @param[in] uartp pointer to the @p UARTDriver object
85+ * @param[in] n number of data frames to send
86+ * @param[in] txbuf the pointer to the transmit buffer
87+ *
88+ * @api
89+ */
90+void dbguartSend(DBGUARTDriver *uartp, size_t n, const void *txbuf) {
91+
92+ if (uartp->state != DBGUART_READY){
93+ dbguart_lld_start(uartp);
94+ uartp->state = DBGUART_READY;
95+ }
96+
97+ dbguart_lld_send(uartp, n, txbuf);
98+}
99+
100+#endif /* HAL_USE_DBGUART */
101+
102+/** @} */
--- branches/dbg_improvements/os/hal/src/hal.c (revision 6051)
+++ branches/dbg_improvements/os/hal/src/hal.c (revision 6052)
@@ -104,6 +104,9 @@
104104 #if HAL_USE_UART || defined(__DOXYGEN__)
105105 uartInit();
106106 #endif
107+#if HAL_USE_DBGUART || defined(__DOXYGEN__)
108+ dbguartInit();
109+#endif
107110 #if HAL_USE_USB || defined(__DOXYGEN__)
108111 usbInit();
109112 #endif
--- branches/dbg_improvements/os/various/dbg_aid/armcmx_dbg_aid.h (nonexistent)
+++ branches/dbg_improvements/os/various/dbg_aid/armcmx_dbg_aid.h (revision 6052)
@@ -0,0 +1,4 @@
1+#ifndef ARMCMX_DBG_AID_H_
2+#define ARMCMX_DBG_AID_H_
3+
4+#endif /* ARMCMX_DBG_AID_H_ */
--- branches/dbg_improvements/os/various/dbg_aid/dbg_aid.h (nonexistent)
+++ branches/dbg_improvements/os/various/dbg_aid/dbg_aid.h (revision 6052)
@@ -0,0 +1,4 @@
1+#ifndef DBG_AID_H_
2+#define DBG_AID_H_
3+
4+#endif /* DBG_AID_H_ */
--- branches/dbg_improvements/os/various/dbg_aid/howto.txt (nonexistent)
+++ branches/dbg_improvements/os/various/dbg_aid/howto.txt (revision 6052)
@@ -0,0 +1,8 @@
1+To use this functions you need:
2+
3+1) #include "stm32_dbg_aid.h" in your chconf.h
4+2) #define STM32_DBGUART_USE_USART2 TRUE in your mcuconf.h (or any other UART)
5+3) #define STM32_SOFTRESET_ON_PANIC TRUE in your mcuconf.h (if needed)
6+4) #define HAL_USE_DBGUART TRUE in your chconf.h
7+5) #define DBGUART_BITRATE 38400 in your chconf.h
8+6) properly configure pins of selected uart
\ No newline at end of file
--- branches/dbg_improvements/os/various/dbg_aid/stm32_dbg_aid.c (nonexistent)
+++ branches/dbg_improvements/os/various/dbg_aid/stm32_dbg_aid.c (revision 6052)
@@ -0,0 +1,214 @@
1+#include "hal.h"
2+
3+#include "stm32_dbg_aid.h"
4+#include "armcmx_dbg_aid.h"
5+
6+#if CH_DBG_ENABLED || defined(__DOXYGEN__)
7+
8+/*
9+ ******************************************************************************
10+ * DEFINES
11+ ******************************************************************************
12+ */
13+
14+/*
15+ ******************************************************************************
16+ * EXTERNS
17+ ******************************************************************************
18+ */
19+
20+
21+/*
22+ ******************************************************************************
23+ * PROTOTYPES
24+ ******************************************************************************
25+ */
26+void togglePanicLed(void);
27+
28+/*
29+ ******************************************************************************
30+ * GLOBAL VARIABLES
31+ ******************************************************************************
32+ */
33+volatile uint32_t r0;
34+volatile uint32_t r1;
35+volatile uint32_t r2;
36+volatile uint32_t r3;
37+volatile uint32_t r12;
38+volatile uint32_t lr; /* Link register. */
39+volatile uint32_t pc; /* Program counter. */
40+volatile uint32_t psr;/* Program status register. */
41+volatile unsigned long _CFSR ;
42+volatile unsigned long _HFSR ;
43+volatile unsigned long _DFSR ;
44+volatile unsigned long _AFSR ;
45+volatile unsigned long _BFAR ;
46+volatile unsigned long _MMAR ;
47+volatile unsigned long _SCB_SHCSR;
48+volatile uint32_t fake;
49+
50+/*
51+ ******************************************************************************
52+ ******************************************************************************
53+ * LOCAL FUNCTIONS
54+ ******************************************************************************
55+ ******************************************************************************
56+ */
57+void prvGetRegistersFromStack( uint32_t *pulFaultStackAddress )
58+{
59+/* These are volatile to try and prevent the compiler/linker optimising them
60+away as the variables never actually get used. If the debugger won't show the
61+values of the variables, make them global my moving their declaration outside
62+of this function. */
63+
64+ r0 = pulFaultStackAddress[0];
65+ r1 = pulFaultStackAddress[1];
66+ r2 = pulFaultStackAddress[2];
67+ r3 = pulFaultStackAddress[3];
68+
69+ r12 = pulFaultStackAddress[4];
70+ lr = pulFaultStackAddress[5];
71+ pc = pulFaultStackAddress[6];
72+ psr = pulFaultStackAddress[7];
73+
74+ // Configurable Fault Status Register
75+ // Consists of MMSR, BFSR and UFSR
76+ _CFSR = (*((volatile unsigned long *)(0xE000ED28))) ;
77+
78+ // Hard Fault Status Register
79+ _HFSR = (*((volatile unsigned long *)(0xE000ED2C))) ;
80+
81+ // Debug Fault Status Register
82+ _DFSR = (*((volatile unsigned long *)(0xE000ED30))) ;
83+
84+ // Auxiliary Fault Status Register
85+ _AFSR = (*((volatile unsigned long *)(0xE000ED3C))) ;
86+
87+ // Read the Fault Address Registers. These may not contain valid values.
88+ // Check BFARVALID/MMARVALID to see if they are valid values
89+ // MemManage Fault Address Register
90+ _MMAR = (*((volatile unsigned long *)(0xE000ED34))) ;
91+ // Bus Fault Address Register
92+ _BFAR = (*((volatile unsigned long *)(0xE000ED38))) ;
93+ /* When the following line is hit, the variables contain the register values. */
94+ _SCB_SHCSR = SCB->SHCSR;
95+
96+ /* prevent values from optimizing out */
97+ fake += r0;
98+ fake += r1;
99+ fake += r2;
100+ fake += r3;
101+ fake += r12;
102+ fake += lr;
103+ fake += pc;
104+ fake += psr;
105+ fake += _CFSR ;
106+ fake += _HFSR ;
107+ fake += _DFSR ;
108+ fake += _AFSR ;
109+ fake += _BFAR ;
110+ fake += _MMAR ;
111+ fake += _SCB_SHCSR;
112+
113+ stm32DbgPanic("Hard fault error!");
114+}
115+
116+/*
117+ * The fault handler implementation calls a function called
118+ * prvGetRegistersFromStack().
119+ */
120+void HardFaultVector(void)
121+{
122+ __asm volatile
123+ (
124+ " tst lr, #4 \n"
125+ " ite eq \n"
126+ " mrseq r0, msp \n"
127+ " mrsne r0, psp \n"
128+ " ldr r1, [r0, #24] \n"
129+ " ldr r2, handler2_address_const \n"
130+ " bx r2 \n"
131+ " handler2_address_const: .word prvGetRegistersFromStack \n"
132+ );
133+}
134+
135+/*
136+ ******************************************************************************
137+ * EXPORTED FUNCTIONS
138+ ******************************************************************************
139+ */
140+
141+/*
142+ * Pointer to panic message
143+ */
144+const char *stm32_dbg_panic_msg;
145+
146+/*
147+ * Remove stdlib deps
148+ */
149+static size_t stm32_dbg_strlen(const char *msg){
150+ size_t tmp = 0;
151+
152+ while (*msg++ != 0)
153+ tmp++;
154+
155+ return tmp;
156+}
157+
158+/*
159+ *
160+ */
161+void stm32DbgPanic(const char *msg){
162+
163+ stm32_dbg_panic_msg = msg;
164+
165+ if (under_debugger()){
166+ __asm("BKPT #0\n") ; /* break into the debugger (Cortex-Mx feature)*/
167+ }
168+ else{
169+ port_disable();
170+ while (1) {
171+
172+ #if HAL_USE_DBGUART
173+ /* presuming you already have properly UART pins setup for this port */
174+ dbguartSend(&DBGUARTD, stm32_dbg_strlen(msg), msg);
175+ #endif
176+
177+ #if STM32_SOFTRESET_ON_PANIC
178+ NVIC_SystemReset();
179+ #endif
180+
181+ /* approximate 1 second delay */
182+ halPolledDelay(STM32_SYSCLK);
183+
184+ /* you have to provide this function yourself, or just place empty macro*/
185+ togglePanicLed();
186+ }
187+ }
188+}
189+
190+void NMIVector(void) {
191+ stm32DbgPanic("Unhandled NMIVector");
192+}
193+
194+void DebugMonitorVector(void) {
195+ stm32DbgPanic("Unhandled DebugMonitorVector");
196+}
197+
198+void PendSVVector(void) {
199+ stm32DbgPanic("Unhandled PendSVVector");
200+}
201+
202+void MemManageVector(void) {
203+ stm32DbgPanic("Unhandled MemManageVector");
204+}
205+
206+void BusFaultVector(void) {
207+ stm32DbgPanic("Unhandled BusFaultVector");
208+}
209+
210+void UsageFaultVector(void) {
211+ stm32DbgPanic("Unhandled UsageFaultVector");
212+}
213+
214+#endif /* CH_DBG_ENABLED */
--- branches/dbg_improvements/os/various/dbg_aid/stm32_dbg_aid.h (nonexistent)
+++ branches/dbg_improvements/os/various/dbg_aid/stm32_dbg_aid.h (revision 6052)
@@ -0,0 +1,67 @@
1+#ifndef STM32_DBG_AID_H_
2+#define STM32_DBG_AID_H_
3+
4+/*
5+ * Evaluates to TRUE if system runs under debugger control.
6+ * Note. This bit resets only by power on reset.
7+ */
8+#define under_debugger() (((CoreDebug)->DHCSR) & CoreDebug_DHCSR_C_DEBUGEN_Msk)
9+
10+/*
11+ * evaluates to TRUE if system boots after soft reset cause by SYSRESETREQ
12+ */
13+#define was_softreset() (((RCC)->CSR) & RCC_CSR_SFTRSTF)
14+
15+/**
16+ * evaluates to TRUE if system boots after reset by reset pad
17+ */
18+#define was_padreset() (((RCC)->CSR) & RCC_CSR_PADRSTF)
19+
20+/**
21+ * clear all reset flags
22+ */
23+#define clear_reset_flags() (((RCC)->CSR) |= RCC_CSR_RMVF)
24+
25+/*
26+ * macros for int to string conversion
27+ */
28+#define __DBG_AID_TO_STRING(s) # s
29+#define __DBG_AID_STR(x) __DBG_AID_TO_STRING(x)
30+
31+/*
32+ * message containing file name and string number
33+ */
34+#define __DBG_AID_MSG(msg) ( \
35+ "Panic in " __FILE__ \
36+ " at line " __DBG_AID_STR(__LINE__) \
37+ ": " __DBG_AID_TO_STRING(msg) "\r\n")
38+
39+/*
40+ * our own check macro
41+ */
42+#define chDbgCheck(c, func) { \
43+ if (!(c)){ \
44+ stm32DbgPanic(__DBG_AID_MSG(func)); \
45+ } \
46+}
47+
48+/*
49+ * our own assert macro
50+ */
51+#define chDbgAssert(c, m, r) { \
52+ if (!(c)) \
53+ stm32DbgPanic(__DBG_AID_MSG(m)); \
54+}
55+
56+/*
57+ * platform depended panic
58+ */
59+#ifdef __cplusplus
60+extern "C" {
61+#endif
62+ void stm32DbgPanic(const char *msg);
63+#ifdef __cplusplus
64+}
65+#endif
66+
67+#endif /* STM32_DBG_AID_H_ */
--- branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/Makefile (nonexistent)
+++ branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/Makefile (revision 6052)
@@ -0,0 +1,223 @@
1+##############################################################################
2+# Build global options
3+# NOTE: Can be overridden externally.
4+#
5+
6+# Compiler options here.
7+ifeq ($(USE_OPT),)
8+ USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
9+endif
10+
11+# C specific options here (added to USE_OPT).
12+ifeq ($(USE_COPT),)
13+ USE_COPT =
14+endif
15+
16+# C++ specific options here (added to USE_OPT).
17+ifeq ($(USE_CPPOPT),)
18+ USE_CPPOPT = -fno-rtti
19+endif
20+
21+# Enable this if you want the linker to remove unused code and data
22+ifeq ($(USE_LINK_GC),)
23+ USE_LINK_GC = yes
24+endif
25+
26+# If enabled, this option allows to compile the application in THUMB mode.
27+ifeq ($(USE_THUMB),)
28+ USE_THUMB = yes
29+endif
30+
31+# Enable this if you want to see the full log while compiling.
32+ifeq ($(USE_VERBOSE_COMPILE),)
33+ USE_VERBOSE_COMPILE = no
34+endif
35+
36+#
37+# Build global options
38+##############################################################################
39+
40+##############################################################################
41+# Architecture or project specific options
42+#
43+
44+# Enables the use of FPU on Cortex-M4.
45+# Enable this if you really want to use the STM FWLib.
46+ifeq ($(USE_FPU),)
47+ USE_FPU = no
48+endif
49+
50+# Enable this if you really want to use the STM FWLib.
51+ifeq ($(USE_FWLIB),)
52+ USE_FWLIB = no
53+endif
54+
55+#
56+# Architecture or project specific options
57+##############################################################################
58+
59+##############################################################################
60+# Project, sources and paths
61+#
62+
63+# Define project name here
64+PROJECT = ch
65+
66+# Imported source files and paths
67+CHIBIOS = ../../..
68+include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk
69+include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk
70+include $(CHIBIOS)/os/hal/hal.mk
71+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk
72+include $(CHIBIOS)/os/kernel/kernel.mk
73+include $(CHIBIOS)/test/test.mk
74+
75+# Define linker script file here
76+LDSCRIPT= $(PORTLD)/STM32F407xG.ld
77+#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld
78+
79+# C sources that can be compiled in ARM or THUMB mode depending on the global
80+# setting.
81+CSRC = $(PORTSRC) \
82+ $(KERNSRC) \
83+ $(TESTSRC) \
84+ $(HALSRC) \
85+ $(PLATFORMSRC) \
86+ $(BOARDSRC) \
87+ $(CHIBIOS)/os/various/dbg_aid/stm32_dbg_aid.c \
88+ main.c
89+
90+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
91+# setting.
92+CPPSRC =
93+
94+# C sources to be compiled in ARM mode regardless of the global setting.
95+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
96+# option that results in lower performance and larger code size.
97+ACSRC =
98+
99+# C++ sources to be compiled in ARM mode regardless of the global setting.
100+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
101+# option that results in lower performance and larger code size.
102+ACPPSRC =
103+
104+# C sources to be compiled in THUMB mode regardless of the global setting.
105+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
106+# option that results in lower performance and larger code size.
107+TCSRC =
108+
109+# C sources to be compiled in THUMB mode regardless of the global setting.
110+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
111+# option that results in lower performance and larger code size.
112+TCPPSRC =
113+
114+# List ASM source files here
115+ASMSRC = $(PORTASM)
116+
117+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
118+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
119+ $(CHIBIOS)/os/various \
120+ $(CHIBIOS)/os/various/dbg_aid \
121+
122+#
123+# Project, sources and paths
124+##############################################################################
125+
126+##############################################################################
127+# Compiler settings
128+#
129+
130+MCU = cortex-m4
131+
132+#TRGT = arm-elf-
133+TRGT = arm-none-eabi-
134+CC = $(TRGT)gcc
135+CPPC = $(TRGT)g++
136+# Enable loading with g++ only if you need C++ runtime support.
137+# NOTE: You can use C++ even without C++ support if you are careful. C++
138+# runtime support makes code size explode.
139+LD = $(TRGT)gcc
140+#LD = $(TRGT)g++
141+CP = $(TRGT)objcopy
142+AS = $(TRGT)gcc -x assembler-with-cpp
143+OD = $(TRGT)objdump
144+HEX = $(CP) -O ihex
145+BIN = $(CP) -O binary
146+
147+# ARM-specific options here
148+AOPT =
149+
150+# THUMB-specific options here
151+TOPT = -mthumb -DTHUMB
152+
153+# Define C warning options here
154+CWARN = -Wall -Wextra -Wstrict-prototypes
155+
156+# Define C++ warning options here
157+CPPWARN = -Wall -Wextra
158+
159+#
160+# Compiler settings
161+##############################################################################
162+
163+##############################################################################
164+# Start of default section
165+#
166+
167+# List all default C defines here, like -D_DEBUG=1
168+DDEFS =
169+
170+# List all default ASM defines here, like -D_DEBUG=1
171+DADEFS =
172+
173+# List all default directories to look for include files here
174+DINCDIR =
175+
176+# List the default directory to look for the libraries here
177+DLIBDIR =
178+
179+# List all default libraries here
180+DLIBS =
181+
182+#
183+# End of default section
184+##############################################################################
185+
186+##############################################################################
187+# Start of user section
188+#
189+
190+# List all user C define here, like -D_DEBUG=1
191+UDEFS =
192+
193+# Define ASM defines here
194+UADEFS =
195+
196+# List all user directories here
197+UINCDIR =
198+
199+# List the user directory to look for the libraries here
200+ULIBDIR =
201+
202+# List all user libraries here
203+ULIBS =
204+
205+#
206+# End of user defines
207+##############################################################################
208+
209+ifeq ($(USE_FPU),yes)
210+ USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant
211+ DDEFS += -DCORTEX_USE_FPU=TRUE
212+else
213+ DDEFS += -DCORTEX_USE_FPU=FALSE
214+endif
215+
216+ifeq ($(USE_FWLIB),yes)
217+ include $(CHIBIOS)/ext/stm32lib/stm32lib.mk
218+ CSRC += $(STM32SRC)
219+ INCDIR += $(STM32INC)
220+ USE_OPT += -DUSE_STDPERIPH_DRIVER
221+endif
222+
223+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
--- branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/chconf.h (nonexistent)
+++ branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/chconf.h (revision 6052)
@@ -0,0 +1,533 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/**
18+ * @file templates/chconf.h
19+ * @brief Configuration file template.
20+ * @details A copy of this file must be placed in each project directory, it
21+ * contains the application specific kernel settings.
22+ *
23+ * @addtogroup config
24+ * @details Kernel related settings and hooks.
25+ * @{
26+ */
27+
28+#ifndef _CHCONF_H_
29+#define _CHCONF_H_
30+
31+#include "stm32_dbg_aid.h"
32+
33+/*===========================================================================*/
34+/**
35+ * @name Kernel parameters and options
36+ * @{
37+ */
38+/*===========================================================================*/
39+
40+/**
41+ * @brief System tick frequency.
42+ * @details Frequency of the system timer that drives the system ticks. This
43+ * setting also defines the system tick time unit.
44+ */
45+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
46+#define CH_FREQUENCY 1000
47+#endif
48+
49+/**
50+ * @brief Round robin interval.
51+ * @details This constant is the number of system ticks allowed for the
52+ * threads before preemption occurs. Setting this value to zero
53+ * disables the preemption for threads with equal priority and the
54+ * round robin becomes cooperative. Note that higher priority
55+ * threads can still preempt, the kernel is always preemptive.
56+ *
57+ * @note Disabling the round robin preemption makes the kernel more compact
58+ * and generally faster.
59+ */
60+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
61+#define CH_TIME_QUANTUM 20
62+#endif
63+
64+/**
65+ * @brief Managed RAM size.
66+ * @details Size of the RAM area to be managed by the OS. If set to zero
67+ * then the whole available RAM is used. The core memory is made
68+ * available to the heap allocator and/or can be used directly through
69+ * the simplified core memory allocator.
70+ *
71+ * @note In order to let the OS manage the whole RAM the linker script must
72+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
73+ * @note Requires @p CH_USE_MEMCORE.
74+ */
75+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
76+#define CH_MEMCORE_SIZE 0
77+#endif
78+
79+/**
80+ * @brief Idle thread automatic spawn suppression.
81+ * @details When this option is activated the function @p chSysInit()
82+ * does not spawn the idle thread automatically. The application has
83+ * then the responsibility to do one of the following:
84+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
85+ * - Change the main() thread priority to @p IDLEPRIO then enter
86+ * an endless loop. In this scenario the @p main() thread acts as
87+ * the idle thread.
88+ * .
89+ * @note Unless an idle thread is spawned the @p main() thread must not
90+ * enter a sleep state.
91+ */
92+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
93+#define CH_NO_IDLE_THREAD FALSE
94+#endif
95+
96+/** @} */
97+
98+/*===========================================================================*/
99+/**
100+ * @name Performance options
101+ * @{
102+ */
103+/*===========================================================================*/
104+
105+/**
106+ * @brief OS optimization.
107+ * @details If enabled then time efficient rather than space efficient code
108+ * is used when two possible implementations exist.
109+ *
110+ * @note This is not related to the compiler optimization options.
111+ * @note The default is @p TRUE.
112+ */
113+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
114+#define CH_OPTIMIZE_SPEED TRUE
115+#endif
116+
117+/** @} */
118+
119+/*===========================================================================*/
120+/**
121+ * @name Subsystem options
122+ * @{
123+ */
124+/*===========================================================================*/
125+
126+/**
127+ * @brief Threads registry APIs.
128+ * @details If enabled then the registry APIs are included in the kernel.
129+ *
130+ * @note The default is @p TRUE.
131+ */
132+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
133+#define CH_USE_REGISTRY TRUE
134+#endif
135+
136+/**
137+ * @brief Threads synchronization APIs.
138+ * @details If enabled then the @p chThdWait() function is included in
139+ * the kernel.
140+ *
141+ * @note The default is @p TRUE.
142+ */
143+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
144+#define CH_USE_WAITEXIT TRUE
145+#endif
146+
147+/**
148+ * @brief Semaphores APIs.
149+ * @details If enabled then the Semaphores APIs are included in the kernel.
150+ *
151+ * @note The default is @p TRUE.
152+ */
153+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
154+#define CH_USE_SEMAPHORES TRUE
155+#endif
156+
157+/**
158+ * @brief Semaphores queuing mode.
159+ * @details If enabled then the threads are enqueued on semaphores by
160+ * priority rather than in FIFO order.
161+ *
162+ * @note The default is @p FALSE. Enable this if you have special requirements.
163+ * @note Requires @p CH_USE_SEMAPHORES.
164+ */
165+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
166+#define CH_USE_SEMAPHORES_PRIORITY FALSE
167+#endif
168+
169+/**
170+ * @brief Atomic semaphore API.
171+ * @details If enabled then the semaphores the @p chSemSignalWait() API
172+ * is included in the kernel.
173+ *
174+ * @note The default is @p TRUE.
175+ * @note Requires @p CH_USE_SEMAPHORES.
176+ */
177+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
178+#define CH_USE_SEMSW TRUE
179+#endif
180+
181+/**
182+ * @brief Mutexes APIs.
183+ * @details If enabled then the mutexes APIs are included in the kernel.
184+ *
185+ * @note The default is @p TRUE.
186+ */
187+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
188+#define CH_USE_MUTEXES TRUE
189+#endif
190+
191+/**
192+ * @brief Conditional Variables APIs.
193+ * @details If enabled then the conditional variables APIs are included
194+ * in the kernel.
195+ *
196+ * @note The default is @p TRUE.
197+ * @note Requires @p CH_USE_MUTEXES.
198+ */
199+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
200+#define CH_USE_CONDVARS TRUE
201+#endif
202+
203+/**
204+ * @brief Conditional Variables APIs with timeout.
205+ * @details If enabled then the conditional variables APIs with timeout
206+ * specification are included in the kernel.
207+ *
208+ * @note The default is @p TRUE.
209+ * @note Requires @p CH_USE_CONDVARS.
210+ */
211+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
212+#define CH_USE_CONDVARS_TIMEOUT TRUE
213+#endif
214+
215+/**
216+ * @brief Events Flags APIs.
217+ * @details If enabled then the event flags APIs are included in the kernel.
218+ *
219+ * @note The default is @p TRUE.
220+ */
221+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
222+#define CH_USE_EVENTS TRUE
223+#endif
224+
225+/**
226+ * @brief Events Flags APIs with timeout.
227+ * @details If enabled then the events APIs with timeout specification
228+ * are included in the kernel.
229+ *
230+ * @note The default is @p TRUE.
231+ * @note Requires @p CH_USE_EVENTS.
232+ */
233+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
234+#define CH_USE_EVENTS_TIMEOUT TRUE
235+#endif
236+
237+/**
238+ * @brief Synchronous Messages APIs.
239+ * @details If enabled then the synchronous messages APIs are included
240+ * in the kernel.
241+ *
242+ * @note The default is @p TRUE.
243+ */
244+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
245+#define CH_USE_MESSAGES TRUE
246+#endif
247+
248+/**
249+ * @brief Synchronous Messages queuing mode.
250+ * @details If enabled then messages are served by priority rather than in
251+ * FIFO order.
252+ *
253+ * @note The default is @p FALSE. Enable this if you have special requirements.
254+ * @note Requires @p CH_USE_MESSAGES.
255+ */
256+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
257+#define CH_USE_MESSAGES_PRIORITY FALSE
258+#endif
259+
260+/**
261+ * @brief Mailboxes APIs.
262+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
263+ * included in the kernel.
264+ *
265+ * @note The default is @p TRUE.
266+ * @note Requires @p CH_USE_SEMAPHORES.
267+ */
268+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
269+#define CH_USE_MAILBOXES TRUE
270+#endif
271+
272+/**
273+ * @brief I/O Queues APIs.
274+ * @details If enabled then the I/O queues APIs are included in the kernel.
275+ *
276+ * @note The default is @p TRUE.
277+ */
278+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
279+#define CH_USE_QUEUES TRUE
280+#endif
281+
282+/**
283+ * @brief Core Memory Manager APIs.
284+ * @details If enabled then the core memory manager APIs are included
285+ * in the kernel.
286+ *
287+ * @note The default is @p TRUE.
288+ */
289+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
290+#define CH_USE_MEMCORE TRUE
291+#endif
292+
293+/**
294+ * @brief Heap Allocator APIs.
295+ * @details If enabled then the memory heap allocator APIs are included
296+ * in the kernel.
297+ *
298+ * @note The default is @p TRUE.
299+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
300+ * @p CH_USE_SEMAPHORES.
301+ * @note Mutexes are recommended.
302+ */
303+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
304+#define CH_USE_HEAP TRUE
305+#endif
306+
307+/**
308+ * @brief C-runtime allocator.
309+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
310+ * @p malloc() and @p free() functions.
311+ *
312+ * @note The default is @p FALSE.
313+ * @note Requires @p CH_USE_HEAP.
314+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
315+ * appropriate documentation.
316+ */
317+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
318+#define CH_USE_MALLOC_HEAP FALSE
319+#endif
320+
321+/**
322+ * @brief Memory Pools Allocator APIs.
323+ * @details If enabled then the memory pools allocator APIs are included
324+ * in the kernel.
325+ *
326+ * @note The default is @p TRUE.
327+ */
328+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
329+#define CH_USE_MEMPOOLS TRUE
330+#endif
331+
332+/**
333+ * @brief Dynamic Threads APIs.
334+ * @details If enabled then the dynamic threads creation APIs are included
335+ * in the kernel.
336+ *
337+ * @note The default is @p TRUE.
338+ * @note Requires @p CH_USE_WAITEXIT.
339+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
340+ */
341+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
342+#define CH_USE_DYNAMIC TRUE
343+#endif
344+
345+/** @} */
346+
347+/*===========================================================================*/
348+/**
349+ * @name Debug options
350+ * @{
351+ */
352+/*===========================================================================*/
353+
354+/**
355+ * @brief Debug option, system state check.
356+ * @details If enabled the correct call protocol for system APIs is checked
357+ * at runtime.
358+ *
359+ * @note The default is @p FALSE.
360+ */
361+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
362+#define CH_DBG_SYSTEM_STATE_CHECK TRUE
363+#endif
364+
365+/**
366+ * @brief Debug option, parameters checks.
367+ * @details If enabled then the checks on the API functions input
368+ * parameters are activated.
369+ *
370+ * @note The default is @p FALSE.
371+ */
372+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
373+#define CH_DBG_ENABLE_CHECKS TRUE
374+#endif
375+
376+/**
377+ * @brief Debug option, consistency checks.
378+ * @details If enabled then all the assertions in the kernel code are
379+ * activated. This includes consistency checks inside the kernel,
380+ * runtime anomalies and port-defined checks.
381+ *
382+ * @note The default is @p FALSE.
383+ */
384+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
385+#define CH_DBG_ENABLE_ASSERTS TRUE
386+#endif
387+
388+/**
389+ * @brief Debug option, trace buffer.
390+ * @details If enabled then the context switch circular trace buffer is
391+ * activated.
392+ *
393+ * @note The default is @p FALSE.
394+ */
395+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
396+#define CH_DBG_ENABLE_TRACE TRUE
397+#endif
398+
399+/**
400+ * @brief Debug option, stack checks.
401+ * @details If enabled then a runtime stack check is performed.
402+ *
403+ * @note The default is @p FALSE.
404+ * @note The stack check is performed in a architecture/port dependent way.
405+ * It may not be implemented or some ports.
406+ * @note The default failure mode is to halt the system with the global
407+ * @p panic_msg variable set to @p NULL.
408+ */
409+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
410+#define CH_DBG_ENABLE_STACK_CHECK TRUE
411+#endif
412+
413+/**
414+ * @brief Debug option, stacks initialization.
415+ * @details If enabled then the threads working area is filled with a byte
416+ * value when a thread is created. This can be useful for the
417+ * runtime measurement of the used stack.
418+ *
419+ * @note The default is @p FALSE.
420+ */
421+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
422+#define CH_DBG_FILL_THREADS TRUE
423+#endif
424+
425+/**
426+ * @brief Debug option, threads profiling.
427+ * @details If enabled then a field is added to the @p Thread structure that
428+ * counts the system ticks occurred while executing the thread.
429+ *
430+ * @note The default is @p TRUE.
431+ * @note This debug option is defaulted to TRUE because it is required by
432+ * some test cases into the test suite.
433+ */
434+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
435+#define CH_DBG_THREADS_PROFILING TRUE
436+#endif
437+
438+/** @} */
439+
440+/*===========================================================================*/
441+/**
442+ * @name Kernel hooks
443+ * @{
444+ */
445+/*===========================================================================*/
446+
447+/**
448+ * @brief Threads descriptor structure extension.
449+ * @details User fields added to the end of the @p Thread structure.
450+ */
451+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
452+#define THREAD_EXT_FIELDS \
453+ /* Add threads custom fields here.*/
454+#endif
455+
456+/**
457+ * @brief Threads initialization hook.
458+ * @details User initialization code added to the @p chThdInit() API.
459+ *
460+ * @note It is invoked from within @p chThdInit() and implicitly from all
461+ * the threads creation APIs.
462+ */
463+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
464+#define THREAD_EXT_INIT_HOOK(tp) { \
465+ /* Add threads initialization code here.*/ \
466+}
467+#endif
468+
469+/**
470+ * @brief Threads finalization hook.
471+ * @details User finalization code added to the @p chThdExit() API.
472+ *
473+ * @note It is inserted into lock zone.
474+ * @note It is also invoked when the threads simply return in order to
475+ * terminate.
476+ */
477+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
478+#define THREAD_EXT_EXIT_HOOK(tp) { \
479+ /* Add threads finalization code here.*/ \
480+}
481+#endif
482+
483+/**
484+ * @brief Context switch hook.
485+ * @details This hook is invoked just before switching between threads.
486+ */
487+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
488+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
489+ /* System halt code here.*/ \
490+}
491+#endif
492+
493+/**
494+ * @brief Idle Loop hook.
495+ * @details This hook is continuously invoked by the idle thread loop.
496+ */
497+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
498+#define IDLE_LOOP_HOOK() { \
499+ /* Idle loop code here.*/ \
500+}
501+#endif
502+
503+/**
504+ * @brief System tick event hook.
505+ * @details This hook is invoked in the system tick handler immediately
506+ * after processing the virtual timers queue.
507+ */
508+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
509+#define SYSTEM_TICK_EVENT_HOOK() { \
510+ /* System tick event code here.*/ \
511+}
512+#endif
513+
514+/**
515+ * @brief System halt hook.
516+ * @details This hook is invoked in case to a system halting error before
517+ * the system is halted.
518+ */
519+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
520+#define SYSTEM_HALT_HOOK() { \
521+ /* System halt code here.*/ \
522+}
523+#endif
524+
525+/** @} */
526+
527+/*===========================================================================*/
528+/* Port-specific settings (override port settings defaulted in chcore.h). */
529+/*===========================================================================*/
530+
531+#endif /* _CHCONF_H_ */
532+
533+/** @} */
--- branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/halconf.h (nonexistent)
+++ branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/halconf.h (revision 6052)
@@ -0,0 +1,328 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/**
18+ * @file templates/halconf.h
19+ * @brief HAL configuration header.
20+ * @details HAL configuration file, this file allows to enable or disable the
21+ * various device drivers from your application. You may also use
22+ * this file in order to override the device drivers default settings.
23+ *
24+ * @addtogroup HAL_CONF
25+ * @{
26+ */
27+
28+#ifndef _HALCONF_H_
29+#define _HALCONF_H_
30+
31+#include "mcuconf.h"
32+
33+/**
34+ * @brief Enables the TM subsystem.
35+ */
36+#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
37+#define HAL_USE_TM TRUE
38+#endif
39+
40+/**
41+ * @brief Enables the PAL subsystem.
42+ */
43+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
44+#define HAL_USE_PAL TRUE
45+#endif
46+
47+/**
48+ * @brief Enables the ADC subsystem.
49+ */
50+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
51+#define HAL_USE_ADC FALSE
52+#endif
53+
54+/**
55+ * @brief Enables the CAN subsystem.
56+ */
57+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
58+#define HAL_USE_CAN FALSE
59+#endif
60+
61+/**
62+ * @brief Enables the EXT subsystem.
63+ */
64+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
65+#define HAL_USE_EXT FALSE
66+#endif
67+
68+/**
69+ * @brief Enables the GPT subsystem.
70+ */
71+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
72+#define HAL_USE_GPT FALSE
73+#endif
74+
75+/**
76+ * @brief Enables the I2C subsystem.
77+ */
78+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
79+#define HAL_USE_I2C FALSE
80+#endif
81+
82+/**
83+ * @brief Enables the ICU subsystem.
84+ */
85+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
86+#define HAL_USE_ICU FALSE
87+#endif
88+
89+/**
90+ * @brief Enables the MAC subsystem.
91+ */
92+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
93+#define HAL_USE_MAC FALSE
94+#endif
95+
96+/**
97+ * @brief Enables the MMC_SPI subsystem.
98+ */
99+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
100+#define HAL_USE_MMC_SPI FALSE
101+#endif
102+
103+/**
104+ * @brief Enables the PWM subsystem.
105+ */
106+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
107+#define HAL_USE_PWM FALSE
108+#endif
109+
110+/**
111+ * @brief Enables the RTC subsystem.
112+ */
113+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
114+#define HAL_USE_RTC FALSE
115+#endif
116+
117+/**
118+ * @brief Enables the SDC subsystem.
119+ */
120+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
121+#define HAL_USE_SDC FALSE
122+#endif
123+
124+/**
125+ * @brief Enables the SERIAL subsystem.
126+ */
127+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
128+#define HAL_USE_SERIAL FALSE
129+#endif
130+
131+/**
132+ * @brief Enables the SERIAL over USB subsystem.
133+ */
134+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
135+#define HAL_USE_SERIAL_USB FALSE
136+#endif
137+
138+/**
139+ * @brief Enables the SPI subsystem.
140+ */
141+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
142+#define HAL_USE_SPI FALSE
143+#endif
144+
145+/**
146+ * @brief Enables the UART subsystem.
147+ */
148+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
149+#define HAL_USE_UART TRUE
150+#endif
151+
152+/**
153+ * @brief Enables the DBGUART subsystem.
154+ */
155+#if !defined(HAL_USE_DBGUART) || defined(__DOXYGEN__)
156+#define HAL_USE_DBGUART TRUE
157+#endif
158+
159+/**
160+ * @brief Enables the USB subsystem.
161+ */
162+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
163+#define HAL_USE_USB FALSE
164+#endif
165+
166+/*===========================================================================*/
167+/* ADC driver related settings. */
168+/*===========================================================================*/
169+
170+/**
171+ * @brief Enables synchronous APIs.
172+ * @note Disabling this option saves both code and data space.
173+ */
174+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
175+#define ADC_USE_WAIT TRUE
176+#endif
177+
178+/**
179+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
180+ * @note Disabling this option saves both code and data space.
181+ */
182+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
183+#define ADC_USE_MUTUAL_EXCLUSION TRUE
184+#endif
185+
186+/*===========================================================================*/
187+/* CAN driver related settings. */
188+/*===========================================================================*/
189+
190+/**
191+ * @brief Sleep mode related APIs inclusion switch.
192+ */
193+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
194+#define CAN_USE_SLEEP_MODE TRUE
195+#endif
196+
197+/*===========================================================================*/
198+/* I2C driver related settings. */
199+/*===========================================================================*/
200+
201+/**
202+ * @brief Enables the mutual exclusion APIs on the I2C bus.
203+ */
204+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
205+#define I2C_USE_MUTUAL_EXCLUSION TRUE
206+#endif
207+
208+/*===========================================================================*/
209+/* MAC driver related settings. */
210+/*===========================================================================*/
211+
212+/**
213+ * @brief Enables an event sources for incoming packets.
214+ */
215+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
216+#define MAC_USE_ZERO_COPY FALSE
217+#endif
218+
219+/**
220+ * @brief Enables an event sources for incoming packets.
221+ */
222+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
223+#define MAC_USE_EVENTS TRUE
224+#endif
225+
226+/*===========================================================================*/
227+/* MMC_SPI driver related settings. */
228+/*===========================================================================*/
229+
230+/**
231+ * @brief Delays insertions.
232+ * @details If enabled this options inserts delays into the MMC waiting
233+ * routines releasing some extra CPU time for the threads with
234+ * lower priority, this may slow down the driver a bit however.
235+ * This option is recommended also if the SPI driver does not
236+ * use a DMA channel and heavily loads the CPU.
237+ */
238+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
239+#define MMC_NICE_WAITING TRUE
240+#endif
241+
242+/*===========================================================================*/
243+/* SDC driver related settings. */
244+/*===========================================================================*/
245+
246+/**
247+ * @brief Number of initialization attempts before rejecting the card.
248+ * @note Attempts are performed at 10mS intervals.
249+ */
250+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
251+#define SDC_INIT_RETRY 100
252+#endif
253+
254+/**
255+ * @brief Include support for MMC cards.
256+ * @note MMC support is not yet implemented so this option must be kept
257+ * at @p FALSE.
258+ */
259+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
260+#define SDC_MMC_SUPPORT FALSE
261+#endif
262+
263+/**
264+ * @brief Delays insertions.
265+ * @details If enabled this options inserts delays into the MMC waiting
266+ * routines releasing some extra CPU time for the threads with
267+ * lower priority, this may slow down the driver a bit however.
268+ */
269+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
270+#define SDC_NICE_WAITING TRUE
271+#endif
272+
273+/*===========================================================================*/
274+/* SERIAL driver related settings. */
275+/*===========================================================================*/
276+
277+/**
278+ * @brief Default bit rate.
279+ * @details Configuration parameter, this is the baud rate selected for the
280+ * default configuration.
281+ */
282+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
283+#define SERIAL_DEFAULT_BITRATE 38400
284+#endif
285+
286+/**
287+ * @brief Default bit rate for debug UART.
288+ * @details Configuration parameter, this is the baud rate selected for the
289+ * default configuration.
290+ */
291+#if !defined(DBGUART_BITRATE) || defined(__DOXYGEN__)
292+#define DBGUART_BITRATE 38400
293+#endif
294+
295+/**
296+ * @brief Serial buffers size.
297+ * @details Configuration parameter, you can change the depth of the queue
298+ * buffers depending on the requirements of your application.
299+ * @note The default is 64 bytes for both the transmission and receive
300+ * buffers.
301+ */
302+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
303+#define SERIAL_BUFFERS_SIZE 16
304+#endif
305+
306+/*===========================================================================*/
307+/* SPI driver related settings. */
308+/*===========================================================================*/
309+
310+/**
311+ * @brief Enables synchronous APIs.
312+ * @note Disabling this option saves both code and data space.
313+ */
314+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
315+#define SPI_USE_WAIT TRUE
316+#endif
317+
318+/**
319+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
320+ * @note Disabling this option saves both code and data space.
321+ */
322+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
323+#define SPI_USE_MUTUAL_EXCLUSION TRUE
324+#endif
325+
326+#endif /* _HALCONF_H_ */
327+
328+/** @} */
--- branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/main.c (nonexistent)
+++ branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/main.c (revision 6052)
@@ -0,0 +1,68 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+#include "ch.h"
18+#include "hal.h"
19+
20+/*
21+ *
22+ */
23+void togglePanicLed(void){
24+ palTogglePad(GPIOB, GPIOB_LED_R);
25+}
26+
27+/*
28+ * Application entry point.
29+ */
30+int main(void) {
31+
32+ /*
33+ * System initializations.
34+ * - HAL initialization, this also initializes the configured device drivers
35+ * and performs the board-specific initializations.
36+ * - Kernel initialization, the main() function becomes a thread and the
37+ * RTOS is active.
38+ */
39+ halInit();
40+ chSysInit();
41+
42+ /*
43+ * Route PA2(TX) and PA3(RX) pins to USART2 (our dbg uart).
44+ */
45+ palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));
46+ palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));
47+
48+ /*
49+ const char* msg = "test\r\n";
50+ port_disable();
51+ while (1) {
52+ dbguartSend(&DBGUARTD, 8, msg);
53+ }
54+ */
55+
56+ /*
57+ * main goal of this hal test
58+ */
59+ uint32_t* test = NULL;
60+ chDbgCheck(NULL != test, "Null pointer forbidden");
61+
62+ /*
63+ * Normal main() thread activity, in this demo it never reached.
64+ */
65+ while (TRUE) {
66+ chThdSleepMilliseconds(500);
67+ }
68+}
--- branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/mcuconf.h (nonexistent)
+++ branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/mcuconf.h (revision 6052)
@@ -0,0 +1,295 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/*
18+ * STM32F4xx drivers configuration.
19+ * The following settings override the default settings present in
20+ * the various device driver implementation headers.
21+ * Note that the settings for each driver only have effect if the whole
22+ * driver is enabled in halconf.h.
23+ *
24+ * IRQ priorities:
25+ * 15...0 Lowest...Highest.
26+ *
27+ * DMA priorities:
28+ * 0...3 Lowest...Highest.
29+ */
30+
31+#define STM32F4xx_MCUCONF
32+
33+/*
34+ * HAL driver system settings.
35+ */
36+#define STM32_NO_INIT FALSE
37+#define STM32_HSI_ENABLED TRUE
38+#define STM32_LSI_ENABLED TRUE
39+#define STM32_HSE_ENABLED TRUE
40+#define STM32_LSE_ENABLED FALSE
41+#define STM32_CLOCK48_REQUIRED TRUE
42+#define STM32_SW STM32_SW_PLL
43+#define STM32_PLLSRC STM32_PLLSRC_HSE
44+#define STM32_PLLM_VALUE 8
45+#define STM32_PLLN_VALUE 336
46+#define STM32_PLLP_VALUE 2
47+#define STM32_PLLQ_VALUE 7
48+#define STM32_HPRE STM32_HPRE_DIV1
49+#define STM32_PPRE1 STM32_PPRE1_DIV4
50+#define STM32_PPRE2 STM32_PPRE2_DIV2
51+#define STM32_RTCSEL STM32_RTCSEL_LSI
52+#define STM32_RTCPRE_VALUE 8
53+#define STM32_MCO1SEL STM32_MCO1SEL_HSI
54+#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
55+#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
56+#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
57+#define STM32_I2SSRC STM32_I2SSRC_CKIN
58+#define STM32_PLLI2SN_VALUE 192
59+#define STM32_PLLI2SR_VALUE 5
60+#define STM32_VOS STM32_VOS_HIGH
61+#define STM32_PVD_ENABLE FALSE
62+#define STM32_PLS STM32_PLS_LEV0
63+
64+/*
65+ * ADC driver system settings.
66+ */
67+#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
68+#define STM32_ADC_USE_ADC1 FALSE
69+#define STM32_ADC_USE_ADC2 FALSE
70+#define STM32_ADC_USE_ADC3 FALSE
71+#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
72+#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
73+#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
74+#define STM32_ADC_ADC1_DMA_PRIORITY 2
75+#define STM32_ADC_ADC2_DMA_PRIORITY 2
76+#define STM32_ADC_ADC3_DMA_PRIORITY 2
77+#define STM32_ADC_IRQ_PRIORITY 6
78+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
79+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
80+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
81+
82+/*
83+ * CAN driver system settings.
84+ */
85+#define STM32_CAN_USE_CAN1 FALSE
86+#define STM32_CAN_USE_CAN2 FALSE
87+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
88+#define STM32_CAN_CAN2_IRQ_PRIORITY 11
89+
90+/*
91+ * EXT driver system settings.
92+ */
93+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
94+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
95+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
96+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
97+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
98+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
99+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
100+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
101+#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
102+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
103+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
104+#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
105+#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
106+#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
107+
108+/*
109+ * GPT driver system settings.
110+ */
111+#define STM32_GPT_USE_TIM1 FALSE
112+#define STM32_GPT_USE_TIM2 FALSE
113+#define STM32_GPT_USE_TIM3 FALSE
114+#define STM32_GPT_USE_TIM4 FALSE
115+#define STM32_GPT_USE_TIM5 FALSE
116+#define STM32_GPT_USE_TIM6 FALSE
117+#define STM32_GPT_USE_TIM7 FALSE
118+#define STM32_GPT_USE_TIM8 FALSE
119+#define STM32_GPT_USE_TIM9 FALSE
120+#define STM32_GPT_USE_TIM11 FALSE
121+#define STM32_GPT_USE_TIM12 FALSE
122+#define STM32_GPT_USE_TIM14 FALSE
123+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
124+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
125+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
126+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
127+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
128+#define STM32_GPT_TIM6_IRQ_PRIORITY 7
129+#define STM32_GPT_TIM7_IRQ_PRIORITY 7
130+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
131+#define STM32_GPT_TIM9_IRQ_PRIORITY 7
132+#define STM32_GPT_TIM11_IRQ_PRIORITY 7
133+#define STM32_GPT_TIM12_IRQ_PRIORITY 7
134+#define STM32_GPT_TIM14_IRQ_PRIORITY 7
135+
136+/*
137+ * I2C driver system settings.
138+ */
139+#define STM32_I2C_USE_I2C1 FALSE
140+#define STM32_I2C_USE_I2C2 FALSE
141+#define STM32_I2C_USE_I2C3 FALSE
142+#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
143+#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
144+#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
145+#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
146+#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
147+#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
148+#define STM32_I2C_I2C1_IRQ_PRIORITY 5
149+#define STM32_I2C_I2C2_IRQ_PRIORITY 5
150+#define STM32_I2C_I2C3_IRQ_PRIORITY 5
151+#define STM32_I2C_I2C1_DMA_PRIORITY 3
152+#define STM32_I2C_I2C2_DMA_PRIORITY 3
153+#define STM32_I2C_I2C3_DMA_PRIORITY 3
154+#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
155+#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
156+#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt()
157+
158+/*
159+ * ICU driver system settings.
160+ */
161+#define STM32_ICU_USE_TIM1 FALSE
162+#define STM32_ICU_USE_TIM2 FALSE
163+#define STM32_ICU_USE_TIM3 FALSE
164+#define STM32_ICU_USE_TIM4 FALSE
165+#define STM32_ICU_USE_TIM5 FALSE
166+#define STM32_ICU_USE_TIM8 FALSE
167+#define STM32_ICU_USE_TIM9 FALSE
168+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
169+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
170+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
171+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
172+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
173+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
174+#define STM32_ICU_TIM9_IRQ_PRIORITY 7
175+
176+/*
177+ * MAC driver system settings.
178+ */
179+#define STM32_MAC_TRANSMIT_BUFFERS 2
180+#define STM32_MAC_RECEIVE_BUFFERS 4
181+#define STM32_MAC_BUFFERS_SIZE 1522
182+#define STM32_MAC_PHY_TIMEOUT 100
183+#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
184+#define STM32_MAC_ETH1_IRQ_PRIORITY 13
185+#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
186+
187+/*
188+ * PWM driver system settings.
189+ */
190+#define STM32_PWM_USE_ADVANCED FALSE
191+#define STM32_PWM_USE_TIM1 FALSE
192+#define STM32_PWM_USE_TIM2 FALSE
193+#define STM32_PWM_USE_TIM3 FALSE
194+#define STM32_PWM_USE_TIM4 FALSE
195+#define STM32_PWM_USE_TIM5 FALSE
196+#define STM32_PWM_USE_TIM8 FALSE
197+#define STM32_PWM_USE_TIM9 FALSE
198+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
199+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
200+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
201+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
202+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
203+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
204+#define STM32_PWM_TIM9_IRQ_PRIORITY 7
205+
206+/*
207+ * SERIAL driver system settings.
208+ */
209+#define STM32_SERIAL_USE_USART1 FALSE
210+#define STM32_SERIAL_USE_USART2 FALSE
211+#define STM32_SERIAL_USE_USART3 FALSE
212+#define STM32_SERIAL_USE_UART4 FALSE
213+#define STM32_SERIAL_USE_UART5 FALSE
214+#define STM32_SERIAL_USE_USART6 FALSE
215+#define STM32_SERIAL_USART1_PRIORITY 12
216+#define STM32_SERIAL_USART2_PRIORITY 12
217+#define STM32_SERIAL_USART3_PRIORITY 12
218+#define STM32_SERIAL_UART4_PRIORITY 12
219+#define STM32_SERIAL_UART5_PRIORITY 12
220+#define STM32_SERIAL_USART6_PRIORITY 12
221+
222+/*
223+ * SPI driver system settings.
224+ */
225+#define STM32_SPI_USE_SPI1 FALSE
226+#define STM32_SPI_USE_SPI2 FALSE
227+#define STM32_SPI_USE_SPI3 FALSE
228+#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
229+#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
230+#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
231+#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
232+#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
233+#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
234+#define STM32_SPI_SPI1_DMA_PRIORITY 1
235+#define STM32_SPI_SPI2_DMA_PRIORITY 1
236+#define STM32_SPI_SPI3_DMA_PRIORITY 1
237+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
238+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
239+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
240+#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
241+
242+/*
243+ * UART driver system settings.
244+ */
245+#define STM32_UART_USE_USART1 TRUE
246+#define STM32_UART_USE_USART2 TRUE
247+#define STM32_UART_USE_USART3 TRUE
248+#define STM32_UART_USE_UART4 TRUE
249+#define STM32_UART_USE_UART5 TRUE
250+#define STM32_UART_USE_USART6 TRUE
251+#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
252+#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
253+#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
254+#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
255+#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
256+#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
257+#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
258+#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
259+#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
260+#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
261+#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
262+#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
263+#define STM32_UART_USART1_IRQ_PRIORITY 12
264+#define STM32_UART_USART2_IRQ_PRIORITY 12
265+#define STM32_UART_USART3_IRQ_PRIORITY 12
266+#define STM32_UART_UART4_IRQ_PRIORITY 12
267+#define STM32_UART_UART5_IRQ_PRIORITY 12
268+#define STM32_UART_USART6_IRQ_PRIORITY 12
269+#define STM32_UART_USART1_DMA_PRIORITY 0
270+#define STM32_UART_USART2_DMA_PRIORITY 0
271+#define STM32_UART_USART3_DMA_PRIORITY 0
272+#define STM32_UART_UART4_DMA_PRIORITY 0
273+#define STM32_UART_UART5_DMA_PRIORITY 0
274+#define STM32_UART_USART6_DMA_PRIORITY 0
275+#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
276+
277+/*
278+ * USB driver system settings.
279+ */
280+#define STM32_USB_USE_OTG1 FALSE
281+#define STM32_USB_USE_OTG2 FALSE
282+#define STM32_USB_OTG1_IRQ_PRIORITY 14
283+#define STM32_USB_OTG2_IRQ_PRIORITY 14
284+#define STM32_USB_OTG1_RX_FIFO_SIZE 512
285+#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
286+#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
287+#define STM32_USB_OTG_THREAD_STACK_SIZE 128
288+#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
289+
290+/*
291+ * Debug settings
292+ */
293+#define STM32_DBGUART_USE_USART2 TRUE
294+#define STM32_SOFTRESET_ON_PANIC FALSE
295+
--- branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/readme.txt (nonexistent)
+++ branches/dbg_improvements/testhal/STM32F4xx/DBG_UART/readme.txt (revision 6052)
@@ -0,0 +1,31 @@
1+*****************************************************************************
2+** ChibiOS/RT HAL - DBGUART driver demo for STM32F4xx. **
3+*****************************************************************************
4+
5+** TARGET **
6+
7+The demo runs on an STMicroelectronics STM32F4-Discovery board.
8+
9+** The Demo **
10+
11+The application demonstrates the use of the STM32F4xx DBGUART driver.
12+
13+** Board Setup **
14+
15+- Connect an RS232 transceiver to pins PA2(TX) and PA3(RX).
16+- Connect a terminal emulator to the transceiver (38400-N-8-1).
17+
18+** Build Procedure **
19+
20+The demo has been tested using the free GNU Tools for ARM Embedded Processors
21+on Linux host.
22+Just modify the TRGT line in the makefile in order to use different GCC ports.
23+
24+** Notes **
25+
26+Some files used by the demo are not part of ChibiOS/RT but are copyright of
27+ST Microelectronics and are licensed under a different license.
28+Also note that not all the files present in the ST library are distributed
29+with ChibiOS/RT, you can find the whole library on the ST web site:
30+
31+ http://www.st.com
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