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chibios: Commit


Commit MetaInfo

Revision6625 (tree)
Time2014-01-13 06:03:48
Authorlbednarz

Log Message

passes all tests, only tx part of serial driver

Change Summary

Incremental Difference

--- branches/rl78_dev/boards/RENESAS_YRPBRL78G13/board.c (revision 6624)
+++ branches/rl78_dev/boards/RENESAS_YRPBRL78G13/board.c (revision 6625)
@@ -56,7 +56,6 @@
5656 chSysLockFromIsr();
5757 chSysTimerHandlerI();
5858 chSysUnlockFromIsr();
59- TMIF00 = 0;
6059
6160 CH_IRQ_EPILOGUE();
6261 }
--- branches/rl78_dev/demos/RL78-DEMO-GCC/chconf.h (revision 6624)
+++ branches/rl78_dev/demos/RL78-DEMO-GCC/chconf.h (revision 6625)
@@ -109,7 +109,7 @@
109109 * @note The default is @p TRUE.
110110 */
111111 #if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
112-#define CH_OPTIMIZE_SPEED TRUE
112+#define CH_OPTIMIZE_SPEED FALSE
113113 #endif
114114
115115 /** @} */
--- branches/rl78_dev/demos/RL78-DEMO-GCC/halconf.h (revision 6624)
+++ branches/rl78_dev/demos/RL78-DEMO-GCC/halconf.h (revision 6625)
@@ -125,7 +125,7 @@
125125 * @brief Enables the SERIAL subsystem.
126126 */
127127 #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
128-#define HAL_USE_SERIAL FALSE
128+#define HAL_USE_SERIAL TRUE
129129 #endif
130130
131131 /**
--- branches/rl78_dev/demos/RL78-DEMO-GCC/main.c (revision 6624)
+++ branches/rl78_dev/demos/RL78-DEMO-GCC/main.c (revision 6625)
@@ -16,6 +16,7 @@
1616
1717 #include "ch.h"
1818 #include "hal.h"
19+#include "test.h"
1920
2021 /*
2122 To summarize, user can use following set of options (command line) to achieve,
@@ -90,6 +91,8 @@
9091 halInit();
9192 chSysInit();
9293
94+ sdStart(&SD2, NULL);
95+
9396 /*
9497 * Leds initialization.
9598 */
@@ -101,9 +104,9 @@
101104 * Normal main() thread activity, in this demo it does nothing except
102105 * sleeping in a loop.
103106 */
107+ TestThread(&SD2);
104108 while (TRUE) {
105109 chThdSleepMilliseconds(100);
106110 }
107111 return 0;
108112 }
109-
--- branches/rl78_dev/demos/RL78-DEMO-GCC/mcuconf.h (revision 6624)
+++ branches/rl78_dev/demos/RL78-DEMO-GCC/mcuconf.h (revision 6625)
@@ -1,5 +1,5 @@
11 /*
2- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
2+ ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
33
44 Licensed under the Apache License, Version 2.0 (the "License");
55 you may not use this file except in compliance with the License.
@@ -15,7 +15,7 @@
1515 */
1616
1717 /*
18- * RX62N drivers configuration.
18+ * RL78 drivers configuration.
1919 * The following settings override the default settings present in
2020 * the various device driver implementation headers.
2121 * Note that the settings for each driver only have effect if the driver
@@ -45,9 +45,10 @@
4545 /*
4646 * SERIAL driver system settings.
4747 */
48-#define RL78_SERIAL_USE_UART0 TRUE
48+#define RL78_SERIAL_USE_UART0 FALSE
4949 #define RL78_SERIAL_UART0_IRQ_PRIORITY 3
50-#define RL78_SERIAL_USE_UART1 FALSE
50+#define RL78_SERIAL_USE_UART1 TRUE
51+#define RL78_SERIAL_UART1_IRQ_PRIORITY 3
5152
5253 /*
5354 * SPI driver system settings.
--- branches/rl78_dev/docs/reports/R5F100xE-32-GCC.txt (nonexistent)
+++ branches/rl78_dev/docs/reports/R5F100xE-32-GCC.txt (revision 6625)
@@ -0,0 +1,146 @@
1+***************************************************************************
2+Options: -O3 -fomit-frame-pointer
3+Settings: CLK=32
4+***************************************************************************
5+
6+*** ChibiOS/RT test suite
7+***
8+*** Kernel: 2.6.2
9+*** Compiled: Jan 12 2014 - 20:22:28
10+*** Compiler: GCC 4.8-GNURL78_v13.02 20131003 (MP1) (Red Hat/devo) [trunk revision 194496]
11+*** Architecture: RL78
12+*** Test Board: Renesas YRPBRL78G13
13+
14+----------------------------------------------------------------------------
15+--- Test Case 1.1 (Threads, enqueuing test #1)
16+--- Result: SUCCESS
17+----------------------------------------------------------------------------
18+--- Test Case 1.2 (Threads, enqueuing test #2)
19+--- Result: SUCCESS
20+----------------------------------------------------------------------------
21+--- Test Case 1.3 (Threads, priority change)
22+--- Result: SUCCESS
23+----------------------------------------------------------------------------
24+--- Test Case 1.4 (Threads, delays)
25+--- Result: SUCCESS
26+----------------------------------------------------------------------------
27+--- Test Case 2.1 (Semaphores, enqueuing)
28+--- Result: SUCCESS
29+----------------------------------------------------------------------------
30+--- Test Case 2.2 (Semaphores, timeout)
31+--- Result: SUCCESS
32+----------------------------------------------------------------------------
33+--- Test Case 2.3 (Semaphores, atomic signal-wait)
34+--- Result: SUCCESS
35+----------------------------------------------------------------------------
36+--- Test Case 2.4 (Binary Semaphores, functionality)
37+--- Result: SUCCESS
38+----------------------------------------------------------------------------
39+--- Test Case 3.1 (Mutexes, priority enqueuing test)
40+--- Result: SUCCESS
41+----------------------------------------------------------------------------
42+--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
43+--- Result: SUCCESS
44+----------------------------------------------------------------------------
45+--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
46+--- Result: SUCCESS
47+----------------------------------------------------------------------------
48+--- Test Case 3.4 (Mutexes, priority return)
49+--- Result: SUCCESS
50+----------------------------------------------------------------------------
51+--- Test Case 3.5 (Mutexes, status)
52+--- Result: SUCCESS
53+----------------------------------------------------------------------------
54+--- Test Case 3.6 (CondVar, signal test)
55+--- Result: SUCCESS
56+----------------------------------------------------------------------------
57+--- Test Case 3.7 (CondVar, broadcast test)
58+--- Result: SUCCESS
59+----------------------------------------------------------------------------
60+--- Test Case 3.8 (CondVar, boost test)
61+--- Result: SUCCESS
62+----------------------------------------------------------------------------
63+--- Test Case 4.1 (Messages, loop)
64+--- Result: SUCCESS
65+----------------------------------------------------------------------------
66+--- Test Case 5.1 (Mailboxes, queuing and timeouts)
67+--- Result: SUCCESS
68+----------------------------------------------------------------------------
69+--- Test Case 6.1 (Events, registration and dispatch)
70+--- Result: SUCCESS
71+----------------------------------------------------------------------------
72+--- Test Case 6.2 (Events, wait and broadcast)
73+--- Result: SUCCESS
74+----------------------------------------------------------------------------
75+--- Test Case 6.3 (Events, timeouts)
76+--- Result: SUCCESS
77+----------------------------------------------------------------------------
78+--- Test Case 10.1 (Queues, input queues)
79+--- Result: SUCCESS
80+----------------------------------------------------------------------------
81+--- Test Case 10.2 (Queues, output queues)
82+--- Result: SUCCESS
83+----------------------------------------------------------------------------
84+--- Test Case 11.1 (Benchmark, messages #1)
85+--- Score : 22357 msgs/S, 44714 ctxswc/S
86+--- Result: SUCCESS
87+----------------------------------------------------------------------------
88+--- Test Case 11.2 (Benchmark, messages #2)
89+--- Score : 2201 msgs/S, 4402 ctxswc/S
90+--- Result: SUCCESS
91+----------------------------------------------------------------------------
92+--- Test Case 11.3 (Benchmark, messages #3)
93+--- Score : 2201 msgs/S, 4402 ctxswc/S
94+--- Result: SUCCESS
95+----------------------------------------------------------------------------
96+--- Test Case 11.4 (Benchmark, context switch)
97+--- Score : 299232 ctxswc/S
98+--- Result: SUCCESS
99+----------------------------------------------------------------------------
100+--- Test Case 11.5 (Benchmark, threads, full cycle)
101+--- Score : 55294 threads/S
102+--- Result: SUCCESS
103+----------------------------------------------------------------------------
104+--- Test Case 11.6 (Benchmark, threads, create only)
105+--- Score : 76145 threads/S
106+--- Result: SUCCESS
107+----------------------------------------------------------------------------
108+--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
109+--- Score : 22773 reschedules/S, 136638 ctxswc/S
110+--- Result: SUCCESS
111+----------------------------------------------------------------------------
112+--- Test Case 11.8 (Benchmark, round robin context switching)
113+--- Score : 168580 ctxswc/S
114+--- Result: SUCCESS
115+----------------------------------------------------------------------------
116+--- Test Case 11.9 (Benchmark, I/O Queues throughput)
117+--- Score : 211644 bytes/S
118+--- Result: SUCCESS
119+----------------------------------------------------------------------------
120+--- Test Case 11.10 (Benchmark, virtual timers set/reset)
121+--- Score : 224684 timers/S
122+--- Result: SUCCESS
123+----------------------------------------------------------------------------
124+--- Test Case 11.11 (Benchmark, semaphores wait/signal)
125+--- Score : 418428 wait+signal/S
126+--- Result: SUCCESS
127+----------------------------------------------------------------------------
128+--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
129+--- Score : 252712 lock+unlock/S
130+--- Result: SUCCESS
131+----------------------------------------------------------------------------
132+--- Test Case 11.13 (Benchmark, RAM footprint)
133+--- System: 310 bytes
134+--- Thread: 36 bytes
135+--- Timer : 10 bytes
136+--- Semaph: 6 bytes
137+--- EventS: 2 bytes
138+--- EventL: 6 bytes
139+--- Mutex : 8 bytes
140+--- CondV.: 4 bytes
141+--- Queue : 18 bytes
142+--- MailB.: 20 bytes
143+--- Result: SUCCESS
144+----------------------------------------------------------------------------
145+
146+Final result: SUCCESS
--- branches/rl78_dev/os/hal/platforms/RL78/serial_lld.c (nonexistent)
+++ branches/rl78_dev/os/hal/platforms/RL78/serial_lld.c (revision 6625)
@@ -0,0 +1,271 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/**
18+ * @file RL78/serial_lld.c
19+ * @brief RL78 low level serial driver code.
20+ *
21+ * @addtogroup SERIAL
22+ * @{
23+ */
24+
25+#include "ch.h"
26+#include "hal.h"
27+
28+#if HAL_USE_SERIAL || defined(__DOXYGEN__)
29+
30+/*===========================================================================*/
31+/* Driver exported variables. */
32+/*===========================================================================*/
33+
34+#if RL78_SERIAL_USE_UART0 || defined(__DOXYGEN__)
35+/** @brief UART0 serial driver identifier.*/
36+SerialDriver SD1;
37+#endif
38+
39+#if RL78_SERIAL_USE_UART1 || defined(__DOXYGEN__)
40+/** @brief UART1 serial driver identifier.*/
41+SerialDriver SD2;
42+#endif
43+
44+/*===========================================================================*/
45+/* Driver local variables and types. */
46+/*===========================================================================*/
47+
48+/** @brief Driver default configuration.*/
49+static const SerialConfig default_config = {
50+ .sc_speed = SERIAL_DEFAULT_BITRATE,
51+ .sc_scr = 0,
52+ .sc_smr = 0,
53+};
54+
55+/*===========================================================================*/
56+/* Driver local functions. */
57+/*===========================================================================*/
58+
59+/**
60+ * @brief UART initialization.
61+ *
62+ * @param[in] sdp communication channel associated to the UART
63+ * @param[in] config the architecture-dependent serial driver configuration
64+ */
65+static void uart_init(SerialDriver *sdp, const SerialConfig *config) {
66+
67+ SPS0 = 0x04; // 32MHz/16 = 2MHz
68+ SMR02 = 0x20 | 3;
69+ SCR02 = 0x04 | 0x8000 | 0x80 | 0x10 | 3;
70+ SDR02 = (uint16_t)103<<9; /* hardcoded 9600bps */
71+ SO0 |= 4;
72+ SOE0 |= 4;
73+ PMC0_bit.no2 = 0; // TxD as digital
74+/* RxD1 as digital (initial is analog) */
75+/* PMC0_bit.no3 = 0; */
76+/* TxD1 as digital (initial is analog) */
77+ PM0_bit.no2 = 0;
78+ P0_bit.no2 = 1;
79+ SS0 |= 4;
80+}
81+
82+/**
83+ * @brief UART de-initialization.
84+ *
85+ * @param[in] u pointer to an UART I/O block
86+ */
87+static void uart_deinit(SerialDriver *sdp) {
88+
89+/* ST0 = 0x04; */
90+}
91+
92+/**
93+ * @brief Error handling routine.
94+ *
95+ * @param[in] sdp communication channel associated to the UART
96+ * @param[in] err UART LSR register value
97+ */
98+static void set_error(SerialDriver *sdp, uint32_t err) {
99+
100+ flagsmask_t sts = 0;
101+
102+ if (err & 1)
103+ sts |= SD_OVERRUN_ERROR;
104+ if (err & 2)
105+ sts |= SD_PARITY_ERROR;
106+ if (err & 4)
107+ sts |= SD_FRAMING_ERROR;
108+ chSysLockFromIsr();
109+ chnAddFlagsI(sdp, sts);
110+ chSysUnlockFromIsr();
111+}
112+
113+#if RL78_SERIAL_USE_UART1 || defined(__DOXYGEN__)
114+/**
115+ * @brief Error IRQ handler.
116+ *
117+ * @param[in] sdp communication channel associated to the UART
118+ */
119+static void serve_interrupt_ser1(SerialDriver *sdp) {
120+
121+ set_error(sdp, SSR02);
122+}
123+
124+/**
125+ * @brief Receive IRQ handler.
126+ *
127+ * @param[in] sdp communication channel associated to the UART
128+ */
129+static void serve_interrupt_sr1(SerialDriver *sdp) {
130+
131+}
132+
133+/**
134+ * @brief Transmit IRQ handler.
135+ *
136+ * @param[in] sdp communication channel associated to the UART
137+ */
138+__attribute__((noinline))
139+static void serve_interrupt_st1(SerialDriver *sdp) {
140+
141+ msg_t b;
142+
143+ chSysLockFromIsr();
144+ b = chOQGetI(&sdp->oqueue);
145+ chSysUnlockFromIsr();
146+ if (b < Q_OK) {
147+ STMK1 = 1; /* Disable INTST1 interrupt */
148+ STIF1 = 1; /* Set INTST1 interrupt request flag */
149+ chSysLockFromIsr();
150+ chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
151+ chSysUnlockFromIsr();
152+ return;
153+ }
154+ TXD1 = b;
155+}
156+
157+/**
158+ * @brief Driver SD2 output notification.
159+ */
160+__attribute__((noinline))
161+static void notify2(GenericQueue *qp) {
162+
163+ STMK1 = 0; /* Enable INTST1 interrupt */
164+}
165+#endif
166+
167+/*===========================================================================*/
168+/* Driver interrupt handlers. */
169+/*===========================================================================*/
170+
171+/**
172+ * @brief UART1 IRQ handler.
173+ *
174+ * @isr
175+ */
176+#if RL78_SERIAL_USE_UART1 || defined(__DOXYGEN__)
177+CH_IRQ_HANDLER(INT_SRE1) {
178+
179+ CH_IRQ_PROLOGUE();
180+
181+ serve_interrupt_ser1(&SD2);
182+
183+ CH_IRQ_EPILOGUE();
184+}
185+CH_IRQ_HANDLER(INT_SR1) {
186+
187+ CH_IRQ_PROLOGUE();
188+
189+ serve_interrupt_sr1(&SD2);
190+
191+ CH_IRQ_EPILOGUE();
192+}
193+CH_IRQ_HANDLER(INT_ST1) {
194+
195+ CH_IRQ_PROLOGUE();
196+
197+ serve_interrupt_st1(&SD2);
198+
199+ CH_IRQ_EPILOGUE();
200+}
201+#endif
202+
203+/*===========================================================================*/
204+/* Driver exported functions. */
205+/*===========================================================================*/
206+
207+/**
208+ * @brief Low level serial driver initialization.
209+ *
210+ * @notapi
211+ */
212+void sd_lld_init(void) {
213+
214+#if RL78_SERIAL_USE_UART1
215+ sdObjectInit(&SD2, NULL, notify2);
216+#endif
217+}
218+
219+/**
220+ * @brief Low level serial driver configuration and (re)start.
221+ *
222+ * @param[in] sdp pointer to a @p SerialDriver object
223+ * @param[in] config the architecture-dependent serial driver configuration.
224+ * If this parameter is set to @p NULL then a default
225+ * configuration is used.
226+ *
227+ * @notapi
228+ */
229+void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
230+
231+ if (config == NULL)
232+ config = &default_config;
233+
234+ if (sdp->state == SD_STOP) {
235+#if RL78_SERIAL_USE_UART1
236+ if (&SD2 == sdp) {
237+ SAU0EN = 1;
238+ STIF1 = 1; /* Set INTST1 interrupt request flag */
239+ STMK1 = 1; /* Disable INTST1 interrupt */
240+ STPR11 = 1;
241+ STPR01 = 1; /* Set INTST1 priority: 11b = 3 = lowest */
242+ }
243+#endif
244+ }
245+ uart_init(sdp, config);
246+}
247+
248+/**
249+ * @brief Low level serial driver stop.
250+ * @details De-initializes the UART, stops the associated clock, resets the
251+ * interrupt vector.
252+ *
253+ * @param[in] sdp pointer to a @p SerialDriver object
254+ *
255+ * @notapi
256+ */
257+void sd_lld_stop(SerialDriver *sdp) {
258+
259+ if (sdp->state == SD_READY) {
260+ uart_deinit(sdp);
261+#if RL78_SERIAL_USE_UART1
262+ if (&SD2 == sdp) {
263+ return;
264+ }
265+#endif
266+ }
267+}
268+
269+#endif /* HAL_USE_SERIAL */
270+
271+/** @} */
--- branches/rl78_dev/os/hal/platforms/RL78/serial_lld.h (nonexistent)
+++ branches/rl78_dev/os/hal/platforms/RL78/serial_lld.h (revision 6625)
@@ -0,0 +1,131 @@
1+/*
2+ ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
3+
4+ Licensed under the Apache License, Version 2.0 (the "License");
5+ you may not use this file except in compliance with the License.
6+ You may obtain a copy of the License at
7+
8+ http://www.apache.org/licenses/LICENSE-2.0
9+
10+ Unless required by applicable law or agreed to in writing, software
11+ distributed under the License is distributed on an "AS IS" BASIS,
12+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+ See the License for the specific language governing permissions and
14+ limitations under the License.
15+*/
16+
17+/**
18+ * @file RL78/serial_lld.h
19+ * @brief RL78 low level serial driver header.
20+ *
21+ * @addtogroup SERIAL
22+ * @{
23+ */
24+
25+#ifndef _SERIAL_LLD_H_
26+#define _SERIAL_LLD_H_
27+
28+#if HAL_USE_SERIAL || defined(__DOXYGEN__)
29+
30+/*===========================================================================*/
31+/* Driver constants. */
32+/*===========================================================================*/
33+
34+/*===========================================================================*/
35+/* Driver pre-compile time settings. */
36+/*===========================================================================*/
37+
38+/**
39+ * @brief UART0 driver enable switch.
40+ * @details If set to @p TRUE the support for UART0 is included.
41+ * @note The default is @p TRUE .
42+ */
43+#if !defined(RL78_SERIAL_USE_UART0) || defined(__DOXYGEN__)
44+#define RL78_SERIAL_USE_UART0 FALSE
45+#endif
46+
47+/**
48+ * @brief UART1 driver enable switch.
49+ * @details If set to @p TRUE the support for UART1 is included.
50+ * @note The default is @p TRUE .
51+ */
52+#if !defined(RL78_SERIAL_USE_UART1) || defined(__DOXYGEN__)
53+#define RL78_SERIAL_USE_UART1 FALSE
54+#endif
55+
56+/*===========================================================================*/
57+/* Derived constants and error checks. */
58+/*===========================================================================*/
59+
60+/*===========================================================================*/
61+/* Driver data structures and types. */
62+/*===========================================================================*/
63+
64+/**
65+ * @brief RL78 Serial Driver configuration structure.
66+ * @details An instance of this structure must be passed to @p sdStart()
67+ * in order to configure and start a serial driver operations.
68+ */
69+typedef struct {
70+ /**
71+ * @brief Bit rate.
72+ */
73+ uint32_t sc_speed;
74+ /**
75+ * @brief Initialization value for the SMR register.
76+ */
77+ uint16_t sc_smr;
78+ /**
79+ * @brief Initialization value for the SCR register.
80+ */
81+ uint16_t sc_scr;
82+} SerialConfig;
83+
84+/**
85+ * @brief @p SerialDriver specific data.
86+ */
87+#define _serial_driver_data \
88+ _base_asynchronous_channel_data \
89+ /* Driver state.*/ \
90+ sdstate_t state; \
91+ /* Input queue.*/ \
92+ InputQueue iqueue; \
93+ /* Output queue.*/ \
94+ OutputQueue oqueue; \
95+ /* Input circular buffer.*/ \
96+ uint8_t ib[SERIAL_BUFFERS_SIZE]; \
97+ /* Output circular buffer.*/ \
98+ uint8_t ob[SERIAL_BUFFERS_SIZE]; \
99+ /* End of the mandatory fields.*/
100+
101+/*===========================================================================*/
102+/* Driver macros. */
103+/*===========================================================================*/
104+
105+/*===========================================================================*/
106+/* External declarations. */
107+/*===========================================================================*/
108+
109+#if RL78_SERIAL_USE_UART0 && !defined(__DOXYGEN__)
110+extern SerialDriver SD1;
111+#endif
112+
113+#if RL78_SERIAL_USE_UART1 && !defined(__DOXYGEN__)
114+extern SerialDriver SD2;
115+#endif
116+
117+#ifdef __cplusplus
118+extern "C" {
119+#endif
120+ void sd_lld_init(void);
121+ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
122+ void sd_lld_stop(SerialDriver *sdp);
123+#ifdef __cplusplus
124+}
125+#endif
126+
127+#endif /* HAL_USE_SERIAL */
128+
129+#endif /* _SERIAL_LLD_H_ */
130+
131+/** @} */
--- branches/rl78_dev/os/ports/GCC/RL78/chcore.c (revision 6624)
+++ branches/rl78_dev/os/ports/GCC/RL78/chcore.c (revision 6625)
@@ -104,12 +104,10 @@
104104 __attribute__((naked, weak))
105105 #endif
106106 void port_switch(Thread *ntp, Thread *otp) {
107-#if !defined(CH_CURRP_REGISTER_CACHE)
108107 /*
109108 de - ntp
110109 hl - otp
111110 */
112-/* register struct intctx *sp asm ("sp"); */
113111 asm volatile ("movw ax,[sp+4] \n\t"
114112 "movw de,ax \n\t"
115113 "movw ax,[sp+6] \n\t"
@@ -126,7 +124,6 @@
126124 asm volatile ("sel rb0 \n\t"
127125 "movw ax,sp \n\t"
128126 "movw [hl+6],ax \n\t"
129- "nop \n\t"
130127 "movw ax,[de+6] \n\t"
131128 "movw sp,ax \n\t"
132129 "sel rb2 \n\t");
@@ -135,9 +132,6 @@
135132 "pop bc \n\t"
136133 "pop ax \n\t"
137134 "sel rb0 \n\t");
138-#else
139-#error "CH_CURRP_REGISTER_CACHE not supported"
140-#endif
141135 asm volatile ("ret \n\t");
142136 }
143137
@@ -146,6 +140,7 @@
146140 * @details If the work function returns @p chThdExit() is automatically
147141 * invoked.
148142 */
143+__attribute__((noreturn))
149144 void _port_thread_start(msg_t (*pf)(void *), void *p) {
150145
151146 chSysUnlock();
--- branches/rl78_dev/os/ports/GCC/RL78/chcore.h (revision 6624)
+++ branches/rl78_dev/os/ports/GCC/RL78/chcore.h (revision 6625)
@@ -130,9 +130,8 @@
130130 uint16_t de_2;
131131 uint16_t bc_2;
132132 uint16_t ax_2;
133-#ifndef CH_CURRP_REGISTER_CACHE
134-#else
135-#warning CH_CURRP_REGISTER_CACHE feature is not tested.
133+#ifdef CH_CURRP_REGISTER_CACHE
134+#error CH_CURRP_REGISTER_CACHE feature is not supported.
136135 #endif
137136 uint32_t pc;
138137 };
@@ -155,9 +154,10 @@
155154 */
156155 #define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
157156 uint8_t *sp = (uint8_t *)workspace + wsize; \
157+ APUSH(sp, arg); \
158158 APUSH(sp, pf); \
159- APUSH(sp, arg); \
160159 APUSH(sp, 0); \
160+ APUSH(sp, 0); \
161161 sp -= sizeof(struct intctx); \
162162 ((struct intctx *)sp)->pc = (uint16_t)_port_thread_start; \
163163 ((struct intctx *)sp)->ax_2 = 0x0000; \
@@ -237,7 +237,9 @@
237237 #define PORT_IRQ_EPILOGUE() { \
238238 dbg_check_lock(); \
239239 if (chSchIsPreemptionRequired()) { \
240- asm volatile (";mvtipl #0 \n\t"); \
240+ asm volatile ("mov a,PSW \n\t"); \
241+ asm volatile ("or a,#6 \n\t"); \
242+ asm volatile ("mov PSW,a \n\t"); \
241243 chSchDoReschedule(); \
242244 } \
243245 dbg_check_unlock(); \
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