Common Source Code Project for Qt (a.k.a for FM-7).
Revision | b6b4891bb7a59512448a02a77778111c484a9faa (tree) |
---|---|
Time | 2021-12-22 22:47:49 |
Author | K.Ohta <whatisthis.sowhat@gmai...> |
Commiter | K.Ohta |
[VM][FMTOWNS][MEMORY] Reduce to update memory mapping.Fix eating a lot of HOST CPU USAGE changing bank 000c0000h , 000d0000h and 000f8000h .
@@ -27,24 +27,36 @@ namespace FMTOWNS { | ||
27 | 27 | |
28 | 28 | #define ADDR_MASK (addr_max - 1) |
29 | 29 | #define BANK_MASK (bank_size - 1) |
30 | - | |
31 | -void TOWNS_MEMORY::config_page00() | |
30 | + | |
31 | +void TOWNS_MEMORY::config_page_c0() | |
32 | 32 | { |
33 | 33 | if(dma_is_vram) { |
34 | 34 | // OK? From TSUGARU |
35 | 35 | set_memory_mapped_io_rw(0x000c0000, 0x000c7fff, d_planevram); |
36 | - set_memory_mapped_io_rw(0x000c8000, 0x000cbfff, d_sprite); | |
37 | - set_memory_mapped_io_rw(0x000ca000, 0x000cafff, d_sprite); | |
36 | + set_memory_mapped_io_rw(0x000c8000, 0x000c9fff, d_sprite); | |
38 | 37 | if(ankcg_enabled) { |
39 | 38 | set_memory_mapped_io_r(0x000ca000, 0x000ca7ff, d_font); |
40 | 39 | set_memory_r (0x000ca800, 0x000cafff, rd_dummy); |
41 | 40 | set_memory_mapped_io_r(0x000cb000, 0x000cbfff, d_font); |
41 | + | |
42 | + set_memory_w (0x000ca000, 0x000cafff, wr_dummy); // OK? | |
43 | + //set_memory_mapped_io_w(0x000ca000, 0x000cbfff, d_sprite); // OK? | |
44 | + } else { | |
45 | + set_memory_mapped_io_rw(0x000ca000, 0x000cbfff, d_sprite); | |
42 | 46 | } |
43 | 47 | set_memory_rw (0x000cc000, 0x000cffff, &(ram_pagec[0xc000])); |
44 | 48 | set_memory_mapped_io_rw(0x000cfc00, 0x000cffff, this); // MMIO |
49 | + // ToDo: Correctness wait value. | |
50 | + set_wait_rw(0x000c0000, 0x000cffff, vram_wait_val); | |
45 | 51 | } else { |
46 | 52 | set_memory_rw (0x000c0000, 0x000cffff, ram_pagec); |
53 | + // ToDo: Correctness wait value. | |
54 | + set_wait_rw(0x000c0000, 0x000cffff, mem_wait_val); | |
47 | 55 | } |
56 | +} | |
57 | + | |
58 | +void TOWNS_MEMORY::config_page_d0_f8() | |
59 | +{ | |
48 | 60 | if((select_d0_rom) && (select_d0_dict)) { |
49 | 61 | set_memory_mapped_io_rw(0x000d0000, 0x000dffff, d_dictionary); |
50 | 62 | } else { |
@@ -58,12 +70,12 @@ void TOWNS_MEMORY::config_page00() | ||
58 | 70 | } else { |
59 | 71 | set_memory_rw (0x000f8000, 0x000fffff, &(ram_pagef[0x8000])); |
60 | 72 | } |
61 | - if(dma_is_vram) { | |
62 | - set_wait_rw(0x000c0000, 0x000cffff, vram_wait_val); | |
63 | - } else { | |
64 | - set_wait_rw(0x000c0000, 0x000cffff, mem_wait_val); | |
65 | - } | |
66 | - | |
73 | +} | |
74 | + | |
75 | +void TOWNS_MEMORY::config_page00() | |
76 | +{ | |
77 | + config_page_c0(); | |
78 | + config_page_d0_f8(); | |
67 | 79 | } |
68 | 80 | |
69 | 81 | void TOWNS_MEMORY::initialize() |
@@ -575,13 +587,24 @@ void TOWNS_MEMORY::write_io8(uint32_t addr, uint32_t data) | ||
575 | 587 | } |
576 | 588 | break; |
577 | 589 | case 0x0404: // System Status Reg. |
578 | - dma_is_vram = ((data & 0x80) == 0); | |
579 | - config_page00(); | |
590 | + { | |
591 | + bool _b = dma_is_vram; | |
592 | + dma_is_vram = ((data & 0x80) == 0); | |
593 | + if((_b != dma_is_vram) || (dma_is_vram)) { | |
594 | + config_page_c0(); | |
595 | + } | |
596 | + } | |
580 | 597 | break; |
581 | 598 | case 0x0480: |
582 | - select_d0_dict = ((data & 0x01) != 0) ? true : false; | |
583 | - select_d0_rom = ((data & 0x02) == 0) ? true : false; | |
584 | - config_page00(); | |
599 | + { | |
600 | + bool _dict = select_d0_dict; | |
601 | + bool _rom = select_d0_rom; | |
602 | + select_d0_dict = ((data & 0x01) != 0) ? true : false; | |
603 | + select_d0_rom = ((data & 0x02) == 0) ? true : false; | |
604 | + if((_rom != select_d0_rom) || (_dict != select_d0_dict)) { | |
605 | + config_page_d0_f8(); | |
606 | + } | |
607 | + } | |
585 | 608 | break; |
586 | 609 | case 0x05c0: |
587 | 610 | extra_nmi_mask = ((data & 0x08) == 0); |
@@ -590,16 +613,20 @@ void TOWNS_MEMORY::write_io8(uint32_t addr, uint32_t data) | ||
590 | 613 | // From AB.COM |
591 | 614 | if(machine_id < 0x0200) { // Towns 1/2 |
592 | 615 | uint8_t nval = data & 7; |
616 | + uint8_t val_bak = mem_wait_val; | |
593 | 617 | if(nval < 1) nval = 1; |
594 | 618 | if(nval > 5) nval = 5; |
595 | 619 | mem_wait_val = nval + 1; |
596 | 620 | vram_wait_val = nval + 3 + 1; |
597 | 621 | wait_register = nval; |
598 | - set_wait_values(); | |
622 | + if(val_bak != mem_wait_val) { | |
623 | + set_wait_values(); | |
624 | + } | |
599 | 625 | } |
600 | 626 | break; |
601 | 627 | case 0x05e2: |
602 | 628 | if(machine_id >= 0x0200) { // After Towns 1H/2F. Hidden wait register. |
629 | + uint8_t val_bak = mem_wait_val; | |
603 | 630 | if(data != 0x83) { |
604 | 631 | uint8_t nval = data & 7; |
605 | 632 | if(machine_id <= 0x0200) { // Towns 1H/2F. |
@@ -614,15 +641,21 @@ void TOWNS_MEMORY::write_io8(uint32_t addr, uint32_t data) | ||
614 | 641 | vram_wait_val = 6; |
615 | 642 | wait_register = data; |
616 | 643 | } |
617 | - set_wait_values(); | |
644 | + if(val_bak != mem_wait_val) { | |
645 | + set_wait_values(); | |
646 | + } | |
618 | 647 | } |
619 | 648 | break; |
620 | 649 | case 0x05ec: |
621 | 650 | if(machine_id >= 0x0500) { // Towns2 CX : |
651 | + uint8_t val_bak = mem_wait_val; | |
652 | + uint32_t clk_bak = cpu_clock_val; | |
622 | 653 | vram_wait_val = ((data & 0x01) != 0) ? 3 : 6; |
623 | 654 | mem_wait_val = ((data & 0x01) != 0) ? 0 : 3; |
624 | 655 | cpu_clock_val = ((data & 0x01) != 0) ? (get_cpu_clocks(d_cpu)) : (16 * 1000 * 1000); |
625 | - set_wait_values(); | |
656 | + if((val_bak != mem_wait_val) || (cpu_clock_val != clk_bak)) { | |
657 | + set_wait_values(); | |
658 | + } | |
626 | 659 | } |
627 | 660 | break; |
628 | 661 | case 0xfda4: |
@@ -653,8 +686,13 @@ void TOWNS_MEMORY::write_io8(uint32_t addr, uint32_t data) | ||
653 | 686 | } |
654 | 687 | break; |
655 | 688 | case 0xff99: |
656 | - ankcg_enabled = ((data & 1) != 0) ? true : false; | |
657 | - config_page00(); | |
689 | + { | |
690 | + bool _b = ankcg_enabled; | |
691 | + ankcg_enabled = ((data & 1) != 0) ? true : false; | |
692 | + if((_b != ankcg_enabled) && (dma_is_vram)) { | |
693 | + config_page_c0(); | |
694 | + } | |
695 | + } | |
658 | 696 | break; |
659 | 697 | case 0xff9e: |
660 | 698 | if((machine_id >= 0x0600) && !(is_compatible)) { // After UG |
@@ -1111,14 +1149,20 @@ void TOWNS_MEMORY::write_signal(int ch, uint32_t data, uint32_t mask) | ||
1111 | 1149 | d_dmac->write_signal(SIG_TOWNS_DMAC_WRAP_REG, wrap_val, 0xff); |
1112 | 1150 | } |
1113 | 1151 | } else if(ch == SIG_FMTOWNS_RAM_WAIT) { |
1152 | + uint8_t _bak = mem_wait_val; | |
1114 | 1153 | mem_wait_val = (int)data; |
1115 | - set_wait_values(); | |
1154 | + if(_bak != mem_wait_val) { | |
1155 | + set_wait_values(); | |
1156 | + } | |
1116 | 1157 | } else if(ch == SIG_FMTOWNS_ROM_WAIT) { |
1117 | 1158 | // mem_wait_val = (int)data; |
1118 | 1159 | set_wait_values(); |
1119 | 1160 | } else if(ch == SIG_FMTOWNS_VRAM_WAIT) { |
1161 | + uint8_t _bak = vram_wait_val; | |
1120 | 1162 | vram_wait_val = (int)data; |
1121 | - set_wait_values(); | |
1163 | + if(_bak != vram_wait_val) { | |
1164 | + set_wait_values(); | |
1165 | + } | |
1122 | 1166 | } |
1123 | 1167 | } |
1124 | 1168 |
@@ -123,6 +123,8 @@ protected: | ||
123 | 123 | uint8_t reg_misc3; // 0024 |
124 | 124 | uint8_t reg_misc4; // 0025 |
125 | 125 | virtual void set_wait_values(); |
126 | + virtual void config_page_c0(); | |
127 | + virtual void config_page_d0_f8(); | |
126 | 128 | virtual void config_page00(); |
127 | 129 | virtual void update_machine_features(); |
128 | 130 |