Common Source Code Project for Qt (a.k.a for FM-7).
Revision | c9f6ecbf3daf5545b48edae894a0a0e702eae61d (tree) |
---|---|
Time | 2019-04-25 01:51:29 |
Author | K.Ohta <whatisthis.sowhat@gmai...> |
Commiter | K.Ohta |
[VM][PC9801][MEMBUF][WIP] Re-Adjusting around memory.
@@ -83,31 +83,12 @@ void MEMBUS::initialize() | ||
83 | 83 | |
84 | 84 | // RAM |
85 | 85 | memset(ram, 0x00, sizeof(ram)); |
86 | -#if !defined(SUPPORT_HIRESO) | |
87 | - set_memory_rw(0x00000, 0x9ffff, ram); | |
88 | -#else | |
89 | - set_memory_rw(0x00000, 0xbffff, ram); | |
90 | -#endif | |
91 | -#if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS) | |
92 | - if(sizeof(ram) > 0x100000) { | |
93 | - set_memory_rw(0x100000, sizeof(ram) - 1, ram + 0x100000); | |
94 | - } | |
95 | -#endif | |
96 | 86 | #if defined(SUPPORT_32BIT_ADDRESS) |
97 | 87 | is_shadow_bank_80000h = false; |
98 | 88 | is_shadow_bank_a0000h = false; |
99 | 89 | memset(shadow_bank_i386_80000h, 0x00, sizeof(shadow_bank_i386_80000h)); |
100 | 90 | #endif |
101 | 91 | // VRAM |
102 | -#if !defined(SUPPORT_HIRESO) | |
103 | - set_memory_mapped_io_rw(0xa0000, 0xa4fff, d_display); | |
104 | - set_memory_mapped_io_rw(0xa8000, 0xbffff, d_display); | |
105 | - #if defined(SUPPORT_16_COLORS) | |
106 | - set_memory_mapped_io_rw(0xe0000, 0xe7fff, d_display); | |
107 | - #endif | |
108 | -#else | |
109 | - set_memory_mapped_io_rw(0xc0000, 0xe4fff, d_display); | |
110 | -#endif | |
111 | 92 | |
112 | 93 | // BIOS |
113 | 94 | memset(bios, 0xff, sizeof(bios)); |
@@ -123,16 +104,13 @@ void MEMBUS::initialize() | ||
123 | 104 | read_bios(_T("ITF.ROM"), itf, sizeof(itf)); |
124 | 105 | #endif |
125 | 106 | |
126 | -#if !defined(SUPPORT_HIRESO) | |
127 | 107 | // EXT BIOS |
128 | 108 | #if defined(_PC9801) || defined(_PC9801E) |
129 | 109 | memset(fd_bios_2hd, 0xff, sizeof(fd_bios_2hd)); |
130 | 110 | read_bios(_T("2HDIF.ROM"), fd_bios_2hd, sizeof(fd_bios_2hd)); |
131 | - set_memory_r(0xd6000, 0xd6fff, fd_bios_2dd); | |
132 | 111 | |
133 | 112 | memset(fd_bios_2dd, 0xff, sizeof(fd_bios_2dd)); |
134 | 113 | read_bios(_T("2DDIF.ROM"), fd_bios_2dd, sizeof(fd_bios_2dd)); |
135 | - set_memory_r(0xd7000, 0xd7fff, fd_bios_2hd); | |
136 | 114 | #endif |
137 | 115 | memset(sound_bios, 0xff, sizeof(sound_bios)); |
138 | 116 | // memset(sound_bios_ram, 0x00, sizeof(sound_bios_ram)); |
@@ -146,7 +124,6 @@ void MEMBUS::initialize() | ||
146 | 124 | if(sound_bios_selected) { |
147 | 125 | d_display->sound_bios_ok(); |
148 | 126 | } |
149 | - update_sound_bios(); | |
150 | 127 | #if defined(SUPPORT_SASI_IF) |
151 | 128 | sasi_bios_load = false; |
152 | 129 | memset(sasi_bios, 0xff, sizeof(sasi_bios)); |
@@ -160,29 +137,26 @@ void MEMBUS::initialize() | ||
160 | 137 | } |
161 | 138 | |
162 | 139 | sasi_bios_ram_selected = false; |
163 | - update_sasi_bios(); | |
164 | 140 | #endif |
165 | 141 | #if defined(SUPPORT_SCSI_IF) |
166 | 142 | memset(scsi_bios, 0xff, sizeof(scsi_bios)); |
167 | 143 | memset(scsi_bios_ram, 0x00, sizeof(scsi_bios_ram)); |
168 | 144 | scsi_bios_selected = (read_bios(_T("SCSI.ROM"), scsi_bios, sizeof(scsi_bios)) != 0); |
169 | 145 | scsi_bios_ram_selected = false; |
170 | - update_scsi_bios(); | |
171 | 146 | #endif |
172 | 147 | #if defined(SUPPORT_IDE_IF) |
173 | 148 | memset(ide_bios, 0xff, sizeof(ide_bios)); |
174 | 149 | // memset(ide_bios_ram, 0x00, sizeof(ide_bios_ram)); |
175 | 150 | ide_bios_selected = (read_bios(_T("IDE.ROM"), ide_bios, sizeof(ide_bios)) != 0); |
176 | 151 | // ide_bios_ram_selected = false; |
177 | - update_ide_bios(); | |
178 | 152 | #endif |
179 | 153 | page08_intram_selected = true; |
180 | 154 | // EMS |
181 | 155 | #if defined(SUPPORT_NEC_EMS) |
182 | 156 | memset(nec_ems, 0, sizeof(nec_ems)); |
183 | 157 | #endif |
184 | -#endif | |
185 | 158 | last_access_is_interam = false; |
159 | + update_bios(); | |
186 | 160 | } |
187 | 161 | |
188 | 162 | void MEMBUS::reset() |
@@ -487,15 +461,22 @@ uint32_t MEMBUS::read_io8(uint32_t addr) | ||
487 | 461 | uint32_t MEMBUS::read_data8(uint32_t addr) |
488 | 462 | { |
489 | 463 | if((addr >= 0x80000) && (addr < 0xc0000)) { |
490 | - if(addr < 0xa0000) { | |
464 | + // ToDo: External banked memory. | |
465 | + if(addr < 0xa0000){ | |
491 | 466 | // ToDo: Correctness extra ram emulation. |
492 | 467 | if(!page08_intram_selected) { |
493 | 468 | last_access_is_interam = false; |
494 | 469 | return 0xff; |
495 | 470 | } |
496 | - addr = (addr & 0x1ffff) | window_80000h; | |
497 | - } else { // a0000 - bffff | |
498 | - addr = (addr & 0x1ffff) | window_a0000h; | |
471 | + // Unable to access lower than 07ffffh via WINDOW.20190425 K.O | |
472 | + if(window_80000h >= 0x80000) { | |
473 | + addr = (addr & 0x1ffff) | window_80000h; | |
474 | + } | |
475 | + } else { | |
476 | + // Unable to access lower than 07ffffh via WINDOW.20190425 K.O | |
477 | + if(window_a0000h >= 0x80000) { // a0000 - bffff | |
478 | + addr = (addr & 0x1ffff) | window_a0000h; | |
479 | + } | |
499 | 480 | } |
500 | 481 | } |
501 | 482 | if(addr < 0x10000) { |
@@ -504,21 +485,11 @@ uint32_t MEMBUS::read_data8(uint32_t addr) | ||
504 | 485 | #if defined(SUPPORT_24BIT_ADDRESS) |
505 | 486 | if(addr < UPPER_MEMORY_24BIT) { |
506 | 487 | last_access_is_interam = true; |
507 | - if(addr >= sizeof(ram)) { | |
508 | - return 0xff; | |
509 | - } | |
510 | 488 | return MEMORY::read_data8(addr); |
511 | 489 | } |
512 | 490 | #elif defined(SUPPORT_32BIT_ADDRESS) |
513 | 491 | if(addr < UPPER_MEMORY_32BIT) { |
514 | 492 | last_access_is_interam = true; |
515 | - if(addr >= sizeof(ram)) { | |
516 | - if((addr < 0x01000000) && (addr >= 0x00fa0000)) { // ToDo: PC9821 | |
517 | - return MEMORY::read_data8(addr); | |
518 | - } | |
519 | - // ToDo: external RAM. | |
520 | - return 0xff; | |
521 | - } | |
522 | 493 | return MEMORY::read_data8(addr); |
523 | 494 | } |
524 | 495 | #endif |
@@ -542,54 +513,26 @@ uint32_t MEMBUS::read_data16(uint32_t addr) | ||
542 | 513 | last_access_is_interam = false; |
543 | 514 | return 0xffff; |
544 | 515 | } |
545 | - addr = (addr & 0x1ffff) | window_80000h; | |
516 | + if(window_80000h >= 0x80000) { | |
517 | + addr = (addr & 0x1ffff) | window_80000h; | |
518 | + } | |
546 | 519 | } else { // a0000 - bffff |
547 | - addr = (addr & 0x1ffff) | window_a0000h; | |
520 | + if(window_a0000h >= 0x80000) { // a0000 - bffff | |
521 | + addr = (addr & 0x1ffff) | window_a0000h; | |
522 | + } | |
548 | 523 | } |
549 | 524 | } |
550 | 525 | if(addr < 0x10000) { |
551 | 526 | last_access_is_interam = false; |
552 | 527 | } |
553 | 528 | #if defined(SUPPORT_24BIT_ADDRESS) |
554 | - if((addr + 1) < UPPER_MEMORY_24BIT) { | |
529 | + if(addr < UPPER_MEMORY_24BIT) { | |
555 | 530 | last_access_is_interam = true; |
556 | - if(addr >= sizeof(ram)) { | |
557 | - return 0xffff; | |
558 | - } else if((addr + 1) >= sizeof(ram)) { | |
559 | - uint32_t val = read_data8(addr); | |
560 | - val = val | 0xff00; | |
561 | - return val; | |
562 | - } | |
563 | 531 | return MEMORY::read_data16(addr); |
564 | - } else if(addr < UPPER_MEMORY_24BIT) { | |
565 | - last_access_is_interam = true; | |
566 | - if(addr >= sizeof(ram)) { | |
567 | - return 0xffff; | |
568 | - } else if((addr + 1) >= sizeof(ram)) { | |
569 | - uint32_t val = read_data8(addr); | |
570 | - val = val | 0xff00; | |
571 | - return val; | |
572 | - } | |
573 | - return (MEMORY::read_data8(addr) | 0xff00); | |
574 | 532 | } |
575 | 533 | #elif defined(SUPPORT_32BIT_ADDRESS) |
576 | 534 | if(addr < UPPER_MEMORY_32BIT) { |
577 | 535 | last_access_is_interam = true; |
578 | - if(addr >= sizeof(ram)) { | |
579 | - if((addr < 0x01000000) && (addr >= 0x00fa0000)) { // ToDo: PC9821 | |
580 | - if((addr + 1) >= 0x01000000) { | |
581 | - uint32_t val = read_data8(addr); | |
582 | - return val | 0xff00; | |
583 | - } | |
584 | - return MEMORY::read_data16(addr); | |
585 | - } | |
586 | - // ToDo: external RAM. | |
587 | - return 0xffff; | |
588 | - } else if((addr + 1) >= sizeof(ram)) { | |
589 | - uint32_t val = read_data8(addr); | |
590 | - val = val | 0xff00; | |
591 | - return val; | |
592 | - } | |
593 | 536 | return MEMORY::read_data16(addr); |
594 | 537 | } |
595 | 538 | #endif |
@@ -615,70 +558,28 @@ uint32_t MEMBUS::read_data32(uint32_t addr) | ||
615 | 558 | last_access_is_interam = false; |
616 | 559 | return 0xffffffff; |
617 | 560 | } |
618 | - addr = (addr & 0x1ffff) | window_80000h; | |
561 | + if(window_80000h >= 0x80000) { | |
562 | + addr = (addr & 0x1ffff) | window_80000h; | |
563 | + } | |
619 | 564 | } else { // a0000 - bffff |
620 | - addr = (addr & 0x1ffff) | window_a0000h; | |
565 | + if(window_a0000h >= 0x80000) { // a0000 - bffff | |
566 | + addr = (addr & 0x1ffff) | window_a0000h; | |
567 | + } | |
621 | 568 | } |
622 | 569 | } |
623 | 570 | if(addr < 0x10000) { |
624 | 571 | last_access_is_interam = false; |
625 | 572 | } |
626 | 573 | #if defined(SUPPORT_24BIT_ADDRESS) |
627 | - if((addr + 3) < UPPER_MEMORY_24BIT) { | |
574 | + if(addr < UPPER_MEMORY_24BIT) { | |
628 | 575 | last_access_is_interam = true; |
629 | - if(addr >= sizeof(ram)) { | |
630 | - return 0xffffffff; | |
631 | - } else if((addr + 3) >= sizeof(ram)) { | |
632 | - uint32_t val = read_data8(addr); | |
633 | - | |
634 | - if((addr + 1) >= sizeof(ram)) { | |
635 | - val = val | 0xffffff00; | |
636 | - } else if((addr + 2) >= sizeof(ram)) { | |
637 | - val = val | (read_data8(addr + 1) << 8); | |
638 | - val = val | 0xffff0000; | |
639 | - } else { // (addr + 3) >= sizeof(ram) | |
640 | - val = val | (read_data8(addr + 1) << 8); | |
641 | - val = val | (read_data8(addr + 2) << 16); | |
642 | - val = val | 0xff000000; | |
643 | - } | |
644 | - return val; | |
645 | - } | |
646 | 576 | return MEMORY::read_data32(addr); |
647 | - } else if(addr < UPPER_MEMORY_24BIT) { | |
648 | - last_access_is_interam = true; | |
649 | - int n = UPPER_MEMORY_24BIT - addr; | |
650 | - uint32_t val = 0xffffffff; | |
651 | - for(int i = 0; i < n; i++) { | |
652 | - val = (val << 8) & 0xffffff00; | |
653 | - val = val | read_data8(addr + i); | |
654 | - } | |
655 | - return val; | |
656 | 577 | } |
657 | 578 | #elif defined(SUPPORT_32BIT_ADDRESS) |
658 | 579 | if(addr < UPPER_MEMORY_32BIT) { |
659 | 580 | last_access_is_interam = true; |
660 | - if(addr >= sizeof(ram)) { | |
661 | - if((addr < 0x01000000) && (addr >= 0x00fa0000)) { // ToDo: PC9821 | |
662 | - if((addr + 3) >= 0x01000000) { | |
663 | - uint32_t val = read_data8(addr); | |
664 | - val = val | (read_data8(addr + 1) << 8); | |
665 | - val = val | (read_data8(addr + 2) << 16); | |
666 | - val = val | (read_data8(addr + 3) << 24); | |
667 | - return val; | |
668 | - } | |
669 | - return MEMORY::read_data32(addr); | |
670 | - } | |
671 | - // ToDo: external RAM. | |
672 | - return 0xffffffff; | |
673 | - } else if((addr + 3) >= sizeof(ram)) { | |
674 | - uint32_t val = read_data8(addr); | |
675 | - val = val | (read_data8(addr + 1) << 8); | |
676 | - val = val | (read_data8(addr + 2) << 16); | |
677 | - val = val | (read_data8(addr + 3) << 24); | |
678 | - return val; | |
679 | - } | |
680 | 581 | return MEMORY::read_data32(addr); |
681 | - } | |
582 | + } | |
682 | 583 | #endif |
683 | 584 | return MEMORY::read_data32(addr & 0xfffff); |
684 | 585 | } |
@@ -692,9 +593,13 @@ void MEMBUS::write_data8(uint32_t addr, uint32_t data) | ||
692 | 593 | last_access_is_interam = false; |
693 | 594 | return; |
694 | 595 | } |
695 | - addr = (addr & 0x1ffff) | window_80000h; | |
596 | + if(window_80000h >= 0x80000) { | |
597 | + addr = (addr & 0x1ffff) | window_80000h; | |
598 | + } | |
696 | 599 | } else { // a0000 - bffff |
697 | - addr = (addr & 0x1ffff) | window_a0000h; | |
600 | + if(window_a0000h >= 0x80000) { // a0000 - bffff | |
601 | + addr = (addr & 0x1ffff) | window_a0000h; | |
602 | + } | |
698 | 603 | } |
699 | 604 | } |
700 | 605 | if(addr < 0x10000) { |
@@ -703,23 +608,12 @@ void MEMBUS::write_data8(uint32_t addr, uint32_t data) | ||
703 | 608 | #if defined(SUPPORT_24BIT_ADDRESS) |
704 | 609 | if(addr < UPPER_MEMORY_24BIT) { |
705 | 610 | last_access_is_interam = true; |
706 | - if(addr >= sizeof(ram)) { | |
707 | - return; | |
708 | - } | |
709 | 611 | MEMORY::write_data8(addr, data); |
710 | 612 | return; |
711 | 613 | } |
712 | 614 | #elif defined(SUPPORT_32BIT_ADDRESS) |
713 | 615 | if(addr < UPPER_MEMORY_32BIT) { |
714 | 616 | last_access_is_interam = true; |
715 | - if(addr >= sizeof(ram)) { | |
716 | - if((addr < 0x01000000) && (addr >= 0x00fa0000)) { // ToDo: PC9821 | |
717 | - MEMORY::write_data8(addr, data); | |
718 | - return; | |
719 | - } | |
720 | - // ToDo: external RAM. | |
721 | - return; | |
722 | - } | |
723 | 617 | MEMORY::write_data8(addr, data); |
724 | 618 | return; |
725 | 619 | } |
@@ -743,9 +637,13 @@ void MEMBUS::write_data16(uint32_t addr, uint32_t data) | ||
743 | 637 | last_access_is_interam = false; |
744 | 638 | return; |
745 | 639 | } |
746 | - addr = (addr & 0x1ffff) | window_80000h; | |
640 | + if(window_80000h >= 0x80000) { | |
641 | + addr = (addr & 0x1ffff) | window_80000h; | |
642 | + } | |
747 | 643 | } else { // a0000 - bffff |
748 | - addr = (addr & 0x1ffff) | window_a0000h; | |
644 | + if(window_a0000h >= 0x80000) { // a0000 - bffff | |
645 | + addr = (addr & 0x1ffff) | window_a0000h; | |
646 | + } | |
749 | 647 | } |
750 | 648 | } |
751 | 649 | if(addr < 0x10000) { |
@@ -754,30 +652,12 @@ void MEMBUS::write_data16(uint32_t addr, uint32_t data) | ||
754 | 652 | #if defined(SUPPORT_24BIT_ADDRESS) |
755 | 653 | if(addr < UPPER_MEMORY_24BIT) { |
756 | 654 | last_access_is_interam = true; |
757 | - if(addr >= sizeof(ram)) { | |
758 | - return; | |
759 | - } else if((addr + 1) >= sizeof(ram)) { | |
760 | - write_data8(addr, data & 0xff); | |
761 | - return; | |
762 | - } | |
763 | 655 | MEMORY::write_data16(addr, data); |
764 | 656 | return; |
765 | 657 | } |
766 | 658 | #elif defined(SUPPORT_32BIT_ADDRESS) |
767 | 659 | if(addr < UPPER_MEMORY_32BIT) { |
768 | 660 | last_access_is_interam = true; |
769 | - if(addr >= sizeof(ram)) { | |
770 | - if((addr < 0x01000000) && (addr >= 0x00fa0000)) { // ToDo: PC9821 | |
771 | - if((addr + 1) >= 0x01000000) { | |
772 | - MEMORY::write_data8(addr, data); | |
773 | - } else { | |
774 | - MEMORY::write_data16(addr, data); | |
775 | - } | |
776 | - return; | |
777 | - } | |
778 | - // ToDo: external RAM. | |
779 | - return; | |
780 | - } | |
781 | 661 | MEMORY::write_data16(addr, data); |
782 | 662 | return; |
783 | 663 | } |
@@ -803,9 +683,13 @@ void MEMBUS::write_data32(uint32_t addr, uint32_t data) | ||
803 | 683 | last_access_is_interam = false; |
804 | 684 | return; |
805 | 685 | } |
806 | - addr = (addr & 0x1ffff) | window_80000h; | |
686 | + if(window_80000h >= 0x80000) { | |
687 | + addr = (addr & 0x1ffff) | window_80000h; | |
688 | + } | |
807 | 689 | } else { // a0000 - bffff |
808 | - addr = (addr & 0x1ffff) | window_a0000h; | |
690 | + if(window_a0000h >= 0x80000) { // a0000 - bffff | |
691 | + addr = (addr & 0x1ffff) | window_a0000h; | |
692 | + } | |
809 | 693 | } |
810 | 694 | } |
811 | 695 | if(addr < 0x10000) { |
@@ -814,46 +698,12 @@ void MEMBUS::write_data32(uint32_t addr, uint32_t data) | ||
814 | 698 | #if defined(SUPPORT_24BIT_ADDRESS) |
815 | 699 | if(addr < UPPER_MEMORY_24BIT) { |
816 | 700 | last_access_is_interam = true; |
817 | - if(addr >= sizeof(ram)) { | |
818 | - return; | |
819 | - } else if((addr + 1) >= sizeof(ram)) { | |
820 | - write_data8(addr, data & 0xff); | |
821 | - return; | |
822 | - } else if((addr + 2) >= sizeof(ram)) { | |
823 | - write_data8(addr, data & 0xff); | |
824 | - write_data8(addr + 1, (data & 0xff00) >> 8); | |
825 | - return; | |
826 | - } else if((addr + 3) >= sizeof(ram)) { | |
827 | - write_data8(addr, data & 0xff); | |
828 | - write_data8(addr + 1, (data & 0xff00) >> 8); | |
829 | - write_data8(addr + 2, (data & 0xff0000) >> 16); | |
830 | - return; | |
831 | - } | |
832 | 701 | MEMORY::write_data32(addr, data); |
833 | 702 | return; |
834 | 703 | } |
835 | 704 | #elif defined(SUPPORT_32BIT_ADDRESS) |
836 | 705 | if(addr < UPPER_MEMORY_32BIT) { |
837 | 706 | last_access_is_interam = true; |
838 | - if(addr >= sizeof(ram)) { | |
839 | - if((addr < 0x01000000) && (addr >= 0x00fa0000)) { // ToDo: PC9821 | |
840 | - if((addr + 1) >= 0x01000000) { | |
841 | - MEMORY::write_data8(addr, data); | |
842 | - } else if((addr + 2) >= 0x01000000) { | |
843 | - MEMORY::write_data8(addr, data & 0xff); | |
844 | - MEMORY::write_data8(addr + 1, (data & 0xff00) >> 8); | |
845 | - } else if((addr + 3) >= 0x01000000) { | |
846 | - MEMORY::write_data8(addr, data & 0xff); | |
847 | - MEMORY::write_data8(addr + 1, (data & 0xff00) >> 8); | |
848 | - MEMORY::write_data8(addr + 2, (data & 0xff0000) >> 16); | |
849 | - } else { | |
850 | - MEMORY::write_data32(addr, data); | |
851 | - } | |
852 | - return; | |
853 | - } | |
854 | - // ToDo: external RAM. | |
855 | - return; | |
856 | - } | |
857 | 707 | MEMORY::write_data32(addr, data); |
858 | 708 | return; |
859 | 709 | } |
@@ -890,21 +740,51 @@ uint32_t MEMBUS::read_signal(int ch) | ||
890 | 740 | |
891 | 741 | void MEMBUS::update_bios() |
892 | 742 | { |
743 | +#if !defined(SUPPORT_HIRESO) | |
744 | + set_memory_rw(0x00000, 0x9ffff, ram); | |
745 | +#else | |
746 | + set_memory_rw(0x00000, 0xbffff, ram); | |
747 | +#endif | |
748 | +#if defined(SUPPORT_24BIT_ADDRESS) || defined(SUPPORT_32BIT_ADDRESS) | |
749 | + if(sizeof(ram) > 0x100000) { | |
750 | + set_memory_rw(0x100000, sizeof(ram) - 1, ram + 0x100000); | |
751 | + } | |
752 | +#endif | |
753 | +#if !defined(SUPPORT_HIRESO) | |
754 | + set_memory_mapped_io_rw(0xa0000, 0xa4fff, d_display); | |
755 | + set_memory_mapped_io_rw(0xa8000, 0xbffff, d_display); | |
756 | + #if defined(SUPPORT_16_COLORS) | |
757 | + set_memory_mapped_io_rw(0xe0000, 0xe7fff, d_display); | |
758 | + #endif | |
759 | + #if defined(SUPPORT_32BIT_ADDRESS) || defined(SUPPORT_24BIT_ADDRESS) | |
760 | + if(is_shadow_bank_a0000h) { | |
761 | + set_memory_rw(0xa0000, 0xbffff, &(shadow_bank_i386_80000h[0x20000])); | |
762 | + }// else { | |
763 | + // set_memory_mapped_io_rw(0xa0000, 0xbffff, d_display); | |
764 | + //} | |
765 | + #endif | |
766 | +#else | |
767 | + set_memory_mapped_io_rw(0xc0000, 0xe4fff, d_display); | |
768 | +#endif | |
769 | +#if defined(_PC9801) || defined(_PC9801E) | |
770 | + set_memory_r(0xd6000, 0xd6fff, fd_bios_2dd); | |
771 | + set_memory_r(0xd7000, 0xd7fff, fd_bios_2hd); | |
772 | +#endif | |
893 | 773 | #if defined(SUPPORT_BIOS_RAM) |
894 | 774 | #if defined(SUPPORT_32BIT_ADDRESS) |
895 | 775 | if(is_shadow_bank_80000h) { |
896 | 776 | set_memory_rw(0x80000, 0x9ffff, &(shadow_bank_i386_80000h[0x00000])); |
897 | - } else { | |
898 | - set_memory_rw(0x80000, 0x9ffff, &(ram[0x80000])); | |
899 | - } | |
777 | + }// else { | |
778 | + // set_memory_rw(0x80000, 0x9ffff, &(ram[0x80000])); | |
779 | + //} | |
900 | 780 | #endif |
901 | 781 | #if defined(SUPPORT_32BIT_ADDRESS) || defined(SUPPORT_24BIT_ADDRESS) |
902 | 782 | #if !defined(SUPPORT_HIRESO) |
903 | - if(is_shadow_bank_a0000h) { | |
904 | - set_memory_rw(0xa0000, 0xbffff, &(shadow_bank_i386_80000h[0x20000])); | |
905 | - } else { | |
906 | - set_memory_mapped_io_rw(0xa0000, 0xbffff, d_display); | |
907 | - } | |
783 | +// if(is_shadow_bank_a0000h) { | |
784 | +// set_memory_rw(0xa0000, 0xbffff, &(shadow_bank_i386_80000h[0x20000])); | |
785 | +// } else { | |
786 | +// set_memory_mapped_io_rw(0xa0000, 0xbffff, d_display); | |
787 | +// } | |
908 | 788 | #else |
909 | 789 | unset_memory_rw(0xc0000, 0xe7fff); |
910 | 790 | #endif |
@@ -937,6 +817,7 @@ void MEMBUS::update_bios() | ||
937 | 817 | #if defined(SUPPORT_32BIT_ADDRESS) |
938 | 818 | // ToDo: PC9821 |
939 | 819 | MEMORY::copy_table_rw(0x00ffa000, 0x000fa000, 0x000fffff); |
820 | + MEMORY::copy_table_rw(0x00ee8000, 0x000e8000, 0x000fffff); | |
940 | 821 | #endif |
941 | 822 | return; |
942 | 823 | } |
@@ -955,6 +836,7 @@ void MEMBUS::update_bios() | ||
955 | 836 | #if defined(SUPPORT_32BIT_ADDRESS) |
956 | 837 | // ToDo: PC9821 |
957 | 838 | MEMORY::copy_table_rw(0x00ffa000, 0x000fa000, 0x000fffff); |
839 | + MEMORY::copy_table_rw(0x00ee8000, 0x000e8000, 0x000fffff); | |
958 | 840 | #endif |
959 | 841 | |
960 | 842 | } |