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leon-mjpeg: Commit

motionJPEG play on LEON processor


Commit MetaInfo

Revisiond2bb61ba48a30853955c72124d7d94a22e5e2570 (tree)
Time2011-02-15 23:52:48
AuthorKenichi Kurimoto <kurimoto12@user...>
CommiterKenichi Kurimoto

Log Message

work around Xilinx bug -- huff.vhd

Change Summary

Incremental Difference

--- a/grlib-gpl-1.0.22-b4095/lib/kuri/mjpeg/huff.vhd
+++ b/grlib-gpl-1.0.22-b4095/lib/kuri/mjpeg/huff.vhd
@@ -181,18 +181,7 @@ begin
181181 tmp := to_integer(signed('0' & data(10 downto 0)));
182182 outb := std_logic_vector(to_signed(tmp, 12));
183183 end if;
184--- elsif(bitnum = "1100")then
185--- if(data(11) = '0)then
186--- tmp := to_integer(signed('1' & data(11 downto 0))) + 1;
187--- outb := std_logic_vector(to_signed(tmp, 12));
188--- else
189--- tmp := to_integer(signed('0' & data(11 downto 0)));
190--- outb := std_logic_vector(to_signed(tmp, 12));
191--- end if;
192--- elsif(bitnum ="0000")then
193--- outb := (others => '0');
194184 else
195--- report "sign extention over flow" severity note;
196185 outb := (others => '0');
197186 end if;
198187
@@ -240,13 +229,11 @@ type control_reg is record
240229 hreg : ahbs_reg;
241230 fifo_rp : std_logic_vector(8 downto 0);
242231 fifo_wp : std_logic_vector(8 downto 0);
243- counter : std_logic_vector(1 downto 0);
244232 fetch_reg : std_logic_vector(31 downto 0);
245233 marker_reg : std_logic_vector(7 downto 0);
246234 valuebit : std_logic_vector(5 downto 0);
247235 byteselect : std_logic_vector(1 downto 0);
248236 reqbit_keep : std_logic_vector(3 downto 0);
249- runlength_keep : std_logic_vector(3 downto 0);
250237 valbit_keep : std_logic_vector(3 downto 0);
251238 dcac : std_logic;
252239 serial_counter : std_logic_vector(4 downto 0);
@@ -289,14 +276,7 @@ signal servaldin : std_logic_vector(7 downto 0);
289276 signal servaldout : std_logic_vector(7 downto 0);
290277 signal servalen,servalwr : std_logic;
291278
292-signal debug_shiftnum : std_logic_vector(4 downto 0);
293-signal debug_sign_exin : std_logic_vector(10 downto 0);
294-signal debug_serialin : std_logic_vector(16 downto 0);
295-signal debug_vcache_symbit : std_logic_vector(4 downto 0);
296-signal debug_vcache_runlength : std_logic_vector(3 downto 0);
297-signal debug_vcache_valbit : std_logic_vector(3 downto 0);
298-signal debug_va : std_logic;
299-signal debug_fifoready : std_logic;
279+signal debug_vmemaddcnt : std_logic_vector(5 downto 0);
300280
301281 begin
302282 ramscan : syncram_2p generic map(tech => memtech, abits => 9, dbits => 32,sepclk => 0)
@@ -364,7 +344,6 @@ comb_fetch : process(r, rst, ahbsi, apbi, data_out_fifo, dccachedout, accachedou
364344 variable vint_sercnt : integer;
365345 variable vshiftout : std_logic_vector(15 downto 0);
366346 variable vtmpshiftout : std_logic_vector(31 downto 0);
367- variable va : std_logic;
368347 variable vid : std_logic;
369348 variable vcompid : std_logic_vector(1 downto 0);
370349 variable vkstrobe : std_logic;
@@ -559,7 +538,6 @@ end if;
559538 else
560539 vsready := '1';
561540 end if;
562- debug_fifoready <= vsready;
563541
564542 vhrdata := vsready & "0000000000000000000000000000000";
565543 if(r.hreg.rdscan = '1')then
@@ -784,12 +762,10 @@ end if;
784762 end if;
785763 end if;
786764
787- -- runlength_keep valbit_keep register calculation
765+ -- valbit_keep register calculation
788766 if(r.dec_state = serialfinish)then
789- v.runlength_keep := vserial_runlength;
790767 v.valbit_keep := vserial_valbit;
791768 elsif(r.dec_state = symcheck)then
792- v.runlength_keep := vcache_runlength;
793769 v.valbit_keep := vcache_valbit;
794770 end if;
795771
@@ -815,28 +791,15 @@ end if;
815791 vshiftnum := std_logic_vector(to_unsigned(vintshift,5));
816792
817793 -- shifter instantiation
818-debug_shiftnum <= vshiftnum;
819794 vtmpshiftout := std_logic_vector(shift_right(unsigned(r.fetch_reg), vintshift));
820795 vshiftout := vtmpshiftout(15 downto 0);
821796
822--- write memory address generation
823- if (r.dec_state = symcheck and unsigned(vcache_symbit) <= unsigned(r.valuebit) and vcache_symbit /= "00000")then
824- va := '1';
825- else
826- va := '0';
827- end if;
828-debug_va <= va;
829-debug_vcache_symbit <= vcache_symbit;
830-debug_vcache_runlength <= vcache_runlength;
831-debug_vcache_valbit <= vcache_valbit;
832-
833--- if((va = '1' or r.dec_state = serialfinish) and r.memaddcnt = "111111")then
834797 if(r.dcac = '1')then
835798 v.memaddcnt := "000000";
836- elsif((va = '1' and vcache_runlength = "0000" and vcache_valbit = "0000")
799+ elsif(((r.dec_state = symcheck and unsigned(vcache_symbit) <= unsigned(r.valuebit) and vcache_symbit /= "00000") and vcache_runlength = "0000" and vcache_valbit = "0000")
837800 or (r.dec_state = serialfinish and vserial_runlength = "0000" and vserial_valbit = "0000")) then
838801 v.memaddcnt := "111111";
839- elsif(va = '1')then
802+ elsif(r.dec_state = symcheck and unsigned(vcache_symbit) <= unsigned(r.valuebit) and vcache_symbit /= "00000")then
840803 v.memaddcnt := r.memaddcnt + vcache_runlength + "0001";
841804 elsif(r.dec_state = serialfinish)then
842805 v.memaddcnt := r.memaddcnt + vserial_runlength + "0001";
@@ -950,7 +913,7 @@ debug_vcache_valbit <= vcache_valbit;
950913 vserial_mask := "01111111111111111";
951914 end if;
952915 vserial_tmpin := ('0' & vshiftout) and vserial_mask;
953- debug_serialin <= vserial_tmpin;
916+
954917 if(r.dec_state = symcheck or r.dec_state = serialcheck or r.dec_state = serialwait or r.dec_state = serialfinish)then
955918 vsermaxadd := r.dcac & vid & r.serial_counter;
956919 end if;
@@ -980,7 +943,6 @@ debug_vcache_valbit <= vcache_valbit;
980943 end if;
981944
982945 -- Sign extention & zigzag memory access
983- debug_sign_exin <= vshiftout(10 downto 0);
984946 vkdata := sign_ex(vshiftout(10 downto 0), r.valbit_keep );
985947 if(r.dec_state = valout and r.dcac = '1')then
986948 if(vcompid = "00")then
@@ -1113,13 +1075,11 @@ end if;
11131075 v.dec_state := standby;
11141076 v.fifo_rp := (others => '0');
11151077 v.fifo_wp := (others => '0');
1116- v.counter := (others => '0');
11171078 v.fetch_reg := (others => '0');
11181079 v.marker_reg := (others => '0');
11191080 v.valuebit := (others => '0');
11201081 v.byteselect := (others => '0');
11211082 v.reqbit_keep := (others => '0');
1122- v.runlength_keep := (others => '0');
11231083 v.valbit_keep := (others => '0');
11241084 v.dcac := '1';
11251085 v.serial_counter := (others => '0');
@@ -1197,6 +1157,15 @@ end if;
11971157 kaddress <= r.memaddcnt;
11981158 kaddq <= vkaddq;
11991159 krdq <= vkrdq;
1160+
1161+
1162+
1163+-- Work around for ISE
1164+-- I don't know why ISE can't work correctly without this sentence.
1165+-- Quartus works well without this sentence.
1166+ debug_vmemaddcnt <= v.memaddcnt;
1167+
1168+
12001169 end process;
12011170
12021171 apbo.pirq <= (others => '0');
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