By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!
(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)
NOODLYBOX is a mimic processor for verification.
It can manipulate FPGA model which is connected to microcomputer's local bus.
When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.
Operating System: Windows NT/2000, Windows XP
When the following software is not installed, this does not work.
* ModelSIM XE III Starter 6.3c or later / Icarus Verilog 20090923
* Xilinx ISE 9.2i or later
* felid labo pack a004 or MSYS 1.0.11 + MinGW 5.1.4
Download Package list
TimingChartViewer (3 items Hide)
isesimutil (2 items Hide)