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Project Description

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.

Detail:

  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

Operating System: Windows NT/2000, Windows XP
When the following software is not installed, this does not work.
* ModelSIM XE III Starter 6.3c or later / Icarus Verilog 20090923
* Xilinx ISE 9.2i or later
* felid labo pack a004 or MSYS 1.0.11 + MinGW 5.1.4
* Ruby(i386-mingw32)

Download Package list

TimingChartViewer (3 items Hide)

Released at 2012-02-15 00:10
r245 (1 files Hide)

Released at 2011-11-26 23:48
r226 (1 files Show)

Released at 2011-11-21 00:10
r219 (1 files Show)

isesimutil (2 items Hide)

Released at 2012-01-01 23:07
r230 (1 files Hide)

Released at 2011-04-20 23:50
r193 (1 files Show)

nbox_util (1 items )

Released at 2012-03-11 22:19
r247 (1 files Hide)

noodlybox (12 items Hide)

Released at 2010-01-01 19:46
0012 (1 files Hide)

Released at 2009-12-12 11:44
0011 (1 files Show)

Released at 2009-11-01 21:58
0010 (1 files Show)

Released at 2009-10-25 02:37
0009 (1 files Show)

Released at 2009-10-09 01:33
0008 (1 files Show)

Released at 2009-09-20 22:06
0007 (1 files Show)

Released at 2009-09-17 00:47
0006 (1 files Show)

Released at 2009-05-17 12:16
0005 (1 files Show)

Released at 2009-05-06 22:40
0004 (1 files Show)

Released at 2008-11-16 02:16
0003 (1 files Show)

Released at 2008-11-09 00:09
0002 (1 files Show)

Released at 2008-10-31 00:55
0001 (1 files Show)