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/* --------------------------------------------- */ |
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/* H8-3069F Linker script */ |
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/* (c) KAZ.Imamura */ |
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/* */ |
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/* CPU : Renesus H8/3069F 25MHz */ |
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/* Memory : ROM 512KB, RAM 16KB E-RAM 2MB */ |
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/* Target : AKI-3069-USB on h8mon */ |
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/* --------------------------------------------- */ |
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|
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OUTPUT_FORMAT("elf32-h8300") |
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OUTPUT_ARCH(h8300h) |
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ENTRY("_start") |
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MEMORY |
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{ |
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vectors(rw) : o = 0x000000, l = 0x100 |
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vrom(rwx) : o = 0x400000, l = 0x1C000 |
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ram(rwx) : o = 0x41C000, l = 0x4000 |
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eram(rwx) : o = 0x420000, l = 0x1E0000 |
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temp(rwx) : o = 0x600000, l = 0 |
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vvect(rw) : o = 0xffbf20, l = 0x100 |
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stack(rw) : o = 0xffd30c, l = 0 |
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} |
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|
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SECTIONS |
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{ |
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.vvect : { |
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/* .vectors : { */ |
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LONG (ABSOLUTE(_start)) /* #00 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #01 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #02 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #03 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #04 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #05 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #06 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #07 NMI */ |
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LONG (ABSOLUTE(_start)) /* #08 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #09 Reserverd */ |
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|
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LONG (ABSOLUTE(_start)) /* #10 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #11 Reserverd */ |
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LONG (DEFINED(_int_IRQ0)?ABSOLUTE(_int_IRQ0):ABSOLUTE(_start)) /* #12 IRQ0 */ |
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LONG (ABSOLUTE(_start)) /* #13 IRQ1 */ |
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LONG (ABSOLUTE(_start)) /* #14 IRQ2 */ |
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LONG (ABSOLUTE(_start)) /* #15 IRQ3 */ |
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LONG (ABSOLUTE(_start)) /* #16 IRQ4 */ |
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LONG (ABSOLUTE(_start)) /* #17 IRQ5 */ |
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LONG (ABSOLUTE(_start)) /* #18 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #19 Reserverd */ |
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|
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LONG (ABSOLUTE(_start)) /* #20 Watchdog timer (WOVI) */ |
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LONG (ABSOLUTE(_start)) /* #21 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #22 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #23 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #24 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #25 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #26 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #27 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #28 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #29 Reserverd */ |
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|
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LONG (ABSOLUTE(_start)) /* #30 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #31 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #32 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #33 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #34 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #35 Reserverd */ |
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LONG (DEFINED(_int_CMIA0)?ABSOLUTE(_int_CMIA0):ABSOLUTE(_start)) /* #36 8bit timer CM-A0 */ |
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LONG (ABSOLUTE(_start)) /* #37 Reserverd */ |
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LONG (DEFINED(_int_CMIA0)?ABSOLUTE(_int_CMIA1):ABSOLUTE(_start)) /* #38 8bit timer CM-A1/B1 */ |
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LONG (ABSOLUTE(_start)) /* #39 Reserverd */ |
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|
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LONG (ABSOLUTE(_start)) /* #40 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #41 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #42 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #43 Reserverd */ |
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LONG (DEFINED(_int_DEND0)?ABSOLUTE(_int_DEND0):ABSOLUTE(_start)) /* #44 DMAC transfer(ch0) end */ |
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LONG (ABSOLUTE(_start)) /* #45 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #46 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #47 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #48 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #49 Reserverd */ |
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|
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LONG (ABSOLUTE(_start)) /* #50 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #51 Reserverd */ |
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LONG (DEFINED(_int_ERI0)?ABSOLUTE(_int_ERI0):ABSOLUTE(_start)) /* #52 SCI-0 ERI */ |
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LONG (DEFINED(_int_RXI0)?ABSOLUTE(_int_RXI0):ABSOLUTE(_start)) /* #53 SCI-0 RXI */ |
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LONG (DEFINED(_int_TXI0)?ABSOLUTE(_int_TXI0):ABSOLUTE(_start)) /* #54 SCI-0 TXI */ |
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LONG (DEFINED(_int_TEI0)?ABSOLUTE(_int_TEI0):ABSOLUTE(_start)) /* #55 SCI-0 TEI */ |
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LONG (ABSOLUTE(_start)) /* #56 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #57 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #58 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #59 Reserverd */ |
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|
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LONG (ABSOLUTE(_start)) /* #60 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #61 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #62 Reserverd */ |
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LONG (ABSOLUTE(_start)) /* #63 Reserverd */ |
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/* } > vectors */ |
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} > vvect |
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|
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.text : { |
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*(.text) |
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*(.strings) |
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*(.rodata) |
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} > vrom |
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/* |
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.vvect : { |
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*(.vvect) |
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} > vvect |
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*/ |
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|
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.bss : { |
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*(.bss) |
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*(.data) |
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} > ram |
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|
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.eram : { |
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_eram_start = .; |
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*(.eram) |
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_eram_end = .; |
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} > eram |
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|
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.temp : { |
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*(.eram) |
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_eram_end = .; |
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} > temp |
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.stack : { |
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_stack_start = .; |
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*(.stack) |
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_stack_end = .; |
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} > stack |
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} |
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