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Contents of /trunk/src/H8_3069_h8mon.x

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Revision 14 - (show annotations) (download)
Mon Oct 1 13:59:20 2012 UTC (11 years, 8 months ago) by tekken_boss
File size: 6281 byte(s)
000.001.014: 2012/10/01 22:55 : ROM code maintenance.

== modification
*  [SL811] Process wait added after start up and after reset. 500ms
   (countermeasure for ROM code).

== Confirmation
* Compilable. 

1
2 /* --------------------------------------------- */
3 /* H8-3069F Linker script */
4 /* (c) KAZ.Imamura */
5 /* */
6 /* CPU : Renesus H8/3069F 25MHz */
7 /* Memory : ROM 512KB, RAM 16KB E-RAM 2MB */
8 /* Target : AKI-3069-USB on h8mon */
9 /* --------------------------------------------- */
10
11 OUTPUT_FORMAT("elf32-h8300")
12 OUTPUT_ARCH(h8300h)
13 ENTRY("_start")
14 MEMORY
15 {
16 vectors(rw) : o = 0x000000, l = 0x100
17 vrom(rwx) : o = 0x400000, l = 0x1C000
18 ram(rwx) : o = 0x41C000, l = 0x4000
19 eram(rwx) : o = 0x420000, l = 0x1E0000
20 temp(rwx) : o = 0x600000, l = 0
21 vvect(rw) : o = 0xffbf20, l = 0x100
22 stack(rw) : o = 0xffd30c, l = 0
23 }
24
25 SECTIONS
26 {
27 .vvect : {
28 /* .vectors : { */
29 LONG (ABSOLUTE(_start)) /* #00 Reserverd */
30 LONG (ABSOLUTE(_start)) /* #01 Reserverd */
31 LONG (ABSOLUTE(_start)) /* #02 Reserverd */
32 LONG (ABSOLUTE(_start)) /* #03 Reserverd */
33 LONG (ABSOLUTE(_start)) /* #04 Reserverd */
34 LONG (ABSOLUTE(_start)) /* #05 Reserverd */
35 LONG (ABSOLUTE(_start)) /* #06 Reserverd */
36 LONG (ABSOLUTE(_start)) /* #07 NMI */
37 LONG (ABSOLUTE(_start)) /* #08 Reserverd */
38 LONG (ABSOLUTE(_start)) /* #09 Reserverd */
39
40 LONG (ABSOLUTE(_start)) /* #10 Reserverd */
41 LONG (ABSOLUTE(_start)) /* #11 Reserverd */
42 LONG (DEFINED(_int_IRQ0)?ABSOLUTE(_int_IRQ0):ABSOLUTE(_start)) /* #12 IRQ0 */
43 LONG (ABSOLUTE(_start)) /* #13 IRQ1 */
44 LONG (ABSOLUTE(_start)) /* #14 IRQ2 */
45 LONG (ABSOLUTE(_start)) /* #15 IRQ3 */
46 LONG (ABSOLUTE(_start)) /* #16 IRQ4 */
47 LONG (ABSOLUTE(_start)) /* #17 IRQ5 */
48 LONG (ABSOLUTE(_start)) /* #18 Reserverd */
49 LONG (ABSOLUTE(_start)) /* #19 Reserverd */
50
51 LONG (ABSOLUTE(_start)) /* #20 Watchdog timer (WOVI) */
52 LONG (ABSOLUTE(_start)) /* #21 Reserverd */
53 LONG (ABSOLUTE(_start)) /* #22 Reserverd */
54 LONG (ABSOLUTE(_start)) /* #23 Reserverd */
55 LONG (ABSOLUTE(_start)) /* #24 Reserverd */
56 LONG (ABSOLUTE(_start)) /* #25 Reserverd */
57 LONG (ABSOLUTE(_start)) /* #26 Reserverd */
58 LONG (ABSOLUTE(_start)) /* #27 Reserverd */
59 LONG (ABSOLUTE(_start)) /* #28 Reserverd */
60 LONG (ABSOLUTE(_start)) /* #29 Reserverd */
61
62 LONG (ABSOLUTE(_start)) /* #30 Reserverd */
63 LONG (ABSOLUTE(_start)) /* #31 Reserverd */
64 LONG (ABSOLUTE(_start)) /* #32 Reserverd */
65 LONG (ABSOLUTE(_start)) /* #33 Reserverd */
66 LONG (ABSOLUTE(_start)) /* #34 Reserverd */
67 LONG (ABSOLUTE(_start)) /* #35 Reserverd */
68 LONG (DEFINED(_int_CMIA0)?ABSOLUTE(_int_CMIA0):ABSOLUTE(_start)) /* #36 8bit timer CM-A0 */
69 LONG (ABSOLUTE(_start)) /* #37 Reserverd */
70 LONG (DEFINED(_int_CMIA0)?ABSOLUTE(_int_CMIA1):ABSOLUTE(_start)) /* #38 8bit timer CM-A1/B1 */
71 LONG (ABSOLUTE(_start)) /* #39 Reserverd */
72
73 LONG (ABSOLUTE(_start)) /* #40 Reserverd */
74 LONG (ABSOLUTE(_start)) /* #41 Reserverd */
75 LONG (ABSOLUTE(_start)) /* #42 Reserverd */
76 LONG (ABSOLUTE(_start)) /* #43 Reserverd */
77 LONG (DEFINED(_int_DEND0)?ABSOLUTE(_int_DEND0):ABSOLUTE(_start)) /* #44 DMAC transfer(ch0) end */
78 LONG (ABSOLUTE(_start)) /* #45 Reserverd */
79 LONG (ABSOLUTE(_start)) /* #46 Reserverd */
80 LONG (ABSOLUTE(_start)) /* #47 Reserverd */
81 LONG (ABSOLUTE(_start)) /* #48 Reserverd */
82 LONG (ABSOLUTE(_start)) /* #49 Reserverd */
83
84 LONG (ABSOLUTE(_start)) /* #50 Reserverd */
85 LONG (ABSOLUTE(_start)) /* #51 Reserverd */
86 LONG (DEFINED(_int_ERI0)?ABSOLUTE(_int_ERI0):ABSOLUTE(_start)) /* #52 SCI-0 ERI */
87 LONG (DEFINED(_int_RXI0)?ABSOLUTE(_int_RXI0):ABSOLUTE(_start)) /* #53 SCI-0 RXI */
88 LONG (DEFINED(_int_TXI0)?ABSOLUTE(_int_TXI0):ABSOLUTE(_start)) /* #54 SCI-0 TXI */
89 LONG (DEFINED(_int_TEI0)?ABSOLUTE(_int_TEI0):ABSOLUTE(_start)) /* #55 SCI-0 TEI */
90 LONG (ABSOLUTE(_start)) /* #56 Reserverd */
91 LONG (ABSOLUTE(_start)) /* #57 Reserverd */
92 LONG (ABSOLUTE(_start)) /* #58 Reserverd */
93 LONG (ABSOLUTE(_start)) /* #59 Reserverd */
94
95 LONG (ABSOLUTE(_start)) /* #60 Reserverd */
96 LONG (ABSOLUTE(_start)) /* #61 Reserverd */
97 LONG (ABSOLUTE(_start)) /* #62 Reserverd */
98 LONG (ABSOLUTE(_start)) /* #63 Reserverd */
99 /* } > vectors */
100 } > vvect
101
102 .text : {
103 *(.text)
104 *(.strings)
105 *(.rodata)
106 } > vrom
107 /*
108 .vvect : {
109 *(.vvect)
110 } > vvect
111 */
112
113 .bss : {
114 *(.bss)
115 *(.data)
116 } > ram
117
118 .eram : {
119 _eram_start = .;
120 *(.eram)
121 _eram_end = .;
122 } > eram
123
124 .temp : {
125 *(.eram)
126 _eram_end = .;
127 } > temp
128
129 .stack : {
130 _stack_start = .;
131 *(.stack)
132 _stack_end = .;
133 } > stack
134 }
135
136
137

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