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/[panda-p]/trunk/src/main.c

Contents of /trunk/src/main.c

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Revision 14 - (show annotations) (download) (as text)
Mon Oct 1 13:59:20 2012 UTC (11 years, 8 months ago) by tekken_boss
File MIME type: text/x-csrc
File size: 8194 byte(s) 
000.001.014: 2012/10/01 22:55 : ROM code maintenance.

== modification
*  [SL811] Process wait added after start up and after reset. 500ms
   (countermeasure for ROM code).

== Confirmation
* Compilable.
1
2 /* --------------------------------------------- */
3 /* H8-3069F Main function */
4 /* */
5 /* CPU : Renesus H8/3069F 25MHz */
6 /* Memory : ROM 512KB, RAM 16KB E-RAM 2MB */
7 /* (c) KAZ.Imamura */
8 /* --------------------------------------------- */
9
10 #include "common.h"
11 #include "sc1602.h"
12 #include "key.h"
13 #include "ui.h"
14 #include "sl811.h"
15 #include "usb_ms.h"
16 #include "led.h"
17 #include "serial.h"
18
19 int counter_500us;
20 unsigned int counter_1ms;
21
22 extern unsigned char eram_start;
23 extern unsigned char eram_end;
24
25 const char hex2char[256][3] = {
26 "00", "01", "02", "03", "04", "05", "06", "07", "08", "09", "0A", "0B", "0C", "0D", "0E", "0F",
27 "10", "11", "12", "13", "14", "15", "16", "17", "18", "19", "1A", "1B", "1C", "1D", "1E", "1F",
28 "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", "2A", "2B", "2C", "2D", "2E", "2F",
29 "30", "31", "32", "33", "34", "35", "36", "37", "38", "39", "3A", "3B", "3C", "3D", "3E", "3F",
30 "40", "41", "42", "43", "44", "45", "46", "47", "48", "49", "4A", "4B", "4C", "4D", "4E", "4F",
31 "50", "51", "52", "53", "54", "55", "56", "57", "58", "59", "5A", "5B", "5C", "5D", "5E", "5F",
32 "60", "61", "62", "63", "64", "65", "66", "67", "68", "69", "6A", "6B", "6C", "6D", "6E", "6F",
33 "70", "71", "72", "73", "74", "75", "76", "77", "78", "79", "7A", "7B", "7C", "7D", "7E", "7F",
34 "80", "81", "82", "83", "84", "85", "86", "87", "88", "89", "8A", "8B", "8C", "8D", "8E", "8F",
35 "90", "91", "92", "93", "94", "95", "96", "97", "98", "99", "9A", "9B", "9C", "9D", "9E", "9F",
36 "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "A8", "A9", "AA", "AB", "AC", "AD", "AE", "AF",
37 "B0", "B1", "B2", "B3", "B4", "B5", "B6", "B7", "B8", "B9", "BA", "BB", "BC", "BD", "BE", "BF",
38 "C0", "C1", "C2", "C3", "C4", "C5", "C6", "C7", "C8", "C9", "CA", "CB", "CC", "CD", "CE", "CF",
39 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7", "D8", "D9", "DA", "DB", "DC", "DD", "DE", "DF",
40 "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7", "E8", "E9", "EA", "EB", "EC", "ED", "EE", "EF",
41 "F0", "F1", "F2", "F3", "F4", "F5", "F6", "F7", "F8", "F9", "FA", "FB", "FC", "FD", "FE", "FF"
42 };
43
44
45 // -------------------------------------------
46 // Proto type definitions
47 // -------------------------------------------
48 void port_initialize(void);
49 void register_initialize(void);
50
51 void int_CMIA0();
52 void int_CMIA1();
53 void int_IRQ0();
54 void int_DEND0();
55
56 // Local
57 void memfill_word( unsigned int val );
58
59 // -------------------------------------------
60 // Main routine
61 // -------------------------------------------
62 int main(void) {
63
64 BSC.ABWCR.BYTE = 0xff; // CS0-CS7:8bit�o�X
65 BSC.ASTCR.BYTE = 0xff; // CS0-CS7:3�X�e�[�g�A�N�Z�X
66 BSC.BCR.BYTE = 0xc6; //
67
68 P1DDR=0xFF; // Port1 use for BUS
69 P2DDR=0x07; // Port2 use for BUS
70 P8DDR=0xEC; // Port8(4-2) use for CS
71 RTCOR=0x03;
72 RTMCSR=0x27;
73 DRCRB=0x98;
74 DRCRA=0x78;
75
76 // uCom initialize
77 port_initialize();
78 register_initialize();
79
80 // Function initialize
81 led_initialize();
82 sc1602_initialize();
83 key_initialize();
84 ui_initialize();
85 sl811_initialize();
86 usbms_initialize();
87 fat_initialize();
88 serial_initialize();
89
90 permit_irq();
91
92 while(1) {
93 led_process();
94 sc1602_process();
95 key_process();
96 ui_process();
97 sl811_process();
98 usbms_process();
99 fat_process();
100 serial_process();
101 }
102 }
103
104 // -------------------------------------------
105 // Port initialize for start up
106 // -------------------------------------------
107 void port_initialize(void) {
108
109 // Port4
110 // D7 : (OUT) LED 1
111 // D6 : (OUT) LED 0
112 // D5 : (OUT) LCD Driver - E
113 // D4 : (OUT) LCD Driver - RS
114 // D3 : (OUT) LCD Driver - DB7
115 // D2 : (OUT) LCD Driver - DB6
116 // D1 : (OUT) LCD Driver - DB5
117 // D0 : (OUT) LCD Driver - DB4
118 P4DDR = 0xFF;
119 P4DR.BYTE = 0x00;
120
121 // Port5
122 // D3 : (IN ) Switch D (BACK)
123 // D2 : (IN ) Switch C (OK)
124 // D1 : (IN ) Switch B (DOWN)
125 // D0 : (IN ) Switch A (UP)
126 P5DDR = 0xF0;
127 P5PCR.BYTE = 0xFF;
128 }
129
130
131 // -------------------------------------------
132 // Register initialize for start up
133 // -------------------------------------------
134 void register_initialize(void) {
135 // --------------------------------------
136 // DMAC
137 // --------------------------------------
138 DMAC0.DTCRA.BIT.DTE = 0; // Disable transfer
139 DMAC0.DTCRA.BIT.DTSZ = 1; // Word size transfer
140 DMAC0.DTCRA.BIT.DTIE = 0; // Disable interrupt
141 DMAC0.DTCRA.BIT.SAIDE = 0; // Source address fix
142 DMAC0.DTCRA.BIT.DTS = 0x06; // Full address mode (w/ Normal mode)
143 DMAC0.DTCRB.BIT.DAID = 0;
144 DMAC0.DTCRB.BIT.DAIDE = 1; // Destination address increment
145 DMAC0.DTCRB.BIT.TMS = 0;
146 DMAC0.DTCRB.BIT.DTS = 0x00; // Auto request (Burst mode)
147
148 // --------------------------------------
149 // D/A converter
150 // --------------------------------------
151 DA.DADR0 = 0x40;
152 DA.DACR.BIT.DAOE0 = 1;
153
154 // --------------------------------------
155 // 8 bit timer ch-0
156 // --------------------------------------
157
158 // Compare - A register
159 // 25MHz CPU : 40ns per clock
160 // Use 8bit timer as 64interval mode. (1 interval = 2.56us)
161 TMR0.TCORA = 195; // 499.2 us
162
163 // Control register
164 TMR0.TCR.BIT.CMIEB = 0; // Compare B disable
165 TMR0.TCR.BIT.CMIEA = 1; // Compare A enable
166 TMR0.TCR.BIT.OVIE = 0; // Overflow disable
167 TMR0.TCR.BIT.CCLR = 0x01; // Comp-A make counte clear
168 TMR0.TCR.BIT.CKS = 0x02; // Use internal clock. 64 interval.
169 TMR0.TCSR.BIT.CMFA = 0; // Interrupt Clear
170
171
172 // --------------------------------------
173 // 8 bit timer ch-1
174 // --------------------------------------
175
176 // Compare - A register
177 // 25MHz CPU : 40ns per clock
178 // Use 8bit timer as 8192interval mode. (1 interval = 327.68us)
179 TMR1.TCORA = 61; // 19.98848 ms
180
181 // Control register
182 TMR1.TCR.BIT.CMIEB = 0; // Compare B disable
183 TMR1.TCR.BIT.CMIEA = 1; // Compare A enable
184 TMR1.TCR.BIT.OVIE = 0; // Overflow disable
185 TMR1.TCR.BIT.CCLR = 0x01; // Comp-A make counte clear
186 TMR1.TCR.BIT.CKS = 0x03; // Use internal clock. 8192 interval.
187 TMR1.TCSR.BIT.CMFA = 0; // Interrupt Clear
188
189 }
190
191 // -------------------------------------------
192 // Interruption handler
193 // -------------------------------------------
194 #pragma interrupt (int_CMIA0)
195 void int_CMIA0() {
196 TMR0.TCSR.BIT.CMFA = 0; // Interrupt Clear
197 counter_500us++; // interrupt per 500us.
198
199 // 1ms interval
200 if( (counter_500us & 0x01) == 0x01 ) {
201 counter_1ms++;
202
203 sc1602_1ms_handler();
204 key_1ms_handler();
205 serial_1ms_handler();
206 } else {
207 ui_1ms_handler();
208 sl811_1ms_handler();
209 usbms_1ms_handler();
210 }
211 }
212
213 #pragma interrupt (int_CMIA1)
214 void int_CMIA1() {
215 TMR1.TCSR.BIT.CMFA = 0; // Interrupt Clear
216 led_20ms_handler();
217 }
218
219 #pragma interrupt (int_IRQ0)
220 void int_IRQ0() {
221 sl811_chip_irq();
222 }
223
224 #pragma interrupt (int_DEND0)
225 void int_DEND0() {
226
227 }
228
229
230
231
232 void memfill_word( unsigned int val ) {
233 unsigned int *addr;
234 unsigned int buf;
235
236 #ifdef SYS_DEBUG_ON
237 printf("[SYS] memory fill. (val=%04X) (1ms=%d)\r\n", counter_1ms, val);
238 #endif
239
240 buf = val;
241 addr = (unsigned int *)&eram_start;
242
243 while( addr < (unsigned int *)&eram_end ) {
244 DMAC0.MARA = (void *)&buf;
245 DMAC0.MARB = (void *)addr;
246 DMAC0.ETCRA = 0x0000; // 65536 times
247
248 DMAC0.DTCRB.BIT.DAID = 0;
249 DMAC0.DTCRB.BIT.DAIDE = 1; // Destination address increment
250 DMAC0.DTCRB.BIT.TMS = 0;
251 DMAC0.DTCRB.BIT.DTS = 0x00; // Auto request (Burst mode)
252
253 DMAC0.DTCRA.BIT.DTE = 0; // Disable transfer
254 DMAC0.DTCRA.BIT.DTSZ = 1; // Word size transfer
255 DMAC0.DTCRA.BIT.DTIE = 0; // Disable interrupt
256 DMAC0.DTCRA.BIT.SAIDE = 0; // Source address fix
257 DMAC0.DTCRA.BIT.DTS = 0x06; // Full address mode (w/ Normal mode)
258
259 if(DMAC0.DTCRB.BIT.DTME) DMAC0.DTCRB.BIT.DTME = 0;
260 DMAC0.DTCRB.BIT.DTME = 1;
261
262 if(DMAC0.DTCRA.BIT.DTE) DMAC0.DTCRA.BIT.DTE = 0;
263 DMAC0.DTCRA.BIT.DTE = 1;
264
265 while( DMAC0.DTCRA.BIT.DTE ) ;
266
267 addr += 0x10000;
268 }
269
270 #ifdef SYS_DEBUG_ON
271 printf("[SYS] done (1ms=%d)\r\n", counter_1ms);
272 #endif
273
274 }
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