compass and antenna rotator
Revision | dd517602ea263dde8c8a0cfd7f8e0e504d9076b0 (tree) |
---|---|
Time | 2019-07-25 22:39:29 |
Author | PJ_WORK |
Commiter | PJ_WORK |
msp: QMC
@@ -44,6 +44,7 @@ | ||
44 | 44 | all: $(DEPEND) |
45 | 45 | all: stk1.elf |
46 | 46 | all: stk2.hex |
47 | +all: stk2_QMC.hex | |
47 | 48 | all: compass.image.h |
48 | 49 | all: IR_test.image.h |
49 | 50 | all: LED.image.h |
@@ -74,9 +75,16 @@ | ||
74 | 75 | stk2.o: main_stk.c |
75 | 76 | $(CC) $(CFLAGS) -o $@ -c $^ |
76 | 77 | |
78 | +stk2_QMC.o: HW_DEF = -DSTK2 -DQMC | |
79 | +stk2_QMC.o: main_stk.c | |
80 | + $(CC) $(CFLAGS) -o $@ -c $^ | |
81 | + | |
77 | 82 | stk2.elf: stk2.o |
78 | 83 | $(CC) $(LDFLAGS) -o $@ $^ $(LIBS) |
79 | 84 | |
85 | +stk2_QMC.elf: stk2_QMC.o | |
86 | + $(CC) $(LDFLAGS) -o $@ $^ $(LIBS) | |
87 | + | |
80 | 88 | %.v: OBJCOPY=objcopy # msp430-objcopy fails! |
81 | 89 | %.v: %.elf |
82 | 90 | @$(SIZE) $< |
@@ -0,0 +1,6 @@ | ||
1 | + | |
2 | +mspprog-cli-v2.exe /p=lpt1 /d=msp430f449 /ec | |
3 | +mspprog-cli-v2.exe /p=lpt1 /d=msp430f449 /bc | |
4 | +mspprog-cli-v2.exe /p=lpt1 /d=msp430f449 /f=stk2_QMC.hex /w | |
5 | +mspprog-cli-v2.exe /p=lpt1 /d=msp430f449 /f=stk2_QMC.hex /v /post=hr | |
6 | +pause |
@@ -30,7 +30,11 @@ | ||
30 | 30 | |
31 | 31 | #include "I2C.h" |
32 | 32 | |
33 | +#ifdef QMC | |
34 | +#include "QMC5883.h" | |
35 | +#else | |
33 | 36 | #include "HMC5883.h" |
37 | +#endif | |
34 | 38 | |
35 | 39 | #ifndef STK |
36 | 40 | __attribute(( always_inline )) |
@@ -44,6 +48,20 @@ | ||
44 | 48 | bool HMC_check(void) |
45 | 49 | { |
46 | 50 | DO('I'); |
51 | + | |
52 | +#ifdef QMC | |
53 | + if (! I2C_write_one(QMC_ADDR, QMC_CFG_2, QMC_C2_INT_DIS | QMC_C2_ROL_DIS | QMC_C2_RESET)) { | |
54 | + DO('E'); DO('\r'); DO('\n'); | |
55 | + return 0; | |
56 | + } | |
57 | + uint8_t cfg[3]; | |
58 | + if (!I2C_read_block(QMC_ADDR, HMC_CFG_1, cfg, sizeof(cfg))) { | |
59 | + DO('E'); DO('0'); DO('\r'); DO('\n'); | |
60 | + return 0; | |
61 | + } | |
62 | + for(unsigned i=0; i<sizeof(cfg); ++i) | |
63 | + DOU8(cfg[i]); | |
64 | +#else | |
47 | 65 | enum { id_num = 3 }; |
48 | 66 | uint8_t id[id_num]; |
49 | 67 | if (!I2C_read_block(HMC_ADDR, HMC_ID_A, id, id_num)) { |
@@ -52,22 +70,38 @@ | ||
52 | 70 | } |
53 | 71 | for(unsigned i=0; i<id_num; ++i) |
54 | 72 | DOU8(id[i]); |
55 | - if ((id[0] != HMC_ID_A_EXP) || | |
56 | - (id[1] != HMC_ID_B_EXP) || | |
57 | - (id[2] != HMC_ID_C_EXP)) { | |
73 | + if ( (id[0] != HMC_ID_A_EXP) || | |
74 | + (id[1] != HMC_ID_B_EXP) || | |
75 | + (id[2] != HMC_ID_C_EXP) ) { | |
58 | 76 | DO('E'); DO('1'); DO('\r'); DO('\n'); |
59 | 77 | return 0; |
60 | 78 | } |
79 | +#endif | |
61 | 80 | DO('\r'); DO('\n'); |
62 | 81 | return 1; |
63 | 82 | } |
64 | 83 | |
84 | +#ifdef QMC | |
85 | +bool QMC_config(uint8_t cfg_1) | |
86 | +{ | |
87 | + DO('C'); | |
88 | + if (! I2C_write_one(QMC_ADDR, QMC_SR_PERIOD, QMC_SR_PERIOD_VAL)) { | |
89 | + DO('E'); DO('\r'); DO('\n'); | |
90 | + return 0; | |
91 | + } | |
92 | + if (! I2C_write_one(QMC_ADDR, QMC_CFG_1, cfg_1)) { | |
93 | + DO('E'); DO('\r'); DO('\n'); | |
94 | + return 0; | |
95 | + } | |
96 | + return 1; | |
97 | +} | |
98 | +#else | |
65 | 99 | bool HMC_config(uint8_t cfg_a, uint8_t cfg_b) |
66 | 100 | { |
67 | 101 | DO('C'); |
68 | 102 | enum { num = 3 }; |
69 | 103 | uint8_t cfg[num]; |
70 | - if (!I2C_read_block(HMC_ADDR, HMC_CFG_A, cfg, num)) { | |
104 | + if (! I2C_read_block(HMC_ADDR, HMC_CFG_A, cfg, num)) { | |
71 | 105 | DO('E'); DO('\r'); DO('\n'); |
72 | 106 | return 0; |
73 | 107 | } |
@@ -77,7 +111,7 @@ | ||
77 | 111 | if (cfg[0] != cfg_a) { // update cfg_a |
78 | 112 | DO(' '); |
79 | 113 | DO('a'); |
80 | - if (!I2C_write_one(HMC_ADDR, HMC_CFG_A, cfg_a)) { | |
114 | + if (! I2C_write_one(HMC_ADDR, HMC_CFG_A, cfg_a)) { | |
81 | 115 | DO('E'); DO('\r'); DO('\n'); |
82 | 116 | return 0; |
83 | 117 | } |
@@ -86,7 +120,7 @@ | ||
86 | 120 | if (cfg[1] != cfg_b) { // update cfg_b |
87 | 121 | DO(' '); |
88 | 122 | DO('b'); |
89 | - if (!I2C_write_one(HMC_ADDR, HMC_CFG_B, cfg_b)) { | |
123 | + if (! I2C_write_one(HMC_ADDR, HMC_CFG_B, cfg_b)) { | |
90 | 124 | DO('E'); DO('\r'); DO('\n'); |
91 | 125 | return 0; |
92 | 126 | } |
@@ -95,6 +129,7 @@ | ||
95 | 129 | DO('\r'); DO('\n'); |
96 | 130 | return ((cfg[0] == cfg_a) && (cfg[1] == cfg_b)); // cfg match |
97 | 131 | } |
132 | +#endif | |
98 | 133 | |
99 | 134 | bool HMC_stop() |
100 | 135 | { |
@@ -174,7 +209,13 @@ | ||
174 | 209 | uint8_t HMC_status() |
175 | 210 | { |
176 | 211 | uint8_t status; |
177 | - if (!I2C_read_block(HMC_ADDR, HMC_STATUS, &status, 1)) { | |
212 | + if (!I2C_read_block( | |
213 | +#ifdef QMC | |
214 | + QMC_ADDR, QMC_STATUS, | |
215 | +#else | |
216 | + HMC_ADDR, HMC_STATUS, | |
217 | +#endif | |
218 | + &status, 1)) { | |
178 | 219 | DO('E'); |
179 | 220 | DO('s'); |
180 | 221 | DO('\r'); DO('\n'); |
@@ -226,12 +267,21 @@ | ||
226 | 267 | |
227 | 268 | // NOTE: status canot be read after data, seems like I2C read index wraps to X_MSB reg instead |
228 | 269 | struct hmc_data_t { |
270 | +#ifdef QMC | |
271 | + uint8_t x_lsb; | |
272 | + uint8_t x_msb; | |
273 | + uint8_t y_lsb; | |
274 | + uint8_t y_msb; | |
275 | + uint8_t z_lsb; | |
276 | + uint8_t z_msb; | |
277 | +#else | |
229 | 278 | uint8_t x_msb; |
230 | 279 | uint8_t x_lsb; |
231 | 280 | uint8_t z_msb; |
232 | 281 | uint8_t z_lsb; |
233 | 282 | uint8_t y_msb; |
234 | 283 | uint8_t y_lsb; |
284 | +#endif | |
235 | 285 | } hmc_data; |
236 | 286 | |
237 | 287 | inline static int16_t hmc_data_x(void) |
@@ -279,7 +329,13 @@ | ||
279 | 329 | |
280 | 330 | static bool HMC_read_fast() |
281 | 331 | { |
282 | - return I2C_read_block(HMC_ADDR, HMC_OUT_X_MSB, (uint8_t *)&hmc_data, 6); | |
332 | + return I2C_read_block( | |
333 | +#ifdef QMC | |
334 | + HMC_ADDR, HMC_OUT_X_MSB, | |
335 | +#else | |
336 | + QMC_ADDR, QMC_OUT_X_LSB, | |
337 | +#endif | |
338 | + (uint8_t *)&hmc_data, 6); | |
283 | 339 | } |
284 | 340 | |
285 | 341 | bool HMC_read() |
@@ -601,7 +601,11 @@ | ||
601 | 601 | return 0; |
602 | 602 | } |
603 | 603 | // check/update config |
604 | +#ifdef QMC | |
605 | + return QMC_config(QMC_C1_MODE_CONT | QMC_C1_RATE_10 | QMC_C1_RANGE_2G | QMC_C1_OSR_512); | |
606 | +#else | |
604 | 607 | return HMC_config(HMC_BIAS_0 | HMC_RATE_1_5 | HMC_AVG_8, HMC_GAIN_1370); |
608 | +#endif | |
605 | 609 | } |
606 | 610 | |
607 | 611 | #include "find_drive_dir.h" |
@@ -9,6 +9,11 @@ | ||
9 | 9 | STR(START1, |
10 | 10 | { 0, LCD_S_S, LCD_S_P, LCD_S_9, LCD_S_B, LCD_S_N, LCD_S_M } ) |
11 | 11 | |
12 | +#ifdef QMC | |
13 | +STR(INIT, | |
14 | +{ LCD_S_Q, LCD_S_M, LCD_S_C, 0, LCD_S_C, LCD_S_F, LCD_S_G } ) | |
15 | +#else | |
12 | 16 | STR(INIT, |
13 | 17 | { LCD_S_H, LCD_S_M, LCD_S_C, 0, LCD_S_C, LCD_S_F, LCD_S_G } ) |
18 | +#endif | |
14 | 19 |