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Aarch64 SVE: Support changing vector lengths in gdbserver

There are two parts to this patch - gdbserver and GDB.

In gdbserver, there needs to be an equivalent of the thread_architecture
method used in GDB. In regcache, validate the tdesc with the
use target_validate_tdesc target function. If this fails then re-obtain
the target descriptor via general setup.
The aarch64 validation step simply checks the value of the VG register to
see if it matches the current kernel value.

In GDB, we have a similar check when receiving a stop reply. Validate the
tdesc using gdbarch_target_description_changed_p. If this fails re-obtain
the target descriptor via general setup - which is done by setting up an
tdep info structure containing the vector length.
The aarch64 validation step checks the value of VG (which is marked as
an expediated register, so is in the stop reply).

2018-08-03 Alan Hayward <alan.hayward@arm.com>

gdb/
* aarch64-tdep.c
(aarch64_target_description_changed_p): Check vector length.
(aarch64_target_get_tdep_info): Store vector length.
* remote.c (remote_target::process_stop_reply): Validate tdesc.
* target-descriptions.c (target_find_description): Pass through info.
* target-descriptions.h (target_find_description): Add arg.

gdbserver/
* linux-aarch64-low.c (aarch64_validate_tdesc): Check vector length.
* regcache.c (get_thread_regcache): Validate tdesc.

Add gdbserver target methods target_validate_tdesc and arch_setup

target_validate_tdesc () is added as a new target function.
This function checks current target description is still valid for the
current inferior, returning false if not. On SVE, we need to check if the
vector length has changed - if it has then the current target descriptor
will need to be switched to a valid one.

The existing arch_setup () is extended to be a target function.
This will later allow it to be called from get_thread_regcache () in
gdbserver/regcache.c. This call is required to generate a new target
descriptor if we have decided the current one is no longer valid.

2018-09-13 Alan Hayward <alan.hayward@arm.com>

gdbserver/
* linux-aarch64-low.c (int aarch64_validate_tdesc): New function.
(struct linux_target_ops): Add aarch64_validate_tdesc.
* linux-low.c (linux_validate_tdesc): New function.
(linux_target_ops): Add linux_arch_setup and linux_validate_tdesc.
* linux-low.h (linux_target_ops): Add validate_tdesc.
* target.h (struct target_ops): Likewise.
(target_arch_setup) New macro.
(target_validate_tdesc) New macro.

Add target_description_changed_p and target_get_tdep_info methods

target_description_changed_p () is added as a new gdbarch function.
Given a list of register values received from the inferior, it will check if
the current target descriptor is no longer valid for the inferior. This is
required because on SVE the register sizes can change whilst the inferior is
running.

target_get_tdep_info () is added as a new gdbarch function.
Given a list of registers, it will return a tdep info which then can be used
when creating/finding a valid target descriptor for that inferior.

Include stubbed aarch64 versions.

2018-09-13 Alan Hayward <alan.hayward@arm.com>

gdb/
* aarch64-tdep.c (aarch64_target_description_changed_p): New function.
(aarch64_target_get_tdep_info): New function.
(aarch64_gdbarch_init): Add in the new functions
* arch-utils.c (default_target_description_changed_p): New function.
(default_target_get_tdep_info): New function.
* arch-utils.h: (default_target_description_changed_p): New
declaration.
(default_target_get_tdep_info): New declaration.
* gdbarch.c: Regenerate.
* gdbarch.h: Regenerate.
* gdbarch.sh: (target_description_changed_p): New function.
(target_get_tdep_info): New function.

Name and seperate the union in gdbarch_info

Add gdbarch_target_info as a new union. This will allow it to be
used directly as a parameter to functions in later patches.

2018-09-13 Alan Hayward <alan.hayward@arm.com>

* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Use target_info.
* aarch64-tdep.c (aarch64_gdbarch_init): Likewise.
* amd64-linux-tdep.c (amd64_linux_init_abi): Likewise.
(amd64_x32_linux_init_abi): Likewise.
* amd64-tdep.c (amd64_init_abi): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Likewise.
* gdbarch.sh (gdbarch_target_info): Add union
(gdbarch_info): Use gdbarch_target_info.
* i386-linux-tdep.c (i386_linux_init_abi): Use target_info.
* i386-tdep.c (i386_gdbarch_init): Likewise.
* mips-linux-tdep.c (mips_linux_init_abi): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* ppc-linux-tdep.c (ppu2spu_sniffer): Likewise.
(ppc_linux_init_abi): Likewise.
* rs6000-tdep.c (rs6000_gdbarch_init): Likewise.
* s390-tdep.c (s390_gdbarch_init): Likewise.
* sparc-tdep.c (sparc32_gdbarch_init): Likewise.
* spu-multiarch.c (spu_gdbarch): Likewise.
* spu-tdep.c (spu_gdbarch_init): Likewise.

Aarch64 SVE: Support changing vector lengths in GDB

Override the thread_architecture method to place the vector length in the
tdep_info and then find using info. Do not set this as a pointer as
this will cause issues in later patches.

2018-09-13 Alan Hayward <alan.hayward@arm.com>

gdb/
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_get_tdesc_vq): Check for nullptr.
(aarch64_gdbarch_init): Ensure differemt tdesc for each VQ.

Aarch64 SVE: Support changing vector lengths for ptrace

When writing registers to the kernel, check if regcache VG has been changed. If
so then update the thread's vector length. If required, resize the registers
in the kernel dump before writing it back.

When reading registers from the kernel, ensure regcache VG register is updated.
The regcache registers should already be of the correct length.

2018-09-13 Alan Hayward <alan.hayward@arm.com>

gdb/
* aarch64-linux-nat.c (fetch_sveregs_from_thread): Pass regcache.
(store_sveregs_to_thread): Likewise.
* nat/aarch64-sve-linux-ptrace.c (aarch64_sve_get_sveregs): Check
vector length.
(aarch64_sve_regs_copy_to_reg_buf): Likewise.
(aarch64_sve_regs_copy_from_reg_buf): Likewise.
* nat/aarch64-sve-linux-ptrace.h (aarch64_sve_get_sveregs): Add
reg_buf arg.

Fix a use-after-freed error introduced by previous attempt to fix a Coverity scan result.

PR 23633
* objcopy.c (add_specific_symbols): Do not free the buffer at the
end of the function.

x86: Remove VexW=1 from WIG VEX movq and vmovq

Put back changes lost in commit 41d1ab6a6d96937fd0db04e53746f93f53687807.

i386: Update VexW field for VEX instructions

1. Mark VEX.W0 VEX instructions with VexW=1.
2. Mark VEX.W1 VEX instructions with VexW=2.
3. Remove VexW=1 from WIG VEX instructions.

* i386-opc.tbl: Add VexW=1 to VEX.W0 VEX movd, cvtsi2ss, cvtsi2sd,
pextrd, pinsrd, vcvtsi2sd, vcvtsi2ss, vmovd, vpextrd and vpinsrd.
Add VexW=2 to VEX.W1 VEX movd, movq, pextrq, pinsrq, vmod, vmovq,
vpextrq and vpinsrq. Remove VexW=1 from WIG VEX movq and vmovq.
* i386-tbl.h: Regenerated.

x86: Swap destination/source to encode VEX only if possible

When encoding VEX, we can swap destination and source only if there are
more than 1 register operand.

* config/tc-i386.c (build_vex_prefix): Swap destination and
source only if there are more than 1 register operand.

x86: drop bogus IgnoreSize from a few further insns

x86: drop bogus IgnoreSize from AVX512_4* insns

x86: drop bogus IgnoreSize from AVX512DQ insns

x86: drop bogus IgnoreSize from AVX512BW insns

x86: drop bogus IgnoreSize from AVX512VL insns

x86: drop bogus IgnoreSize from AVX512ER insns

x86: drop bogus IgnoreSize from AVX512F insns

x86: drop bogus IgnoreSize from SHA insns

x86: drop bogus IgnoreSize from XOP and SSE4a insns

x86: drop bogus IgnoreSize from AVX2 insns

x86: drop bogus IgnoreSize from AVX insns

x86: drop bogus IgnoreSize from GNFI insns

x86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insns

x86: drop bogus IgnoreSize from AES/VAES insns

x86: drop bogus IgnoreSize from SSE4.2 insns

x86: drop bogus IgnoreSize from SSE4.1 insns

x86: drop bogus IgnoreSize from SSSE3 insns

x86: drop bogus IgnoreSize from SSE3 insns

x86: drop bogus IgnoreSize from SSE2 insns

x86: drop bogus IgnoreSize from SSE insns