• R/O
  • HTTP
  • SSH
  • HTTPS

Commit

Tags
No Tags

Frequently used words (click to add to your profile)

javac++androidlinuxc#objective-cqt誰得windowscocoapythonphprubygameguibathyscaphec翻訳omegat計画中(planning stage)frameworktwittertestdomvb.netdirectxbtronarduinopreviewerゲームエンジン

Commit MetaInfo

Revision501593e336259122198802e0eb0815a9de69288c (tree)
Time2021-05-27 14:10:44
AuthorYoshinori Sato <ysato@user...>
CommiterYoshinori Sato

Log Message

hw/rx: rx-gdbsim Add bootstrup for linux

linux kernel require initializing some peripherals.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

Change Summary

Incremental Difference

--- a/hw/rx/rx-gdbsim.c
+++ b/hw/rx/rx-gdbsim.c
@@ -31,14 +31,16 @@
3131 /* Same address of GDB integrated simulator */
3232 #define SDRAM_BASE EXT_CS_BASE
3333
34+typedef struct RxGdbSimMachineClass RxGdbSimMachineClass;
35+
3436 struct RxGdbSimMachineClass {
3537 /*< private >*/
3638 MachineClass parent_class;
3739 /*< public >*/
3840 const char *mcu_name;
3941 uint32_t xtal_freq_hz;
42+ size_t romsize;
4043 };
41-typedef struct RxGdbSimMachineClass RxGdbSimMachineClass;
4244
4345 struct RxGdbSimMachineState {
4446 /*< private >*/
@@ -54,26 +56,50 @@ DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass,
5456 RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE)
5557
5658
57-static void rx_load_image(RXCPU *cpu, const char *filename,
58- uint32_t start, uint32_t size)
59+#define TINYBOOT_TOP (0xffffff00)
60+
61+static void set_bootstrap(hwaddr entry, hwaddr dtb)
5962 {
60- static uint32_t extable[32];
61- long kernel_size;
63+ /* Minimal hardware initialize for kernel requirement */
64+ /* linux kernel only works little-endian mode */
65+ static uint8_t tinyboot[256] = {
66+ 0xfb, 0x2e, 0x20, 0x00, 0x08, /* mov.l #0x80020, r2 */
67+ 0xf8, 0x2e, 0x00, 0x01, 0x01, /* mov.l #0x00010100, [r2] */
68+ 0xfb, 0x2e, 0x10, 0x00, 0x08, /* mov.l #0x80010, r2 */
69+ 0xf8, 0x22, 0xdf, 0x7d, 0xff, 0xff, /* mov.l #0xffff7ddf, [r2] */
70+ 0x62, 0x42, /* add #4, r2 */
71+ 0xf8, 0x22, 0xff, 0x7f, 0xff, 0x7f, /* mov.l #0x7fff7fff, [r2] */
72+ 0xfb, 0x2e, 0x40, 0x82, 0x08, /* mov.l #0x88240, r2 */
73+ 0x3c, 0x22, 0x00, /* mov.b #0, 2[r2] */
74+ 0x3c, 0x21, 0x4e, /* mov.b #78, 1[r2] */
75+ 0xfb, 0x22, 0x70, 0xff, 0xff, 0xff, /* mov.l #0xffffff70, r2 */
76+ 0xec, 0x21, /* mov.l [r2], r1 */
77+ 0xfb, 0x22, 0x74, 0xff, 0xff, 0xff, /* mov.l #0xffffff74, r2 */
78+ 0xec, 0x22, /* mov.l [r2], r2 */
79+ 0x7f, 0x02, /* jmp r2 */
80+ };
6281 int i;
6382
83+ *((uint32_t *)&tinyboot[0x70]) = cpu_to_le32(dtb);
84+ *((uint32_t *)&tinyboot[0x74]) = cpu_to_le32(entry);
85+
86+ /* setup exception trap trampoline */
87+ for (i = 0; i < 31; i++) {
88+ *((uint32_t *)&tinyboot[0x80 + i * 4]) = cpu_to_le32(0x10 + i * 4);
89+ }
90+ *((uint32_t *)&tinyboot[0xfc]) = cpu_to_le32(TINYBOOT_TOP);
91+ rom_add_blob_fixed("tinyboot", tinyboot, sizeof(tinyboot), TINYBOOT_TOP);
92+}
93+
94+static void load_kernel(const char *filename, uint32_t start, uint32_t size)
95+{
96+ long kernel_size;
97+
6498 kernel_size = load_image_targphys(filename, start, size);
6599 if (kernel_size < 0) {
66100 fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
67101 exit(1);
68102 }
69- cpu->env.pc = start;
70-
71- /* setup exception trap trampoline */
72- /* linux kernel only works little-endian mode */
73- for (i = 0; i < ARRAY_SIZE(extable); i++) {
74- extable[i] = cpu_to_le32(0x10 + i * 4);
75- }
76- rom_add_blob_fixed("extable", extable, sizeof(extable), VECTOR_TABLE_BASE);
77103 }
78104
79105 static void rx_gdbsim_init(MachineState *machine)
@@ -101,33 +127,15 @@ static void rx_gdbsim_init(MachineState *machine)
101127 &error_abort);
102128 object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz",
103129 rxc->xtal_freq_hz, &error_abort);
104- object_property_set_bool(OBJECT(&s->mcu), "load-kernel",
105- kernel_filename != NULL, &error_abort);
106-
107- if (!kernel_filename) {
108- if (machine->firmware) {
109- rom_add_file_fixed(machine->firmware, RX62N_CFLASH_BASE, 0);
110- } else if (!qtest_enabled()) {
111- error_report("No bios or kernel specified");
112- exit(1);
113- }
114- }
115-
116- qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
117-
118130 /* Load kernel and dtb */
119131 if (kernel_filename) {
120132 ram_addr_t kernel_offset;
121-
122- /*
123- * The kernel image is loaded into
124- * the latter half of the SDRAM space.
125- */
133+ ram_addr_t dtb_offset = 0;
126134 kernel_offset = machine->ram_size / 2;
127- rx_load_image(RX_CPU(first_cpu), kernel_filename,
128- SDRAM_BASE + kernel_offset, kernel_offset);
135+
136+ load_kernel(machine->kernel_filename,
137+ SDRAM_BASE + kernel_offset, kernel_offset);
129138 if (dtb_filename) {
130- ram_addr_t dtb_offset;
131139 int dtb_size;
132140 g_autofree void *dtb = load_device_tree(dtb_filename, &dtb_size);
133141
@@ -145,10 +153,17 @@ static void rx_gdbsim_init(MachineState *machine)
145153 dtb_offset = machine->ram_size - dtb_size;
146154 rom_add_blob_fixed("dtb", dtb, dtb_size,
147155 SDRAM_BASE + dtb_offset);
148- /* Set dtb address to R1 */
149- RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
156+ }
157+ set_bootstrap(SDRAM_BASE + kernel_offset, SDRAM_BASE + dtb_offset);
158+ } else {
159+ if (machine->firmware) {
160+ rom_add_file_fixed(machine->firmware, RX62N_CFLASH_BASE, 0);
161+ } else if (!qtest_enabled()) {
162+ error_report("No bios or kernel specified");
163+ exit(1);
150164 }
151165 }
166+ qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
152167 }
153168
154169 static void rx_gdbsim_class_init(ObjectClass *oc, void *data)
--- a/hw/rx/rx62n.c
+++ b/hw/rx/rx62n.c
@@ -58,20 +58,6 @@
5858 #define RX62N_XTAL_MIN_HZ (8 * 1000 * 1000)
5959 #define RX62N_XTAL_MAX_HZ (14 * 1000 * 1000)
6060
61-struct RX62NClass {
62- /*< private >*/
63- DeviceClass parent_class;
64- /*< public >*/
65- const char *name;
66- uint64_t ram_size;
67- uint64_t rom_flash_size;
68- uint64_t data_flash_size;
69-};
70-typedef struct RX62NClass RX62NClass;
71-
72-DECLARE_CLASS_CHECKERS(RX62NClass, RX62N_MCU,
73- TYPE_RX62N_MCU)
74-
7561 /*
7662 * IRQ -> IPR mapping table
7763 * 0x00 - 0x91: IPR no (IPR00 to IPR91)
@@ -281,7 +267,6 @@ static void rx62n_realize(DeviceState *dev, Error **errp)
281267 static Property rx62n_properties[] = {
282268 DEFINE_PROP_LINK("main-bus", RX62NState, sysmem, TYPE_MEMORY_REGION,
283269 MemoryRegion *),
284- DEFINE_PROP_BOOL("load-kernel", RX62NState, kernel, false),
285270 DEFINE_PROP_UINT32("xtal-frequency-hz", RX62NState, xtal_freq_hz, 0),
286271 DEFINE_PROP_END_OF_LIST(),
287272 };
--- a/include/hw/rx/rx62n.h
+++ b/include/hw/rx/rx62n.h
@@ -33,14 +33,6 @@
3333 #include "qemu/units.h"
3434 #include "qom/object.h"
3535
36-#define TYPE_RX62N_MCU "rx62n-mcu"
37-typedef struct RX62NState RX62NState;
38-DECLARE_INSTANCE_CHECKER(RX62NState, RX62N_MCU,
39- TYPE_RX62N_MCU)
40-
41-#define TYPE_R5F562N7_MCU "r5f562n7-mcu"
42-#define TYPE_R5F562N8_MCU "r5f562n8-mcu"
43-
4436 #define EXT_CS_BASE 0x01000000
4537 #define VECTOR_TABLE_BASE 0xffffff80
4638 #define RX62N_CFLASH_BASE 0xfff80000
@@ -49,7 +41,7 @@ DECLARE_INSTANCE_CHECKER(RX62NState, RX62N_MCU,
4941 #define RX62N_NR_CMT 2
5042 #define RX62N_NR_SCI 6
5143
52-struct RX62NState {
44+typedef struct RX62NState {
5345 /*< private >*/
5446 DeviceState parent_obj;
5547 /*< public >*/
@@ -75,5 +67,11 @@ struct RX62NState {
7567 uint32_t xtal_freq_hz;
7668 } RX62NState;
7769
70+#define TYPE_RX62N_MCU "rx62n-mcu"
71+
72+#define TYPE_R5F562N7_MCU "r5f562n7-mcu"
73+#define TYPE_R5F562N8_MCU "r5f562n8-mcu"
74+DECLARE_INSTANCE_CHECKER(RX62NState, RX62N_MCU,
75+ TYPE_RX62N_MCU)
7876
7977 #endif