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File Information

File Size
1,067,418 bytes
MD5
0afe2aae2541d003c5c296311ba9b029

Project Description

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.