GNU Binutils with patches for OS216
Revision | 29298bf66f62f2f6c1efb0685623fbc29dfade90 (tree) |
---|---|
Time | 2019-12-17 21:28:19 |
Author | Alan Modra <amodra@gmai...> |
Commiter | Alan Modra |
ubsan: aarch64: left shift cannot be represented in type 'int64_t'
* aarch64-opc.c (value_fit_signed_field_p): Avoid signed overflow.
(value_fit_unsigned_field_p): Likewise.
(aarch64_wide_constant_p): Likewise.
(operand_general_constraint_met_p): Likewise.
* aarch64-opc.h (aarch64_wide_constant_p): Update prototype.
@@ -1,5 +1,13 @@ | ||
1 | 1 | 2019-12-17 Alan Modra <amodra@gmail.com> |
2 | 2 | |
3 | + * aarch64-opc.c (value_fit_signed_field_p): Avoid signed overflow. | |
4 | + (value_fit_unsigned_field_p): Likewise. | |
5 | + (aarch64_wide_constant_p): Likewise. | |
6 | + (operand_general_constraint_met_p): Likewise. | |
7 | + * aarch64-opc.h (aarch64_wide_constant_p): Update prototype. | |
8 | + | |
9 | +2019-12-17 Alan Modra <amodra@gmail.com> | |
10 | + | |
3 | 11 | * nds32-dis.c (nds32_mask_opcode): Avoid signed overflow. |
4 | 12 | (print_insn_nds32): Use uint64_t for "given" and "given1". |
5 | 13 |
@@ -546,7 +546,7 @@ value_fit_signed_field_p (int64_t value, unsigned width) | ||
546 | 546 | assert (width < 32); |
547 | 547 | if (width < sizeof (value) * 8) |
548 | 548 | { |
549 | - int64_t lim = (int64_t)1 << (width - 1); | |
549 | + int64_t lim = (uint64_t) 1 << (width - 1); | |
550 | 550 | if (value >= -lim && value < lim) |
551 | 551 | return 1; |
552 | 552 | } |
@@ -560,7 +560,7 @@ value_fit_unsigned_field_p (int64_t value, unsigned width) | ||
560 | 560 | assert (width < 32); |
561 | 561 | if (width < sizeof (value) * 8) |
562 | 562 | { |
563 | - int64_t lim = (int64_t)1 << width; | |
563 | + int64_t lim = (uint64_t) 1 << width; | |
564 | 564 | if (value >= 0 && value < lim) |
565 | 565 | return 1; |
566 | 566 | } |
@@ -1063,7 +1063,7 @@ match_operands_qualifier (aarch64_inst *inst, bfd_boolean update_p) | ||
1063 | 1063 | amount will be returned in *SHIFT_AMOUNT. */ |
1064 | 1064 | |
1065 | 1065 | bfd_boolean |
1066 | -aarch64_wide_constant_p (int64_t value, int is32, unsigned int *shift_amount) | |
1066 | +aarch64_wide_constant_p (uint64_t value, int is32, unsigned int *shift_amount) | |
1067 | 1067 | { |
1068 | 1068 | int amount; |
1069 | 1069 |
@@ -1074,22 +1074,21 @@ aarch64_wide_constant_p (int64_t value, int is32, unsigned int *shift_amount) | ||
1074 | 1074 | /* Allow all zeros or all ones in top 32-bits, so that |
1075 | 1075 | 32-bit constant expressions like ~0x80000000 are |
1076 | 1076 | permitted. */ |
1077 | - uint64_t ext = value; | |
1078 | - if (ext >> 32 != 0 && ext >> 32 != (uint64_t) 0xffffffff) | |
1077 | + if (value >> 32 != 0 && value >> 32 != 0xffffffff) | |
1079 | 1078 | /* Immediate out of range. */ |
1080 | 1079 | return FALSE; |
1081 | - value &= (int64_t) 0xffffffff; | |
1080 | + value &= 0xffffffff; | |
1082 | 1081 | } |
1083 | 1082 | |
1084 | 1083 | /* first, try movz then movn */ |
1085 | 1084 | amount = -1; |
1086 | - if ((value & ((int64_t) 0xffff << 0)) == value) | |
1085 | + if ((value & ((uint64_t) 0xffff << 0)) == value) | |
1087 | 1086 | amount = 0; |
1088 | - else if ((value & ((int64_t) 0xffff << 16)) == value) | |
1087 | + else if ((value & ((uint64_t) 0xffff << 16)) == value) | |
1089 | 1088 | amount = 16; |
1090 | - else if (!is32 && (value & ((int64_t) 0xffff << 32)) == value) | |
1089 | + else if (!is32 && (value & ((uint64_t) 0xffff << 32)) == value) | |
1091 | 1090 | amount = 32; |
1092 | - else if (!is32 && (value & ((int64_t) 0xffff << 48)) == value) | |
1091 | + else if (!is32 && (value & ((uint64_t) 0xffff << 48)) == value) | |
1093 | 1092 | amount = 48; |
1094 | 1093 | |
1095 | 1094 | if (amount == -1) |
@@ -1535,7 +1534,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, | ||
1535 | 1534 | : _("z0-z7 expected")); |
1536 | 1535 | return 0; |
1537 | 1536 | } |
1538 | - mask = (1 << (size - shift)) - 1; | |
1537 | + mask = (1u << (size - shift)) - 1; | |
1539 | 1538 | if (!value_in_range_p (opnd->reglane.index, 0, mask)) |
1540 | 1539 | { |
1541 | 1540 | set_elem_idx_out_of_range_error (mismatch_detail, idx, 0, mask); |
@@ -2161,7 +2160,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, | ||
2161 | 2160 | if (!value_fit_unsigned_field_p (opnd->imm.value, size)) |
2162 | 2161 | { |
2163 | 2162 | set_imm_out_of_range_error (mismatch_detail, idx, 0, |
2164 | - (1 << size) - 1); | |
2163 | + (1u << size) - 1); | |
2165 | 2164 | return 0; |
2166 | 2165 | } |
2167 | 2166 | break; |
@@ -485,7 +485,7 @@ enum aarch64_modifier_kind | ||
485 | 485 | aarch64_get_operand_modifier_from_value (aarch64_insn, bfd_boolean); |
486 | 486 | |
487 | 487 | |
488 | -bfd_boolean aarch64_wide_constant_p (int64_t, int, unsigned int *); | |
488 | +bfd_boolean aarch64_wide_constant_p (uint64_t, int, unsigned int *); | |
489 | 489 | bfd_boolean aarch64_logical_immediate_p (uint64_t, int, aarch64_insn *); |
490 | 490 | int aarch64_shrink_expanded_imm8 (uint64_t); |
491 | 491 |