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hardware/intel/intel-driver


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Revisionf032d06998af4cc4f80dc141ba14cca906d450e9 (tree)
Time2015-03-19 11:01:29
AuthorQu,Pengfei <Pengfei.Qu@inte...>
CommiterXiang, Haihao

Log Message

HEVC ENC:Added slice header generated internally

Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit 2c54b96fe89aa0839f8c34935a84b79c41fde55d)

Conflicts:
src/i965_encoder_utils.h

Change Summary

Incremental Difference

--- a/src/i965_drv_video.h
+++ b/src/i965_drv_video.h
@@ -1,5 +1,5 @@
11 /*
2- * Copyright © 2009 Intel Corporation
2+ * Copyright ?2009 Intel Corporation
33 *
44 * Permission is hereby granted, free of charge, to any person obtaining a
55 * copy of this software and associated documentation files (the
@@ -33,6 +33,7 @@
3333 #include <va/va.h>
3434 #include <va/va_enc_h264.h>
3535 #include <va/va_enc_mpeg2.h>
36+#include <va/va_enc_hevc.h>
3637 #include <va/va_enc_jpeg.h>
3738 #include <va/va_enc_vp8.h>
3839 #include <va/va_vpp.h>
@@ -151,8 +152,8 @@ struct encode_state
151152 /* for ext */
152153 struct buffer_store *seq_param_ext;
153154 struct buffer_store *pic_param_ext;
154- struct buffer_store *packed_header_param[4];
155- struct buffer_store *packed_header_data[4];
155+ struct buffer_store *packed_header_param[5];
156+ struct buffer_store *packed_header_data[5];
156157 struct buffer_store **slice_params_ext;
157158 int max_slice_params_ext;
158159 int num_slice_params_ext;
@@ -172,6 +173,8 @@ struct encode_state
172173 int max_packed_header_data_ext;
173174 int num_packed_header_data_ext;
174175
176+ /* the index of current vps and sps ,special for HEVC*/
177+ int vps_sps_seq_index;
175178 /* the index of current slice */
176179 int slice_index;
177180 /* the array is determined by max_slice_params_ext */
@@ -370,6 +373,7 @@ struct hw_codec_info
370373 unsigned int has_vp8_encoding:1;
371374 unsigned int has_h264_mvc_encoding:1;
372375 unsigned int has_hevc_decoding:1;
376+ unsigned int has_hevc_encoding:1;
373377
374378 unsigned int num_filters;
375379 struct i965_filter filters[VAProcFilterCount];
@@ -455,6 +459,7 @@ va_enc_packed_type_to_idx(int packed_type);
455459 #define CODEC_H264_MVC 2
456460 #define CODEC_JPEG 3
457461 #define CODEC_VP8 4
462+#define CODEC_HEVC 5
458463
459464 #define H264_DELIMITER0 0x00
460465 #define H264_DELIMITER1 0x00
@@ -468,6 +473,12 @@ va_enc_packed_type_to_idx(int packed_type);
468473 #define MPEG2_DELIMITER3 0x00
469474 #define MPEG2_DELIMITER4 0xb0
470475
476+#define HEVC_DELIMITER0 0x00
477+#define HEVC_DELIMITER1 0x00
478+#define HEVC_DELIMITER2 0x00
479+#define HEVC_DELIMITER3 0x00
480+#define HEVC_DELIMITER4 0x00
481+
471482 struct i965_coded_buffer_segment
472483 {
473484 VACodedBufferSegment base;
--- a/src/i965_encoder_utils.c
+++ b/src/i965_encoder_utils.c
@@ -30,6 +30,7 @@
3030 #include <va/va_enc_h264.h>
3131 #include <va/va_enc_mpeg2.h>
3232 #include <va/va_enc_vp8.h>
33+#include <va/va_enc_hevc.h>
3334 #include <math.h>
3435 #include "gen6_mfc.h"
3536 #include "i965_encoder_utils.h"
@@ -62,6 +63,17 @@
6263 #define PROFILE_IDC_MAIN 77
6364 #define PROFILE_IDC_HIGH 100
6465
66+/*HEVC*/
67+#define VPS_NUT 32
68+#define SPS_NUT 33
69+#define PPS_NUT 34
70+#define IDR_WRADL_NUT 19
71+#define IDR_NLP_NUT 20
72+#define SLICE_TRAIL_N_NUT 0
73+#define SLICE_TRAIL_R_NUT 1
74+#define PREFIX_SEI_NUT 39
75+#define SUFFIX_SEI_NUT 40
76+
6577 struct __avc_bitstream {
6678 unsigned int *buffer;
6779 int bit_offset;
@@ -666,3 +678,448 @@ void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param,
666678 mfc_context->vp8_state.vp8_frame_header = (unsigned char *)bs.buffer;
667679 mfc_context->vp8_state.frame_header_bit_count = bs.bit_offset;
668680 }
681+
682+/* HEVC to do for internal header generated*/
683+
684+void nal_header_hevc(avc_bitstream *bs, int nal_unit_type, int temporalid)
685+{
686+ /* forbidden_zero_bit: 0 */
687+ avc_bitstream_put_ui(bs, 0, 1);
688+ /* nal unit_type */
689+ avc_bitstream_put_ui(bs, nal_unit_type, 6);
690+ /* layer_id. currently it is zero */
691+ avc_bitstream_put_ui(bs, 0, 6);
692+ /* teporalid + 1 .*/
693+ avc_bitstream_put_ui(bs, temporalid + 1, 3);
694+}
695+
696+int build_hevc_sei_buffering_period(int init_cpb_removal_delay_length,
697+ unsigned int init_cpb_removal_delay,
698+ unsigned int init_cpb_removal_delay_offset,
699+ unsigned char **sei_buffer)
700+{
701+ unsigned char *byte_buf;
702+ int bp_byte_size, i;
703+ //unsigned int cpb_removal_delay;
704+
705+ avc_bitstream nal_bs;
706+ avc_bitstream sei_bp_bs;
707+
708+ avc_bitstream_start(&sei_bp_bs);
709+ avc_bitstream_put_ue(&sei_bp_bs, 0); /*seq_parameter_set_id*/
710+ /* SEI buffer period info */
711+ /* NALHrdBpPresentFlag == 1 */
712+ avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay,init_cpb_removal_delay_length);
713+ avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay_offset,init_cpb_removal_delay_length);
714+ if ( sei_bp_bs.bit_offset & 0x7) {
715+ avc_bitstream_put_ui(&sei_bp_bs, 1, 1);
716+ }
717+ avc_bitstream_end(&sei_bp_bs);
718+ bp_byte_size = (sei_bp_bs.bit_offset + 7) / 8;
719+
720+ avc_bitstream_start(&nal_bs);
721+ nal_start_code_prefix(&nal_bs);
722+ nal_header_hevc(&nal_bs, PREFIX_SEI_NUT ,0);
723+
724+ /* Write the SEI buffer period data */
725+ avc_bitstream_put_ui(&nal_bs, 0, 8);
726+ avc_bitstream_put_ui(&nal_bs, bp_byte_size, 8);
727+
728+ byte_buf = (unsigned char *)sei_bp_bs.buffer;
729+ for(i = 0; i < bp_byte_size; i++) {
730+ avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8);
731+ }
732+ free(byte_buf);
733+
734+ avc_rbsp_trailing_bits(&nal_bs);
735+ avc_bitstream_end(&nal_bs);
736+
737+ *sei_buffer = (unsigned char *)nal_bs.buffer;
738+
739+ return nal_bs.bit_offset;
740+}
741+
742+int build_hevc_idr_sei_buffer_timing(unsigned int init_cpb_removal_delay_length,
743+ unsigned int init_cpb_removal_delay,
744+ unsigned int init_cpb_removal_delay_offset,
745+ unsigned int cpb_removal_length,
746+ unsigned int cpb_removal_delay,
747+ unsigned int dpb_output_length,
748+ unsigned int dpb_output_delay,
749+ unsigned char **sei_buffer)
750+{
751+ unsigned char *byte_buf;
752+ int bp_byte_size, i, pic_byte_size;
753+ //unsigned int cpb_removal_delay;
754+
755+ avc_bitstream nal_bs;
756+ avc_bitstream sei_bp_bs, sei_pic_bs;
757+
758+ avc_bitstream_start(&sei_bp_bs);
759+ avc_bitstream_put_ue(&sei_bp_bs, 0); /*seq_parameter_set_id*/
760+ /* SEI buffer period info */
761+ /* NALHrdBpPresentFlag == 1 */
762+ avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay,init_cpb_removal_delay_length);
763+ avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay_offset,init_cpb_removal_delay_length);
764+ if ( sei_bp_bs.bit_offset & 0x7) {
765+ avc_bitstream_put_ui(&sei_bp_bs, 1, 1);
766+ }
767+ avc_bitstream_end(&sei_bp_bs);
768+ bp_byte_size = (sei_bp_bs.bit_offset + 7) / 8;
769+
770+ /* SEI pic timing info */
771+ avc_bitstream_start(&sei_pic_bs);
772+ /* The info of CPB and DPB delay is controlled by CpbDpbDelaysPresentFlag,
773+ * which is derived as 1 if one of the following conditions is true:
774+ * nal_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1,
775+ * vcl_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1,
776+ */
777+ //cpb_removal_delay = (hevc_context.current_cpb_removal - hevc_context.prev_idr_cpb_removal);
778+ avc_bitstream_put_ui(&sei_pic_bs, cpb_removal_delay, cpb_removal_length);
779+ avc_bitstream_put_ui(&sei_pic_bs, dpb_output_delay,dpb_output_length);
780+ if ( sei_pic_bs.bit_offset & 0x7) {
781+ avc_bitstream_put_ui(&sei_pic_bs, 1, 1);
782+ }
783+ /* The pic_structure_present_flag determines whether the pic_structure
784+ * info is written into the SEI pic timing info.
785+ * Currently it is set to zero.
786+ */
787+ avc_bitstream_end(&sei_pic_bs);
788+ pic_byte_size = (sei_pic_bs.bit_offset + 7) / 8;
789+
790+ avc_bitstream_start(&nal_bs);
791+ nal_start_code_prefix(&nal_bs);
792+ nal_header_hevc(&nal_bs, PREFIX_SEI_NUT ,0);
793+
794+ /* Write the SEI buffer period data */
795+ avc_bitstream_put_ui(&nal_bs, 0, 8);
796+ avc_bitstream_put_ui(&nal_bs, bp_byte_size, 8);
797+
798+ byte_buf = (unsigned char *)sei_bp_bs.buffer;
799+ for(i = 0; i < bp_byte_size; i++) {
800+ avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8);
801+ }
802+ free(byte_buf);
803+ /* write the SEI pic timing data */
804+ avc_bitstream_put_ui(&nal_bs, 0x01, 8);
805+ avc_bitstream_put_ui(&nal_bs, pic_byte_size, 8);
806+
807+ byte_buf = (unsigned char *)sei_pic_bs.buffer;
808+ for(i = 0; i < pic_byte_size; i++) {
809+ avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8);
810+ }
811+ free(byte_buf);
812+
813+ avc_rbsp_trailing_bits(&nal_bs);
814+ avc_bitstream_end(&nal_bs);
815+
816+ *sei_buffer = (unsigned char *)nal_bs.buffer;
817+
818+ return nal_bs.bit_offset;
819+}
820+
821+int build_hevc_sei_pic_timing(unsigned int cpb_removal_length, unsigned int cpb_removal_delay,
822+ unsigned int dpb_output_length, unsigned int dpb_output_delay,
823+ unsigned char **sei_buffer)
824+{
825+ unsigned char *byte_buf;
826+ int i, pic_byte_size;
827+ //unsigned int cpb_removal_delay;
828+
829+ avc_bitstream nal_bs;
830+ avc_bitstream sei_pic_bs;
831+
832+ avc_bitstream_start(&sei_pic_bs);
833+ /* The info of CPB and DPB delay is controlled by CpbDpbDelaysPresentFlag,
834+ * which is derived as 1 if one of the following conditions is true:
835+ * nal_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1,
836+ * vcl_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1,
837+ */
838+ //cpb_removal_delay = (hevc_context.current_cpb_removal - hevc_context.current_idr_cpb_removal);
839+ avc_bitstream_put_ui(&sei_pic_bs, cpb_removal_delay, cpb_removal_length);
840+ avc_bitstream_put_ui(&sei_pic_bs, dpb_output_delay, dpb_output_length);
841+ if ( sei_pic_bs.bit_offset & 0x7) {
842+ avc_bitstream_put_ui(&sei_pic_bs, 1, 1);
843+ }
844+
845+ /* The pic_structure_present_flag determines whether the pic_structure
846+ * info is written into the SEI pic timing info.
847+ * Currently it is set to zero.
848+ */
849+ avc_bitstream_end(&sei_pic_bs);
850+ pic_byte_size = (sei_pic_bs.bit_offset + 7) / 8;
851+
852+ avc_bitstream_start(&nal_bs);
853+ nal_start_code_prefix(&nal_bs);
854+ nal_header_hevc(&nal_bs, PREFIX_SEI_NUT ,0);
855+
856+ /* write the SEI Pic timing data */
857+ avc_bitstream_put_ui(&nal_bs, 0x01, 8);
858+ avc_bitstream_put_ui(&nal_bs, pic_byte_size, 8);
859+
860+ byte_buf = (unsigned char *)sei_pic_bs.buffer;
861+ for(i = 0; i < pic_byte_size; i++) {
862+ avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8);
863+ }
864+ free(byte_buf);
865+
866+ avc_rbsp_trailing_bits(&nal_bs);
867+ avc_bitstream_end(&nal_bs);
868+
869+ *sei_buffer = (unsigned char *)nal_bs.buffer;
870+
871+ return nal_bs.bit_offset;
872+}
873+
874+typedef struct _RefPicSet
875+{
876+ unsigned char num_negative_pics;
877+ unsigned char num_positive_pics;
878+ unsigned char delta_poc_s0_minus1[8];
879+ unsigned char used_by_curr_pic_s0_flag[8];
880+ unsigned char delta_poc_s1_minus1[8];
881+ unsigned char used_by_curr_pic_s1_flag[8];
882+ unsigned int inter_ref_pic_set_prediction_flag;
883+}hevcRefPicSet;
884+
885+void hevc_short_term_ref_pic_set(avc_bitstream *bs,VAEncSliceParameterBufferHEVC *slice_param,int curPicOrderCnt)
886+{
887+ hevcRefPicSet hevc_rps;
888+ int rps_idx = 1, ref_idx = 0;
889+ int i = 0;
890+
891+ hevc_rps.inter_ref_pic_set_prediction_flag = 0;
892+ /* s0: between I and P/B; s1 : between P and B */
893+ hevc_rps.num_negative_pics = (slice_param->slice_type!=SLICE_TYPE_I) ? 1 : 0;
894+ hevc_rps.num_positive_pics = (slice_param->slice_type==SLICE_TYPE_B) ? 1 : 0;
895+ hevc_rps.delta_poc_s0_minus1[0] = 0;
896+ hevc_rps.used_by_curr_pic_s0_flag[0] = 0;
897+ hevc_rps.delta_poc_s1_minus1[0] = 0;
898+ hevc_rps.used_by_curr_pic_s1_flag[0] = 0;
899+ if(slice_param->num_ref_idx_l0_active_minus1==0 )
900+ {
901+ hevc_rps.delta_poc_s0_minus1[0] = (slice_param->slice_type==SLICE_TYPE_I) ? 0 : ( curPicOrderCnt - slice_param->ref_pic_list0[0].pic_order_cnt-1); //0;
902+ hevc_rps.used_by_curr_pic_s0_flag[0] = 1;
903+ }
904+ if(slice_param->num_ref_idx_l1_active_minus1==0 )
905+ {
906+ hevc_rps.delta_poc_s1_minus1[0] = (slice_param->slice_type==SLICE_TYPE_I) ? 0 : ( slice_param->ref_pic_list1[0].pic_order_cnt -curPicOrderCnt -1);
907+ hevc_rps.used_by_curr_pic_s1_flag[0] = 1;
908+ }
909+
910+ if (rps_idx)
911+ avc_bitstream_put_ui(bs, hevc_rps.inter_ref_pic_set_prediction_flag, 1);
912+
913+ if (hevc_rps.inter_ref_pic_set_prediction_flag)
914+ {
915+ /* not support */
916+ /* to do */
917+ } else {
918+ avc_bitstream_put_ue(bs, hevc_rps.num_negative_pics);
919+ avc_bitstream_put_ue(bs, hevc_rps.num_positive_pics);
920+
921+ for (i = 0; i < hevc_rps.num_negative_pics; i++)
922+ {
923+ avc_bitstream_put_ue(bs, hevc_rps.delta_poc_s0_minus1[ref_idx]);
924+ avc_bitstream_put_ui(bs, hevc_rps.used_by_curr_pic_s0_flag[ref_idx], 1);
925+ }
926+ for (i = 0; i < hevc_rps.num_positive_pics; i++)
927+ {
928+ avc_bitstream_put_ue(bs, hevc_rps.delta_poc_s1_minus1[ref_idx]);
929+ avc_bitstream_put_ui(bs, hevc_rps.used_by_curr_pic_s1_flag[ref_idx], 1);
930+ }
931+ }
932+
933+ return;
934+}
935+
936+static void slice_rbsp(avc_bitstream *bs,
937+ int slice_index,
938+ VAEncSequenceParameterBufferHEVC *seq_param,
939+ VAEncPictureParameterBufferHEVC *pic_param,
940+ VAEncSliceParameterBufferHEVC *slice_param)
941+{
942+ int log2_cu_size = seq_param->log2_min_luma_coding_block_size_minus3 + 3;
943+ int log2_ctb_size = seq_param->log2_diff_max_min_luma_coding_block_size + log2_cu_size;
944+ int ctb_size = 1 << log2_ctb_size;
945+
946+ int picture_width_in_ctb = (seq_param->pic_width_in_luma_samples + ctb_size - 1) / ctb_size;
947+ int picture_height_in_ctb = (seq_param->pic_height_in_luma_samples + ctb_size - 1) / ctb_size;
948+
949+ /* first_slice_segment_in_pic_flag */
950+ if (slice_index == 0)
951+ {
952+ avc_bitstream_put_ui(bs, 1, 1);
953+ }
954+ else
955+ {
956+ avc_bitstream_put_ui(bs, 0, 1);
957+ }
958+
959+ /* no_output_of_prior_pics_flag. This doesn't exist on TRAIL_N */
960+
961+ /* slice_pic_parameter_set_id */
962+ avc_bitstream_put_ue(bs, 0);
963+
964+ /* not the first slice */
965+ if (slice_index)
966+ {
967+ /* TBD */
968+ int bit_size;
969+
970+ float num_ctus;
971+
972+ num_ctus = picture_width_in_ctb * picture_height_in_ctb;
973+ bit_size = ceilf(log2f(num_ctus));
974+
975+ if (pic_param->pic_fields.bits.dependent_slice_segments_enabled_flag)
976+ {
977+ avc_bitstream_put_ui(bs,
978+ slice_param->slice_fields.bits.dependent_slice_segment_flag, 1);
979+ }
980+ /* slice_segment_address is based on Ceil(log2(PictureSizeinCtbs)) */
981+ avc_bitstream_put_ui(bs, slice_param->slice_segment_address, bit_size);
982+ }
983+ if (!slice_param->slice_fields.bits.dependent_slice_segment_flag)
984+ {
985+ /* slice_reserved_flag */
986+
987+ /* slice_type */
988+ avc_bitstream_put_ue(bs, slice_param->slice_type);
989+ /* use the inferred the value of pic_output_flag */
990+
991+ /* colour_plane_id */
992+ if (seq_param->seq_fields.bits.separate_colour_plane_flag)
993+ {
994+ avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.colour_plane_id, 1);
995+ }
996+
997+ if (!pic_param->pic_fields.bits.idr_pic_flag)
998+ {
999+ int Log2MaxPicOrderCntLsb = 8;
1000+ avc_bitstream_put_ui(bs, pic_param->decoded_curr_pic.pic_order_cnt, Log2MaxPicOrderCntLsb);
1001+
1002+ //if (!slice_param->short_term_ref_pic_set_sps_flag)
1003+ {
1004+ /* short_term_ref_pic_set_sps_flag.
1005+ * Use zero and then pass the RPS from slice_header
1006+ */
1007+ avc_bitstream_put_ui(bs, 0, 1);
1008+ /* TBD
1009+ * Add the short_term reference picture set
1010+ */
1011+ hevc_short_term_ref_pic_set(bs,slice_param,pic_param->decoded_curr_pic.pic_order_cnt);
1012+ }
1013+ /* long term reference present flag. unpresent */
1014+ /* TBD */
1015+
1016+ /* sps temporal MVP*/
1017+ if (seq_param->seq_fields.bits.sps_temporal_mvp_enabled_flag)
1018+ {
1019+ avc_bitstream_put_ui(bs,
1020+ slice_param->slice_fields.bits.slice_temporal_mvp_enabled_flag, 1);
1021+ }
1022+ }
1023+
1024+ /* long term reference present flag. unpresent */
1025+ if (seq_param->seq_fields.bits.sps_temporal_mvp_enabled_flag)
1026+ {
1027+ avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.slice_temporal_mvp_enabled_flag, 1);
1028+ }
1029+ /* sample adaptive offset enabled flag */
1030+ if (seq_param->seq_fields.bits.sample_adaptive_offset_enabled_flag)
1031+ {
1032+ avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.slice_sao_luma_flag, 1);
1033+ avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.slice_sao_chroma_flag, 1);
1034+ }
1035+
1036+ if (slice_param->slice_type != SLICE_TYPE_I)
1037+ {
1038+ /* num_ref_idx_active_override_flag. 0 */
1039+ avc_bitstream_put_ui(bs, 0, 1);
1040+ /* lists_modification_flag is unpresent NumPocTotalCurr > 1 ,here it is 1*/
1041+
1042+ /* No reference picture set modification */
1043+
1044+ /* MVD_l1_zero_flag */
1045+ if (slice_param->slice_type == SLICE_TYPE_B)
1046+ avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.mvd_l1_zero_flag, 1);
1047+
1048+ /* cabac_init_present_flag. 0 */
1049+
1050+ /* slice_temporal_mvp_enabled_flag. */
1051+ if (slice_param->slice_fields.bits.slice_temporal_mvp_enabled_flag)
1052+ {
1053+ /*
1054+ * TBD: Add the collocated_l0_ref_flag and
1055+ * collocated_ref_idx.
1056+ */
1057+ }
1058+ if (((pic_param->pic_fields.bits.weighted_pred_flag) &&
1059+ (slice_param->slice_type == SLICE_TYPE_P)) ||
1060+ ((pic_param->pic_fields.bits.weighted_bipred_flag) &&
1061+ (slice_param->slice_type == SLICE_TYPE_B)))
1062+ {
1063+ /* TBD:
1064+ * add the weighted table
1065+ */
1066+ }
1067+ avc_bitstream_put_ue(bs, slice_param->max_num_merge_cand);
1068+ }
1069+ /* slice_qp_delta */
1070+ avc_bitstream_put_ue(bs, slice_param->slice_qp_delta);
1071+
1072+ /* slice_cb/cr_qp_offset is controlled by pps_slice_chroma_qp_offsets_present_flag
1073+ * The present flag is set to 1.
1074+ */
1075+ avc_bitstream_put_ue(bs, slice_param->slice_cb_qp_offset);
1076+ avc_bitstream_put_ue(bs, slice_param->slice_cr_qp_offset);
1077+
1078+ /*
1079+ * deblocking_filter_override_flag is controlled by
1080+ * deblocking_filter_override_enabled_flag.
1081+ * The override_enabled_flag is zero.
1082+ * deblocking_filter_override_flag is zero. then
1083+ * slice_deblocking_filter_disabled_flag is also zero
1084+ * (It is inferred to be equal to pps_deblocking_filter_disabled_flag.
1085+ */
1086+
1087+ /* slice_loop_filter_across_slices_enabled_flag is controlled
1088+ * by pps_loop_filter_across_slices_enabled_flag &&
1089+ * (slice_sao_luma_flag | | slice_sao_chroma_flag | |
1090+ * !slice_deblocking_filter_disabled_flag ))
1091+ *
1092+ */
1093+ }
1094+
1095+ if (pic_param->pic_fields.bits.tiles_enabled_flag ||
1096+ pic_param->pic_fields.bits.entropy_coding_sync_enabled_flag)
1097+ {
1098+ /* TBD.
1099+ * Add the Entry-points && tile definition.
1100+ */
1101+ }
1102+
1103+ /* slice_segment_header_extension_present_flag. Not present */
1104+
1105+ /* byte_alignment */
1106+ avc_rbsp_trailing_bits(bs);
1107+}
1108+
1109+int build_hevc_slice_header(VAEncSequenceParameterBufferHEVC *seq_param,
1110+ VAEncPictureParameterBufferHEVC *pic_param,
1111+ VAEncSliceParameterBufferHEVC *slice_param,
1112+ unsigned char **header_buffer,
1113+ int slice_index)
1114+{
1115+ avc_bitstream bs;
1116+
1117+ avc_bitstream_start(&bs);
1118+ nal_start_code_prefix(&bs);
1119+ nal_header_hevc(&bs, SLICE_TRAIL_N_NUT, 0);
1120+ slice_rbsp(&bs, slice_index, seq_param,pic_param,slice_param);
1121+ avc_bitstream_end(&bs);
1122+
1123+ *header_buffer = (unsigned char *)bs.buffer;
1124+ return bs.bit_offset;
1125+}
--- a/src/i965_encoder_utils.h
+++ b/src/i965_encoder_utils.h
@@ -33,4 +33,33 @@ build_mpeg2_slice_header(VAEncSequenceParameterBufferMPEG2 *sps_param,
3333 VAEncSliceParameterBufferMPEG2 *slice_param,
3434 unsigned char **slice_header_buffer);
3535
36+/* HEVC */
37+
38+int
39+build_hevc_slice_header(VAEncSequenceParameterBufferHEVC *seq_param,
40+ VAEncPictureParameterBufferHEVC *pic_param,
41+ VAEncSliceParameterBufferHEVC *slice_param,
42+ unsigned char **header_buffer,
43+ int slice_index);
44+int
45+build_hevc_sei_buffering_period(int cpb_removal_length,
46+ unsigned int init_cpb_removal_delay,
47+ unsigned int init_cpb_removal_delay_offset,
48+ unsigned char **sei_buffer);
49+
50+int
51+build_hevc_sei_pic_timing(unsigned int cpb_removal_length, unsigned int cpb_removal_delay,
52+ unsigned int dpb_output_length, unsigned int dpb_output_delay,
53+ unsigned char **sei_buffer);
54+
55+int
56+build_hevc_idr_sei_buffer_timing(unsigned int init_cpb_removal_delay_length,
57+ unsigned int init_cpb_removal_delay,
58+ unsigned int init_cpb_removal_delay_offset,
59+ unsigned int cpb_removal_length,
60+ unsigned int cpb_removal_delay,
61+ unsigned int dpb_output_length,
62+ unsigned int dpb_output_delay,
63+ unsigned char **sei_buffer);
64+
3665 #endif /* __I965_ENCODER_UTILS_H__ */