Commit: b9eccc1dff00d671d111e4edf3834da799bba959 - exorsim6801 (git)

Motorola M6800 (6800) Exorciser / SWTPC emulator plus 6801 instruction set emulation

Commit MetaInfo

• Revision: b9eccc1dff00d671d111e4edf3834da799bba959 (tree)
• Time: 2020-11-16 00:16:42
• Author: Joel Matthew Rees <joel.rees@gmai...>
• Commiter: Joel Matthew Rees

Log Message

unasm now has 6801 stuff and is lightly tested, adding test code to
repository,
fig-forth model for 6801 progressing well?

Change Summary

• add: 6801test.68c
• modified: fig-forth6801_exorsim.68c
• add: tests.fs
• modified: unasm6800.c

Incremental Difference

--- /dev/null
+++ b/6801test.68c
@@ -0,0 +1,118 @@
+	OPT PRT
+	OPT 6801
+
+	ORG $80
+N	RMB 4
+DPTBL	RMB 4
+
+	ORG $A0
+USTARS	TSX		dodge return address
+	LDD	2,X	multiplier
+	STD	N
+	LDD	4,X	multiplicand
+	STD	N+2
+	LDA B	N	multiplier high
+	MUL
+	STD	2,X	result high cell
+	LDA B	N+1	multiplier low
+	LDA A	N+3	multiplicand low
+	MUL
+	STD	4,X	result low cell
+	LDA B	N+1	multiplier low
+	LDA A	N+2	multiplicand high
+	MUL		inner 1
+	ADDD	3,X
+	STD	3,X
+	BCC	USTAS2
+	INC	2,X
+USTAS2	LDA B	N	multiplier high
+	LDA A	N+3	multiplicand low
+	MUL		inner 2
+	ADDD	3,X
+	STD	3,X
+	BCC	USTASD
+	INC	2,X
+USTASD	RTS	
+
+
+STKSZ	EQU $80
+GLOBALSZ	EQU $10
+
+
+	ORG $220
+	FCC "help me, I think I'm falling into the sea."
+	FCC "wouldn't want to go there by myself, that's such a lonely place to be."
+
+	ORG $340
+	FCB 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
+
+
+
+	ORG $7800
+GLOBAL	RMB GLOBALSZ
+
+	ORG $8000
+RAMBAR	EQU *
+
+	ORG $100
+START	LDS #RAMBAR-STKSZ
+	LDX #$188
+	PSHX
+	LDAB #167
+	ABX
+	NOP
+	LDD 3,X
+	BRN START
+	LDD #$1234
+	ADDD #$FEDC
+	SUBD #$FEDC
+	LDAA #10
+	LDAB #25
+	MUL
+	PSHB
+	PSHA
+	LDD #1001
+	PSHB
+	PSHA
+	JSR USTARS
+	TSX
+	LDD 0,X
+	LSRD
+	STD 0,X
+	ROR 2,X
+	ROR 3,X
+	LDD 2,X
+	ASLD
+	ROL 1,X
+	ROL 0,X
+	STD 2,X
+	SUBD 0,X
+	LDX 4,X
+	LDAB #$F8
+	ABX
+	LDAB #96
+	ABX
+	LDAA $11,X
+	INX
+	INX
+	INX
+	INX
+	INX
+	CMPA 12,X
+	BNE STOP
+	NOP
+	CPX #$345
+	INS
+	INS
+	INS
+	INS
+	PULX
+	CPX #$345
+	BCC START
+	NOP
+	NOP
+STOP	WAIT
+
+
+
+	ORG START

--- a/fig-forth6801_exorsim.68c
+++ b/fig-forth6801_exorsim.68c
@@ -648,25 +648,22 @@ DIGIT2	CLR B
 *    "
 *    "
 *
+PD	EQU	N	ptr to dict word being checked
+PA0	EQU	N+2
+PA	EQU	N+4
+PC	EQU	N+6
+*
 * ======>>  11  <<
 	FCB	$86
 	FCC	5,(FIND)
 	FCB	$A9
 	FDB	DIGIT-8
 PFIND	FDB	*+2
-	NOP
-	NOP
-PD	EQU	N	ptr to dict word being checked
-PA0	EQU	N+2
-PA	EQU	N+4
-PC	EQU	N+6
-	LDX	#PD
-	LDA B	#4
-PFIND0	PUL A		loop to get arguments
-	STA A	0,X
-	INX
-	DEC B
-	BNE	PFIND0
+	TSX
+	LDD	0,X
+	STD	PD
+	LDD	2,X
+	STD	PA0
 *
 	LDX	PD
 PFIND1	LDA B	0,X	get count dict count
@@ -698,9 +695,12 @@ PFIND3	LDX	0,X	get new link
 *
 *	not found :
 *
+	INS
+	INS
+	TSX
 	CLR A
 	CLR B
-	JMP	PUSHBA
+	JMP	STABX
 PFIND8	CBA
 	BEQ	PFIND2
 PFIND4	LDX	PD
@@ -711,22 +711,13 @@ PFIND9	LDA B	0,X	scan forward to end of this name
 *
 *	found :
 *
-FOUND	LDA A	PD	compute CFA
-	LDA B	PD+1
-	ADD B	#4
-	ADC A	#0
-	PSH B
-	PSH A
-	LDA A	PC
-	PSH A
-	CLR A
-	PSH A
-	LDA B	#1
-	JMP	PUSHBA
-*
-	PSH A
+FOUND	TSX
+	LDD	PD	compute CFA
+	ADDD	#4
+	STD	2,X
+	LDA B	PC
 	CLR A
-	PSH A
+	STD	0,X
 	LDA B	#1
 	JMP	PUSHBA
 *
@@ -745,7 +736,7 @@ ENCLOS	FDB	*+2
 	PUL B		now, get the low byte, for an 8-bit delimiter
 	TSX
 	LDX	0,X
-	CLR	N
+	CLR	N	Buffer must be less than 256 bytes!
 *	wait for a non-delimiter or a NUL
 ENCL2	LDA A	0,X
 	BEQ	ENCL6
@@ -801,7 +792,7 @@ ENCL8	LDA B	N	save NC
 	FCB	$D4
 	FDB	ENCLOS-10
 EMIT	FDB	*+2
-	PUL A
+	INS
 	PUL A
 	JSR	PEMIT
 	LDX	UP
@@ -847,20 +838,20 @@ CR	FDB	*+2
 	FCC	4,CMOVE	source, destination, count
 	FCB	$C5
 	FDB	CR-5
-CMOVE	FDB	*+2	takes ( 43+47*count cycles )
-	LDX	#N
+CMOVE	FDB	*+2	takes ( ?? count cycles )
+	TSX		move parameters to scratch area
+	LDD	0,X
+	STD	N
+	LDD	2,X
+	STD	N+2
+	LDD	4,X
+	STD	N+4
 	LDA B	#6
-CMOV1	PUL A
-	STA A	0,X	move parameters to scratch area
-	INX
-	DEC B
-	BNE	CMOV1
-CMOV2	LDA A	N
-	LDA B	N+1
-	SUB B	#1
-	SBC A	#0
-	STA A	N
-	STA B	N+1
+	ABX
+	TXS
+CMOV2	LDD	N
+	SUBD	#1
+	STD	N
 	BCS	CMOV3
 	LDX	N+4
 	LDA A	0,X
@@ -880,33 +871,33 @@ CMOV3	JMP	NEXT
 	FCB	$AA
 	FDB	CMOVE-8
 USTAR	FDB	*+2
-	BSR	USTARS
-	INS
-	INS
-	JMP	PUSHBA
-*
-* The following is a subroutine which 
-* multiplies top 2 words on stack,
-* leaving 32-bit result:  high order word in A,B
-* low order word in 2nd word of stack.
-*
-USTARS	LDA A	#16	bits/word counter
-	PSH A
-	CLR A
-	CLR B
 	TSX
-USTAR2	ROR	5,X	shift multiplier
-	ROR	6,X
-	DEC	0,X	done?
-	BMI	USTAR4
-	BCC	USTAR3
-	ADD B	4,X
-	ADC A	3,X
-USTAR3	ROR A
-	ROR B		shift result
-	BRA	USTAR2
-USTAR4	INS		dump counter
-	RTS
+	LDAA 	1,X	least
+	LDAB 	3,X
+	MUL
+	STD 	N+2
+	LDAA 	0,X 	most
+	LDAB 	2,X
+	MUL
+	STD 	N
+	LDD 	1,X 	inner
+	MUL
+	ADDD 	N+1
+	BCC 	USTAR1
+	INC 	N
+USTAR1	STD 	N+1
+	LDAA 	0,X	inner
+	LDAB 	3,X
+	MUL
+	ADDD 	N+1
+	BCC 	USTAR2
+	INC 	N
+USTAR2
+	STD 	N+1
+	LDD	N+2
+	STD	2,X
+	LDD 	N
+	JMP	STABX
 *
 * ######>> screen 24 <<
 * ======>>  19  <<
@@ -918,32 +909,32 @@ USLASH	FDB	*+2
 	LDA A	#17
 	PSH A
 	TSX
-	LDA A	3,X
-	LDA B	4,X
-USL1	CMP A	1,X
-	BHI	USL3
-	BCS	USL2
-	CMP B	2,X
-	BCC	USL3
-USL2	CLC
-	BRA	USL4
-USL3	SUB B	2,X
-	SBC A	1,X
-	SEC
-USL4	ROL	6,X
-	ROL	5,X
+	LDD	3,X	dividend high cell
+USLASL	SUBD	1,X	try divisor against current frame
+	BCC	USLASR
+	ADDD	1,X	restore
+	CLC	Catch potential boundary cases I don't want to think about.
+	BRA	USLASN
+USLASR	SEC	result bit
+USLASN	ROL	6,X	shift result in behind
+	ROL	5,X	shift frame right
 	DEC	0,X
-	BEQ	USL5
-	ROL B
+	BEQ	USLASD
+	ROL B		remainder/current frame
 	ROL A
-	BCC	USL1
-	BRA	USL3
-USL5	INS
+	BCC	USLASL	Trying to pull it into range this way only works
+	SUBD	1,X	if it only has to work once, AIUI.
+	BRA	USLASR
+USLASD
+	STD	1,X	temporary
+	LDD	5,X	quotient
+	STD	3,X	top
+	LDD	1,X
+	STD	5,X	remainder at 2nd
+	INS		SP needs adjusting.
 	INS
 	INS
-	INS
-	INS
-	JMP	SWAP+4	reverse quotient & remainder
+	JMP	NEXT
 *
 * ######>> screen 25 <<
 * ======>>  20  <<
@@ -957,7 +948,7 @@ AND	FDB	*+2
 	TSX
 	AND B	1,X
 	AND A	0,X
-	JMP	STABX
+	JMP	STABX	(Uses D, gets a little speed-up.)
 *
 * ======>>  21  <<
 	FCB	$82
@@ -993,9 +984,8 @@ XOR	FDB	*+2
 	FDB	XOR-6
 SPAT	FDB	*+2
 	TSX
-	STX	N	scratch area
-	LDX	#N
-	JMP	GETX
+	PSHX
+	JMP	NEXT
 *
 * ======>>  24  <<
 	FCB	$83
@@ -1006,7 +996,8 @@ SPSTOR	FDB	*+2
 	LDX	UP
 	LDX	XSPZER-UORIG,X
 	TXS		watch it ! X and S are not equal.
-	JMP	NEXT
+	JMP	NEXT	(Not that it matters here.)
+*
 * ======>>  25  <<
 	FCB	$83
 	FCC	2,RP!
@@ -1038,10 +1029,8 @@ SEMIS	FDB	*+2
 	FDB	SEMIS-5
 LEAVE	FDB	*+2
 	LDX	RP
-	LDA A	2,X
-	LDA B	3,X
-	STA A	4,X
-	STA B	5,X
+	LDD	2,X
+	STD	4,X
 	JMP	NEXT
 *
 * ======>>  28  <<
@@ -1056,8 +1045,7 @@ TOR	FDB	*+2
 	STX	RP
 	PUL A
 	PUL B
-	STA A	2,X
-	STA B	3,X
+	STD	2,X
 	JMP	NEXT
 *
 * ======>>  29  <<
@@ -1067,8 +1055,7 @@ TOR	FDB	*+2
 	FDB	TOR-5
 FROMR	FDB	*+2
 	LDX	RP
-	LDA A	2,X
-	LDA B	3,X
+	LDD	2,X
 	INX
 	INX
 	STX	RP
@@ -1078,11 +1065,7 @@ FROMR	FDB	*+2
 	FCB	$81	R
 	FCB	$D2
 	FDB	FROMR-5
-R	FDB	*+2
-	LDX	RP
-	INX
-	INX
-	JMP	GETX
+R	FDB	I+2
 *
 * ######>> screen 28 <<
 * ======>>  31  <<
@@ -1092,12 +1075,9 @@ R	FDB	*+2
 	FDB	R-4
 ZEQU	FDB	*+2
 	TSX
-	CLR A
-	CLR B
-	LDX	0,X
-	BNE	ZEQU2
-	INC B
-ZEQU2	TSX
+	LDD	0,X
+	BNE	ZLESSF	Steal code.
+ZEQUT	LDD	#1	Make it stealable.
 	JMP	STABX
 *
 * ======>>  32  <<
@@ -1107,13 +1087,10 @@ ZEQU2	TSX
 	FDB	ZEQU-5
 ZLESS	FDB	*+2
 	TSX
-	LDA A	#$80	check the sign bit
-	AND A	0,X
-	BEQ	ZLESS2
-	CLR A		if neg.
-	LDA B #1
-	JMP	STABX
-ZLESS2	CLR B
+	LDD	0,X
+	BMI	ZEQUT
+ZLESSF	CLR A
+	CLR B
 	JMP	STABX
 *
 * ######>> screen 29 <<
@@ -1122,11 +1099,10 @@ ZLESS2	CLR B
 	FCB	$AB
 	FDB	ZLESS-5
 PLUS	FDB	*+2
-	PUL A
+	PUL A		commutative
 	PUL B
 	TSX
-	ADD B	1,X
-	ADC A	0,X
+	ADDD	0,X
 	JMP	STABX
 *
 * ======>>  34  <<
@@ -1136,14 +1112,13 @@ PLUS	FDB	*+2
 	FDB	PLUS-4
 DPLUS	FDB	*+2
 	TSX
-	CLC
-	LDA B	#4
-DPLUS2	LDA A	3,X
-	ADC A	7,X
-	STA A	7,X
-	DEX
-	DEC B
-	BNE	DPLUS2
+	LDD	6,X
+	ADDD	2,X
+	STD	6,X
+	LDD	4,X
+	ADC B	1,X
+	ADC A	0,X
+	STD	4,X
 	INS
 	INS
 	INS
@@ -1157,12 +1132,10 @@ DPLUS2	LDA A	3,X
 	FDB	DPLUS-5
 MINUS	FDB	*+2
 	TSX
-	NEG	1,X
-	BCC	MINUS2
-	NEG	0,X
-	BRA	MINUS3
-MINUS2	COM	0,X
-MINUS3	JMP	NEXT
+	CLR B
+	CLR A
+	SUB D	0,X
+	JMP	STABX
 *
 * ======>>  36  <<
 	FCB	$86
@@ -1171,17 +1144,14 @@ MINUS3	JMP	NEXT
 	FDB	MINUS-8
 DMINUS	FDB	*+2
 	TSX
-	COM	0,X
-	COM	1,X
-	COM	2,X
-	NEG	3,X
-	BNE	DMINX
-	INC	2,X
-	BNE	DMINX
-	INC	1,X
-	BNE	DMINX
-	INC	0,X
-DMINX	JMP	NEXT
+	CLR B
+	CLR A
+	SUB D	2,X
+	STD	2,X
+	LDD	#0
+	SBC B	1,X
+	SBC A	0,X
+	JMP	STABX
 *
 * ######>> screen 30 <<
 * ======>>  37  <<
@@ -1191,8 +1161,7 @@ DMINX	JMP	NEXT
 	FDB	DMINUS-9
 OVER	FDB	*+2
 	TSX
-	LDA A	2,X
-	LDA B	3,X
+	LDD	2,X
 	JMP	PUSHBA
 *
 * ======>>  38  <<
@@ -1201,8 +1170,7 @@ OVER	FDB	*+2
 	FCB	$D0
 	FDB	OVER-7
 DROP	FDB	*+2
-	INS
-	INS
+	PULX
 	JMP	NEXT
 *
 * ======>>  39  <<
@@ -1211,17 +1179,30 @@ DROP	FDB	*+2
 	FCB	$D0
 	FDB	DROP-7
 SWAP	FDB	*+2
-	PUL A
-	PUL B
-	TSX
-	LDX	0,X
-	INS
-	INS
-	PSH B
-	PSH A
-	STX	N
-	LDX	#N
-	JMP	GETX
+	PULX
+	PULA
+	PULB
+	PSHX
+	PSHB
+	PSHA
+	JMP NEXT
+*	TSX
+*	LDD	2,X
+*	STD	N
+*	LDD	0,X
+*	STD	2,X
+*	LDD	N
+*	JMP	STABX	
+*
+*	LDA A	0,X
+*	LDA B	2,X
+*	STA B	0,X
+*	STA A	2,X
+*	LDA A	1,X
+*	LDA B	3,X
+*	STA B	1,X
+*	STA A	3,X
+*	JMP	NEXT
 *
 * ======>>  40  <<
 	FCB	$83
@@ -1229,11 +1210,13 @@ SWAP	FDB	*+2
 	FCB	$D0
 	FDB	SWAP-7
 DUP	FDB	*+2
-	PUL A
-	PUL B
-	PSH B
-	PSH A
-	JMP PUSHBA
+	PULX
+	PSHX
+	PSHX
+	JMP NEXT
+*	TSX
+*	LDD	0,X
+*	JMP	PUSHBA
 *
 * ######>> screen 31 <<
 * ======>>  41  <<
@@ -1242,16 +1225,11 @@ DUP	FDB	*+2
 	FCB	$A1
 	FDB	DUP-6
 PSTORE	FDB	*+2
-	TSX
-	LDX	0,X
-	INS
-	INS
+	PULX
 	PUL A		get stack data
 	PUL B
-	ADD B	1,X	add & store low byte
-	STA B	1,X
-	ADC A	0,X	add & store hi byte
-	STA A	0,X
+	ADDD	0,X
+	STD	0,X
 	JMP	NEXT
 *
 * ======>>  42  <<
@@ -1268,10 +1246,7 @@ TOGGLE	FDB	DOCOL,OVER,CAT,XOR,SWAP,CSTORE
 	FCB	$C0
 	FDB	TOGGLE-9
 AT	FDB	*+2
-	TSX
-	LDX	0,X	get address
-	INS
-	INS
+	PULX
 	JMP	GETX
 *
 * ======>>  44  <<
@@ -1280,12 +1255,9 @@ AT	FDB	*+2
 	FCB	$C0
 	FDB	AT-4
 CAT	FDB	*+2
-	TSX
-	LDX	0,X
+	PULX
 	CLR A
 	LDA B	0,X
-	INS
-	INS
 	JMP	PUSHBA
 *
 * ======>>  45  <<
@@ -1293,10 +1265,7 @@ CAT	FDB	*+2
 	FCB	$A1
 	FDB	CAT-5
 STORE	FDB	*+2
-	TSX
-	LDX	0,X	get address
-	INS
-	INS
+	PULX	get address
 	JMP	PULABX
 *
 * ======>>  46  <<
@@ -1305,6 +1274,7 @@ STORE	FDB	*+2
 	FCB	$A1
 	FDB	STORE-4
 CSTORE	FDB	*+2
+
 	TSX
 	LDX	0,X	get address
 	INS
@@ -1313,6 +1283,7 @@ CSTORE	FDB	*+2
 	PUL B
 	STA B	0,X
 	JMP	NEXT
+*
 	PAGE
 *
 * ######>> screen 33 <<
@@ -2619,11 +2590,10 @@ STOD	FDB	DOCOL,DUP,ZLESS,MINUS
 	FCB	$81	; *
 	FCB	$AA
 	FDB	STOD-7
-STAR	FDB	*+2
-	JSR	USTARS
-	INS
-	INS
-	JMP	NEXT
+STAR	FDB	DOCOL
+	FDB	USTAR
+	FDB	DROP
+	FDB	SEMIS
 *
 * ======>>  160  <<
 	FCB	$84

--- /dev/null
+++ b/tests.fs
@@ -0,0 +1,47 @@
+: STAR 42 EMIT ;
+: STARS 0 DO STAR LOOP ;
+
+40 STARS
+
+: TEST 0 DO I . I EMIT CR LOOP ;
+: TEST2 0 DO I . I EMIT CR 4 +LOOP ;
+: TESTDOWN 256 DO I . I EMIT CR -4 +LOOP ;
+
+HEX
+8000. 8000 U/ . . ( 1 0 )
+8000. 8001 U/ . . ( 0 -8000 )
+
+SP@ . 
+SP! SP@ .
+
+4545.4545 3423.3423 D+ D. ( 79687968 )
+4545.5656 3423.DCDC D+ D. ( 79693332 )
+7FFF.FFFF 1. D+ D. ( -80000000 )
+
+SP@ .
+
+8001 MINUS .
+8000 MINUS .
+
+7FFF.FFFF DMINUS D.
+8000.0001 DMINUS D.
+8000.0000 DMINUS D.
+
+SP@ .
+
+45AA 10 OVER . . .
+
+SP@ .
+
+45AA 10 SWAP . .
+
+SP@ .
+
+1 VARIABLE ALPHA
+
+ALPHA 1+ F0 TOGGLE ALPHA @ .
+
+
+
+
+

--- a/unasm6800.c
+++ b/unasm6800.c
@@ -20,6 +20,7 @@
 #include <stdlib.h>
 #include <string.h>
 
+#include "exorsim.h"	/* JMR20201103 */
 #include "unasm6800.h"
 #include "utils.h"	/* JMR20201103 */
 
@@ -266,7 +267,11 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 	sprintf(buf + strlen(buf), "%2.2X ", opcode = mem[pc++]);
 
 	if (opcode & 0x80) {
+#ifdef SIM6801
+		if ( ((opcode & 0x0F) < 0x0C) && ((opcode & 0x0F) != 0x03) ) {
+#else
 		if ((opcode & 0x0F) < 0x0C) {
+#endif /* def SIM6801 */
 			/* Get operand A */
 			if (opcode & 0x40) {
 				sprintf(operand, "B");
@@ -316,10 +321,19 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				} case 0x02: /* SBC N,Z,V,C (no H?) */ {
 					insn = "SBC";
 					break;
-				} case 0x03: /* ??? */ {
+				}
+#ifdef SIM6801
+				  case 0x03: /* ACCMD should never get here at run time. */ {
+					insn = "";
+					break;
+				}
+#else
+				  case 0x03: /* ??? */ {
 					insn = "???";
 					break;
-				} case 0x04: /* AND N,Z,V=0 */ {
+				}
+#endif /* ndef SIM6801 */
+				  case 0x04: /* AND N,Z,V=0 */ {
 					insn = "AND";
 					break;
 				} case 0x05: /* BIT N,Z,V=0*/ {
@@ -375,7 +389,13 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				}
 			}
 			switch (opcode) {
-				case 0x8C: case 0x9C: case 0xAC: case 0xBC: /* CPX N,Z,V */ {
+#ifdef SIM6801
+				  case 0x83: case 0x93: case 0xA3: case 0xB3: /* SUBD N,Z,V,C (6801) */ {
+					insn = "SUBD";
+					break;
+				}
+#endif /* def SIM6801 */
+				  case 0x8C: case 0x9C: case 0xAC: case 0xBC: /* CPX N,Z,V */ {
 					insn = "CPX";
 					break;
 				} case 0x8D: /* BSR REL */ {
@@ -390,12 +410,29 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				} case 0x8F: case 0x9F: case 0xAF: case 0xBF: /* STS N,Z,V */ {
 					insn = "STS";
 					break;
-				} case 0xAD: case 0xBD: /* JSR */ {
+				}
+#ifdef SIM6801
+				  case 0x9D:	/* (6801) */
+#endif /* def SIM6801 */
+				  case 0xAD: case 0xBD: /* JSR */ {
 					branch_target = (mem[pc - 2] << 8) + mem[pc - 1];
 					is_jsr = 1;
 					insn = "JSR";
 					break;
-				} case 0xCE: case 0xDE: case 0xEE: case 0xFE: /* LDX N,Z,V */ {
+				}
+#ifdef SIM6801
+				  case 0xC3: case 0xD3: case 0xE3: case 0xF3: /* ADDD N,Z,V,C (6801) */ {
+					insn = "ADDD";
+					break;
+				} case 0xCC: case 0xDC: case 0xEC: case 0xFC: /* LDD N,Z,V=0 (6801) */ {
+					insn = "LDD";
+					break;
+				} case 0xCD: case 0xDD: case 0xED: case 0xFD: /* STD N,Z,V=0 (6801) */ {
+					insn = "STD";
+					break;
+				}
+#endif /* def SIM6801 */
+				  case 0xCE: case 0xDE: case 0xEE: case 0xFE: /* LDX N,Z,V */ {
 					insn = "LDX";
 					break;
 				} case 0xCF: case 0xDF: case 0xEF: case 0xFF: /* STX N,Z,V */ {
@@ -483,7 +520,17 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 			case 0x01: /* NOP */ { /* Do nothing */
 				insn = "NOP";
 				break;
-			} case 0x06: /* TAP (all flags) */ {
+			}
+#ifdef SIM6801
+ 			  case 0x04: /* LSRD N=0,Z,V,C (6801) */ {
+				insn = "LSRD";
+				break;
+			} case 0x05: /* LSLD N,Z,V,C (6801) */ {
+				insn = "LSLD";
+				break;
+			}
+#endif /* def SIM6801 */
+			  case 0x06: /* TAP (all flags) */ {
 				insn = "TAP";
 				break;
 			} case 0x07: /* TPA */ {
@@ -538,7 +585,18 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				sprintf(operand + strlen(operand), " $%4.4X", branch_target);
 				insn = "BRA";
 				break;
-			} case 0x22: /* BHI */ {
+			}
+#ifdef SIM6801
+			  case 0x21: /* BRN (6801) */ {
+				offset = mem[pc++];
+				sprintf(buf + strlen(buf), "%2.2X ", mem[pc - 1]);
+				branch_target = pc + offset;
+				sprintf(operand + strlen(operand), " $%4.4X", branch_target);
+				insn = "BRN";
+				break;
+			}
+#endif /* def SIM6801 */
+			  case 0x22: /* BHI */ {
 				offset = mem[pc++];
 				sprintf(buf + strlen(buf), "%2.2X ", mem[pc - 1]);
 				branch_target = pc + offset;
@@ -660,13 +718,37 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 			} case 0x37: /* PSHB */ {
 				insn = "PSHB";
 				break;
-			} case 0x39: /* RTS */ {
+			}
+#ifdef SIM6801
+			  case 0x38: /* PULX (6801) */ {
+				insn = "PULX";
+				break;
+			}
+#endif /* def SIM6801 */
+			  case 0x39: /* RTS */ {
 				insn = "RTS";
 				break;
-			} case 0x3B: /* RTI */ {
+			}
+#ifdef SIM6801
+ 			  case 0x3A: /* ABX (6801) */ {
+				insn = "ABX";
+				break;
+			}
+#endif /* def SIM6801 */
+			  case 0x3B: /* RTI */ {
 				insn = "RTI";
 				break;
-			} case 0x3E: /* WAI */ {
+			}
+#ifdef SIM6801
+			  case 0x3C: /* PSHX (6801) */ {
+				insn = "PSHX";
+				break;
+			} case 0x3D: /* MUL C=accb bit 7 (6801) */ {
+				insn = "MUL";
+				break;
+			}
+#endif /* def SIM6801 */
+			  case 0x3E: /* WAI */ {
 				insn = "WAI";
 				break;
 			} case 0x3F: /* SWI */ {