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Revision288aaacf2de5507f33c0bb26eb063f2f69033dd6 (tree)
Time2014-02-07 22:14:32
AuthorAlexey Brodkin <Alexey.Brodkin@syno...>
CommiterTom Rini

Log Message

arc: add architecture header files

These are header files used by ARC700 architecture.

Also note that "arch-arc700/hardware.h" is only required for compilation of
"designware_i2c" driver which refers to "asm/arch/hardware.h".
It would be good to fix mentioned driver sometime soon but it will cause
changes in ARM board configs that use "designware_i2c".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>

Change Summary

Incremental Difference

--- /dev/null
+++ b/arch/arc/include/asm/arch-arc700/hardware.h
@@ -0,0 +1,10 @@
1+/*
2+ * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+/*
8+ * This file is only required to allow compilation of "designware_i2c" driver.
9+ * Which explicitly includes <asm/arch/hardware.h>.
10+ */
--- /dev/null
+++ b/arch/arc/include/asm/arcregs.h
@@ -0,0 +1,55 @@
1+/*
2+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef _ASM_ARC_ARCREGS_H
8+#define _ASM_ARC_ARCREGS_H
9+
10+/*
11+ * ARC architecture has additional address space - auxiliary registers.
12+ * These registers are mostly used for configuration purposes.
13+ * These registers are not memory mapped and special commands are used for
14+ * access: "lr"/"sr".
15+ */
16+
17+#define ARC_AUX_IDENTITY 0x04
18+#define ARC_AUX_STATUS32 0x0a
19+
20+/* Instruction cache related auxiliary registers */
21+#define ARC_AUX_IC_IVIC 0x10
22+#define ARC_AUX_IC_CTRL 0x11
23+#define ARC_AUX_IC_IVIL 0x19
24+#if (CONFIG_ARC_MMU_VER > 2)
25+#define ARC_AUX_IC_PTAG 0x1E
26+#endif
27+
28+/* Timer related auxiliary registers */
29+#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
30+#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
31+#define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
32+
33+#define ARC_AUX_INTR_VEC_BASE 0x25
34+
35+/* Data cache related auxiliary registers */
36+#define ARC_AUX_DC_IVDC 0x47
37+#define ARC_AUX_DC_CTRL 0x48
38+
39+#define ARC_AUX_DC_IVDL 0x4A
40+#define ARC_AUX_DC_FLSH 0x4B
41+#define ARC_AUX_DC_FLDL 0x4C
42+#if (CONFIG_ARC_MMU_VER > 2)
43+#define ARC_AUX_DC_PTAG 0x5C
44+#endif
45+
46+#ifndef __ASSEMBLY__
47+/* Accessors for auxiliary registers */
48+#define read_aux_reg(reg) __builtin_arc_lr(reg)
49+
50+/* gcc builtin sr needs reg param to be long immediate */
51+#define write_aux_reg(reg_immed, val) \
52+ __builtin_arc_sr((unsigned int)val, reg_immed)
53+#endif /* __ASSEMBLY__ */
54+
55+#endif /* _ASM_ARC_ARCREGS_H */
--- /dev/null
+++ b/arch/arc/include/asm/bitops.h
@@ -0,0 +1,19 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_BITOPS_H
8+#define __ASM_ARC_BITOPS_H
9+
10+/*
11+ * hweightN: returns the hamming weight (i.e. the number
12+ * of bits set) of a N-bit word
13+ */
14+
15+#define hweight32(x) generic_hweight32(x)
16+#define hweight16(x) generic_hweight16(x)
17+#define hweight8(x) generic_hweight8(x)
18+
19+#endif /* __ASM_ARC_BITOPS_H */
--- /dev/null
+++ b/arch/arc/include/asm/byteorder.h
@@ -0,0 +1,23 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_BYTEORDER_H
8+#define __ASM_ARC_BYTEORDER_H
9+
10+#include <asm/types.h>
11+
12+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
13+ #define __BYTEORDER_HAS_U64__
14+ #define __SWAB_64_THRU_32__
15+#endif
16+
17+#ifdef __LITTLE_ENDIAN__
18+ #include <linux/byteorder/little_endian.h>
19+#else
20+ #include <linux/byteorder/big_endian.h>
21+#endif /* CONFIG_SYS_BIG_ENDIAN */
22+
23+#endif /* ASM_ARC_BYTEORDER_H */
--- /dev/null
+++ b/arch/arc/include/asm/cache.h
@@ -0,0 +1,23 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_CACHE_H
8+#define __ASM_ARC_CACHE_H
9+
10+#include <config.h>
11+
12+/*
13+ * The current upper bound for ARC L1 data cache line sizes is 128 bytes.
14+ * We use that value for aligning DMA buffers unless the board config has
15+ * specified an alternate cache line size.
16+ */
17+#ifdef CONFIG_SYS_CACHELINE_SIZE
18+#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
19+#else
20+#define ARCH_DMA_MINALIGN 128
21+#endif
22+
23+#endif /* __ASM_ARC_CACHE_H */
--- /dev/null
+++ b/arch/arc/include/asm/config.h
@@ -0,0 +1,12 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_CONFIG_H_
8+#define __ASM_ARC_CONFIG_H_
9+
10+#define CONFIG_LMB
11+
12+#endif /*__ASM_ARC_CONFIG_H_ */
--- /dev/null
+++ b/arch/arc/include/asm/errno.h
@@ -0,0 +1 @@
1+#include <asm-generic/errno.h>
--- /dev/null
+++ b/arch/arc/include/asm/global_data.h
@@ -0,0 +1,19 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_GLOBAL_DATA_H
8+#define __ASM_ARC_GLOBAL_DATA_H
9+
10+/* Architecture-specific global data */
11+struct arch_global_data {
12+ int running_on_hw;
13+};
14+
15+#include <asm-generic/global_data.h>
16+
17+#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r25")
18+
19+#endif /* __ASM_ARC_GLOBAL_DATA_H */
--- /dev/null
+++ b/arch/arc/include/asm/io.h
@@ -0,0 +1,218 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_IO_H
8+#define __ASM_ARC_IO_H
9+
10+#include <linux/types.h>
11+#include <asm/byteorder.h>
12+
13+static inline void sync(void)
14+{
15+ /* Not yet implemented */
16+}
17+
18+static inline u8 __raw_readb(const volatile void __iomem *addr)
19+{
20+ u8 b;
21+
22+ __asm__ __volatile__("ldb%U1 %0, %1\n"
23+ : "=r" (b)
24+ : "m" (*(volatile u8 __force *)addr)
25+ : "memory");
26+ return b;
27+}
28+
29+static inline u16 __raw_readw(const volatile void __iomem *addr)
30+{
31+ u16 s;
32+
33+ __asm__ __volatile__("ldw%U1 %0, %1\n"
34+ : "=r" (s)
35+ : "m" (*(volatile u16 __force *)addr)
36+ : "memory");
37+ return s;
38+}
39+
40+static inline u32 __raw_readl(const volatile void __iomem *addr)
41+{
42+ u32 w;
43+
44+ __asm__ __volatile__("ld%U1 %0, %1\n"
45+ : "=r" (w)
46+ : "m" (*(volatile u32 __force *)addr)
47+ : "memory");
48+ return w;
49+}
50+
51+#define readb __raw_readb
52+
53+static inline u16 readw(const volatile void __iomem *addr)
54+{
55+ return __le16_to_cpu(__raw_readw(addr));
56+}
57+
58+static inline u32 readl(const volatile void __iomem *addr)
59+{
60+ return __le32_to_cpu(__raw_readl(addr));
61+}
62+
63+static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
64+{
65+ __asm__ __volatile__("stb%U1 %0, %1\n"
66+ :
67+ : "r" (b), "m" (*(volatile u8 __force *)addr)
68+ : "memory");
69+}
70+
71+static inline void __raw_writew(u16 s, volatile void __iomem *addr)
72+{
73+ __asm__ __volatile__("stw%U1 %0, %1\n"
74+ :
75+ : "r" (s), "m" (*(volatile u16 __force *)addr)
76+ : "memory");
77+}
78+
79+static inline void __raw_writel(u32 w, volatile void __iomem *addr)
80+{
81+ __asm__ __volatile__("st%U1 %0, %1\n"
82+ :
83+ : "r" (w), "m" (*(volatile u32 __force *)addr)
84+ : "memory");
85+}
86+
87+#define writeb __raw_writeb
88+#define writew(b, addr) __raw_writew(__cpu_to_le16(b), addr)
89+#define writel(b, addr) __raw_writel(__cpu_to_le32(b), addr)
90+
91+static inline int __raw_readsb(unsigned int addr, void *data, int bytelen)
92+{
93+ __asm__ __volatile__ ("1:ld.di r8, [r0]\n"
94+ "sub.f r2, r2, 1\n"
95+ "bnz.d 1b\n"
96+ "stb.ab r8, [r1, 1]\n"
97+ :
98+ : "r" (addr), "r" (data), "r" (bytelen)
99+ : "r8");
100+ return bytelen;
101+}
102+
103+static inline int __raw_readsw(unsigned int addr, void *data, int wordlen)
104+{
105+ __asm__ __volatile__ ("1:ld.di r8, [r0]\n"
106+ "sub.f r2, r2, 1\n"
107+ "bnz.d 1b\n"
108+ "stw.ab r8, [r1, 2]\n"
109+ :
110+ : "r" (addr), "r" (data), "r" (wordlen)
111+ : "r8");
112+ return wordlen;
113+}
114+
115+static inline int __raw_readsl(unsigned int addr, void *data, int longlen)
116+{
117+ __asm__ __volatile__ ("1:ld.di r8, [r0]\n"
118+ "sub.f r2, r2, 1\n"
119+ "bnz.d 1b\n"
120+ "st.ab r8, [r1, 4]\n"
121+ :
122+ : "r" (addr), "r" (data), "r" (longlen)
123+ : "r8");
124+ return longlen;
125+}
126+
127+static inline int __raw_writesb(unsigned int addr, void *data, int bytelen)
128+{
129+ __asm__ __volatile__ ("1:ldb.ab r8, [r1, 1]\n"
130+ "sub.f r2, r2, 1\n"
131+ "bnz.d 1b\n"
132+ "st.di r8, [r0, 0]\n"
133+ :
134+ : "r" (addr), "r" (data), "r" (bytelen)
135+ : "r8");
136+ return bytelen;
137+}
138+
139+static inline int __raw_writesw(unsigned int addr, void *data, int wordlen)
140+{
141+ __asm__ __volatile__ ("1:ldw.ab r8, [r1, 2]\n"
142+ "sub.f r2, r2, 1\n"
143+ "bnz.d 1b\n"
144+ "st.ab.di r8, [r0, 0]\n"
145+ :
146+ : "r" (addr), "r" (data), "r" (wordlen)
147+ : "r8");
148+ return wordlen;
149+}
150+
151+static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
152+{
153+ __asm__ __volatile__ ("1:ld.ab r8, [r1, 4]\n"
154+ "sub.f r2, r2, 1\n"
155+ "bnz.d 1b\n"
156+ "st.ab.di r8, [r0, 0]\n"
157+ :
158+ : "r" (addr), "r" (data), "r" (longlen)
159+ : "r8");
160+ return longlen;
161+}
162+
163+#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
164+#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
165+
166+#define out_le32(a, v) out_arch(l, le32, a, v)
167+#define out_le16(a, v) out_arch(w, le16, a, v)
168+
169+#define in_le32(a) in_arch(l, le32, a)
170+#define in_le16(a) in_arch(w, le16, a)
171+
172+#define out_be32(a, v) out_arch(l, be32, a, v)
173+#define out_be16(a, v) out_arch(w, be16, a, v)
174+
175+#define in_be32(a) in_arch(l, be32, a)
176+#define in_be16(a) in_arch(w, be16, a)
177+
178+#define out_8(a, v) __raw_writeb(v, a)
179+#define in_8(a) __raw_readb(a)
180+
181+/*
182+ * Clear and set bits in one shot. These macros can be used to clear and
183+ * set multiple bits in a register using a single call. These macros can
184+ * also be used to set a multiple-bit bit pattern using a mask, by
185+ * specifying the mask in the 'clear' parameter and the new bit pattern
186+ * in the 'set' parameter.
187+ */
188+
189+#define clrbits(type, addr, clear) \
190+ out_##type((addr), in_##type(addr) & ~(clear))
191+
192+#define setbits(type, addr, set) \
193+ out_##type((addr), in_##type(addr) | (set))
194+
195+#define clrsetbits(type, addr, clear, set) \
196+ out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
197+
198+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
199+#define setbits_be32(addr, set) setbits(be32, addr, set)
200+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
201+
202+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
203+#define setbits_le32(addr, set) setbits(le32, addr, set)
204+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
205+
206+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
207+#define setbits_be16(addr, set) setbits(be16, addr, set)
208+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
209+
210+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
211+#define setbits_le16(addr, set) setbits(le16, addr, set)
212+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
213+
214+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
215+#define setbits_8(addr, set) setbits(8, addr, set)
216+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
217+
218+#endif /* __ASM_ARC_IO_H */
--- /dev/null
+++ b/arch/arc/include/asm/posix_types.h
@@ -0,0 +1,39 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_POSIX_TYPES_H
8+#define __ASM_ARC_POSIX_TYPES_H
9+
10+typedef unsigned short __kernel_dev_t;
11+typedef unsigned long __kernel_ino_t;
12+typedef unsigned short __kernel_mode_t;
13+typedef unsigned short __kernel_nlink_t;
14+typedef long __kernel_off_t;
15+typedef int __kernel_pid_t;
16+typedef unsigned short __kernel_ipc_pid_t;
17+typedef unsigned short __kernel_uid_t;
18+typedef unsigned short __kernel_gid_t;
19+typedef unsigned int __kernel_size_t;
20+typedef int __kernel_ssize_t;
21+typedef int __kernel_ptrdiff_t;
22+typedef long __kernel_time_t;
23+typedef long __kernel_suseconds_t;
24+typedef long __kernel_clock_t;
25+typedef int __kernel_daddr_t;
26+typedef char *__kernel_caddr_t;
27+typedef unsigned short __kernel_uid16_t;
28+typedef unsigned short __kernel_gid16_t;
29+typedef unsigned int __kernel_uid32_t;
30+typedef unsigned int __kernel_gid32_t;
31+
32+typedef unsigned short __kernel_old_uid_t;
33+typedef unsigned short __kernel_old_gid_t;
34+
35+#ifdef __GNUC__
36+typedef long long __kernel_loff_t;
37+#endif
38+
39+#endif /* __ASM_ARC_POSIX_TYPES_H */
--- /dev/null
+++ b/arch/arc/include/asm/ptrace.h
@@ -0,0 +1,50 @@
1+/*
2+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_PTRACE_H
8+#define __ASM_ARC_PTRACE_H
9+
10+struct pt_regs {
11+ long bta;
12+ long lp_start;
13+ long lp_end;
14+ long lp_count;
15+ long status32;
16+ long ret;
17+ long blink;
18+ long fp;
19+ long r26; /* gp */
20+ long r25;
21+ long r24;
22+ long r23;
23+ long r22;
24+ long r21;
25+ long r20;
26+ long r19;
27+ long r18;
28+ long r17;
29+ long r16;
30+ long r15;
31+ long r14;
32+ long r13;
33+ long r12;
34+ long r11;
35+ long r10;
36+ long r9;
37+ long r8;
38+ long r7;
39+ long r6;
40+ long r5;
41+ long r4;
42+ long r3;
43+ long r2;
44+ long r1;
45+ long r0;
46+ long sp;
47+ long ecr;
48+};
49+
50+#endif /* __ASM_ARC_PTRACE_H */
--- /dev/null
+++ b/arch/arc/include/asm/sections.h
@@ -0,0 +1,14 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_SECTIONS_H
8+#define __ASM_ARC_SECTIONS_H
9+
10+#include <asm-generic/sections.h>
11+
12+extern ulong __text_end;
13+
14+#endif /* __ASM_ARC_SECTIONS_H */
--- /dev/null
+++ b/arch/arc/include/asm/string.h
@@ -0,0 +1,27 @@
1+/*
2+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_STRING_H
8+#define __ASM_ARC_STRING_H
9+
10+#define __HAVE_ARCH_MEMSET
11+#define __HAVE_ARCH_MEMCPY
12+#define __HAVE_ARCH_MEMCMP
13+#define __HAVE_ARCH_STRCHR
14+#define __HAVE_ARCH_STRCPY
15+#define __HAVE_ARCH_STRCMP
16+#define __HAVE_ARCH_STRLEN
17+
18+extern void *memset(void *ptr, int, __kernel_size_t);
19+extern void *memcpy(void *, const void *, __kernel_size_t);
20+extern void memzero(void *ptr, __kernel_size_t n);
21+extern int memcmp(const void *, const void *, __kernel_size_t);
22+extern char *strchr(const char *s, int c);
23+extern char *strcpy(char *dest, const char *src);
24+extern int strcmp(const char *cs, const char *ct);
25+extern __kernel_size_t strlen(const char *);
26+
27+#endif /* __ASM_ARC_STRING_H */
--- /dev/null
+++ b/arch/arc/include/asm/types.h
@@ -0,0 +1,55 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_TYPES_H
8+#define __ASM_ARC_TYPES_H
9+
10+typedef unsigned short umode_t;
11+
12+/*
13+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
14+ * header files exported to user space
15+ */
16+
17+typedef __signed__ char __s8;
18+typedef unsigned char __u8;
19+
20+typedef __signed__ short __s16;
21+typedef unsigned short __u16;
22+
23+typedef __signed__ int __s32;
24+typedef unsigned int __u32;
25+
26+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
27+typedef __signed__ long long __s64;
28+typedef unsigned long long __u64;
29+#endif
30+
31+/*
32+ * These aren't exported outside the kernel to avoid name space clashes
33+ */
34+typedef signed char s8;
35+typedef unsigned char u8;
36+
37+typedef signed short s16;
38+typedef unsigned short u16;
39+
40+typedef signed int s32;
41+typedef unsigned int u32;
42+
43+typedef signed long long s64;
44+typedef unsigned long long u64;
45+
46+#define BITS_PER_LONG 32
47+
48+/* Dma addresses are 32-bits wide. */
49+
50+typedef u32 dma_addr_t;
51+
52+typedef unsigned long phys_addr_t;
53+typedef unsigned long phys_size_t;
54+
55+#endif /* __ASM_ARC_TYPES_H */
--- /dev/null
+++ b/arch/arc/include/asm/u-boot-arc.h
@@ -0,0 +1,12 @@
1+/*
2+ * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_U_BOOT_ARC_H__
8+#define __ASM_ARC_U_BOOT_ARC_H__
9+
10+int arch_early_init_r(void);
11+
12+#endif /* __ASM_ARC_U_BOOT_ARC_H__ */
--- /dev/null
+++ b/arch/arc/include/asm/u-boot.h
@@ -0,0 +1,15 @@
1+/*
2+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3+ *
4+ * SPDX-License-Identifier: GPL-2.0+
5+ */
6+
7+#ifndef __ASM_ARC_U_BOOT_H__
8+#define __ASM_ARC_U_BOOT_H__
9+
10+#include <asm-generic/u-boot.h>
11+
12+/* For image.h:image_check_target_arch() */
13+#define IH_ARCH_DEFAULT IH_ARCH_ARC
14+
15+#endif /* __ASM_ARC_U_BOOT_H__ */
--- /dev/null
+++ b/arch/arc/include/asm/unaligned.h
@@ -0,0 +1 @@
1+#include <asm-generic/unaligned.h>