Commit: c405ad062b5a693a124950a30e2d25c87885bc10 - uboot (git)

Commit MetaInfo

• Revision: c405ad062b5a693a124950a30e2d25c87885bc10 (tree)
• Time: 2020-07-26 18:05:53
• Author: Yoshinori Sato <ysato@user...>
• Commiter: Yoshinori Sato

Log Message

ult62n update

Change Summary

• modified: arch/rx/dts/ult62n.dts
• modified: board/tokuden/ult62n/u-boot.lds
• modified: include/configs/ult62n.h

Incremental Difference

--- a/arch/rx/dts/ult62n.dts
+++ b/arch/rx/dts/ult62n.dts
@@ -14,36 +14,37 @@
 		ethernet0 = &eth0;
 		spi0 = &spi0;
 	};
-
 	xclk: oscillator {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		clock-frequency = <12000000>;
 		clock-output-names = "xtal";
 	};
-	iclk: iclk {
-		compatible = "renesas,rx-mul-clock";
+	pllclk: pllclk {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clock-mult = <8>;
 		clocks = <&xclk>;
+		clock-output-names = "pll";
+	};
+	pck: pck {
 		#clock-cells = <0>;
+		compatible = "renesas,rx62n-cpg";
+		clocks = <&pllclk>;
 		reg = <0x00080020 4>;
-		renesas,offset = <24>;
-		renesas,maxfreq = <100000000>;
+		clock-names = "fck";
 	};
-	pclk: pclk {
-		compatible = "renesas,rx-mul-clock";
-		clocks = <&xclk>;
+	bck: bck {
+		compatible = "renesas,rx62n-cpg";
+		clocks = <&pllclk>;
 		#clock-cells = <0>;
 		reg = <0x00080020 4>;
-		renesas,offset = <8>;
-		renesas,maxfreq = <50000000>;
 	};
-	bclk: bclk {
-		compatible = "renesas,rx-mul-clock";
-		clocks = <&xclk>;
+	ick: ick {
+		compatible = "renesas,rx62n-cpg";
+		clocks = <&pllclk>;
 		#clock-cells = <0>;
 		reg = <0x00080020 4>;
-		renesas,offset = <16>;
-		renesas,maxfreq = <50000000>;
 	};
 
 	cpus {
@@ -51,10 +52,11 @@
 		#size-cells = <0>;
 		cpu@0 {
 			compatible = "renesas,rx";
-			clock-frequency = <96000000>;
+			clocks = <&ick>;
 			mem-cycle = <2>;
 		};
 	};
+
 	memory@08000000 {
 		device_type = "memory";
 		reg = <0x08000000 0x01000000>;
@@ -70,21 +72,23 @@
 	mtu: timer@00088600 {
 		compatible = "renesas,rx-mtu2";
 		reg = <0x00088600 0x600>;
-		clock-frequency = <46875>;
+		clocks = <&pck>;
 	};
 		
 	sci0: serial@00088240 {
 		compatible = "renesas,sci";
 		reg = <0x00088240 8>;
 		interrupts = <214 0>, <215 0>, <216 0>, <217 0>;
-		clock = <48000000>;
+		clock-names = "fck", "pck";
+		clocks = <&pck>;
 	};
 
 	sci1: serial@00088248 {
 		compatible = "renesas,sci";
 		reg = <0x00088248 8>;
 		interrupts = <218 0>, <219 0>, <220 0>, <221 0>;
-		clock = <48000000>;
+		clock-names = "fck", "pck";
+		clocks = <&pck>;
 	};
 	eth0: ethernet@000c0000 {
 		compatible = "renesas,sh_eth";

--- a/board/tokuden/ult62n/u-boot.lds
+++ b/board/tokuden/ult62n/u-boot.lds
@@ -27,7 +27,7 @@ ENTRY(_start)
 
 MEMORY {
 	iram : ORIGIN = 0x0000100, LENGTH = 96K - 256
-	sdram : ORIGIN = 0x08ffc000, LENGTH = 16K
+	sdram : ORIGIN = 0x08ff0000, LENGTH = 64K
 	irom : ORIGIN = 0xfff80000, LENGTH = 512K - 128
 	vector : ORIGIN = 0xffffff80, LENGTH = 128
 }

--- a/include/configs/ult62n.h
+++ b/include/configs/ult62n.h
@@ -25,7 +25,6 @@
 #ifndef __ULT62N_H
 #define __ULT62N_H
 
-#define CONFIG_BAUDRATE		38400
 #define CONFIG_BOOTARGS		"console=ttySC0,38400"
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
@@ -35,7 +34,6 @@
 #define CONFIG_VERSION_VARIABLE
 #undef  CONFIG_SHOW_BOOT_PROGRESS
 
-#define CONFIG_ENV_SIZE 2048
 #define CONFIG_ENV_ADDR 0x100000
 
 /* SCI */
@@ -66,5 +64,6 @@
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CONFIG_SH_ETHER_USE_PORT 0
 #define CONFIG_SH_ETHER_PHY_ADDR 0
+#define CONFIG_BITBANGMII_MULTI
 
 #endif	/* __ULT62N */