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Revision0a5466d8d53bc8045ff56ff76cc1880aa85761c2 (tree)
Time2022-11-20 16:44:03
Authorustcymgu@gmail.com <ustcymgu@gmai...>
CommiterWaldemar Brodkorb

Log Message

RISC-V 32-bit support

Added 32-bit RISC-V support. I have managed to get 32-bit RISC-V No-MMU
Linux running based on mainstream buildroot. It's nice to have uclibc
support this 32-bit No-MMU target.

There's no substantial code change except definations and config
options.

Signed-off-by: Yimin Gu <ustcymgu@gmail.com>

Change Summary

Incremental Difference

--- a/Rules.mak
+++ b/Rules.mak
@@ -296,6 +296,7 @@ ifneq ($(TARGET_ARCH),c6x)
296296 ifneq ($(TARGET_ARCH),h8300)
297297 ifneq ($(TARGET_ARCH),arc)
298298 ifneq ($(TARGET_ARCH),aarch64)
299+ifneq ($(TARGET_ARCH),riscv32)
299300 CPU_CFLAGS-y += -msoft-float
300301 endif
301302 endif
@@ -307,6 +308,7 @@ endif
307308 endif
308309 endif
309310 endif
311+endif
310312
311313 ifeq ($(TARGET_ARCH),aarch64)
312314 CPU_CFLAGS-y += -ftls-model=initial-exec
--- a/extra/Configs/Config.in
+++ b/extra/Configs/Config.in
@@ -39,6 +39,7 @@ choice
3939 default TARGET_or1k if DESIRED_TARGET_ARCH = "or1k"
4040 default TARGET_powerpc if DESIRED_TARGET_ARCH = "powerpc"
4141 default TARGET_riscv64 if DESIRED_TARGET_ARCH = "riscv64"
42+ default TARGET_riscv32 if DESIRED_TARGET_ARCH = "riscv32"
4243 default TARGET_sh if DESIRED_TARGET_ARCH = "sh"
4344 default TARGET_sparc if DESIRED_TARGET_ARCH = "sparc"
4445 default TARGET_sparc64 if DESIRED_TARGET_ARCH = "sparc64"
@@ -125,6 +126,9 @@ config TARGET_powerpc
125126 config TARGET_riscv64
126127 bool "riscv64"
127128
129+config TARGET_riscv32
130+ bool "riscv32"
131+
128132 config TARGET_sh
129133 bool "superh"
130134
@@ -260,6 +264,10 @@ if TARGET_riscv64
260264 source "extra/Configs/Config.riscv64"
261265 endif
262266
267+if TARGET_riscv32
268+source "extra/Configs/Config.riscv32"
269+endif
270+
263271 if TARGET_sh
264272 source "extra/Configs/Config.sh"
265273 endif
@@ -565,6 +573,7 @@ config UCLIBC_HAS_LINUXTHREADS
565573 select UCLIBC_HAS_REALTIME
566574 depends on !TARGET_aarch64 && \
567575 !TARGET_riscv64 && \
576+ !TARGET_riscv32 && \
568577 !TARGET_metag
569578 help
570579 If you want to compile uClibc with Linuxthreads support, then answer Y.
--- /dev/null
+++ b/extra/Configs/Config.riscv32
@@ -0,0 +1,14 @@
1+#
2+# For a description of the syntax of this configuration file,
3+# see extra/config/Kconfig-language.txt
4+#
5+
6+config TARGET_ARCH
7+ string
8+ default "riscv32"
9+
10+config FORCE_OPTIONS_FOR_ARCH
11+ bool
12+ default y
13+ select ARCH_LITTLE_ENDIAN
14+ select ARCH_HAS_MMU
--- /dev/null
+++ b/libc/sysdeps/linux/riscv32
@@ -0,0 +1 @@
1+riscv64
\ No newline at end of file
--- a/libc/sysdeps/linux/riscv64/bits/wordsize.h
+++ b/libc/sysdeps/linux/riscv64/bits/wordsize.h
@@ -25,5 +25,6 @@
2525 #if __riscv_xlen == 64
2626 # define __WORDSIZE_TIME64_COMPAT32 1
2727 #else
28-# error "rv32i-based targets are not supported"
28+# define __WORDSIZE_TIME64_COMPAT32 1
29+// # warning "rv32i-based targets are experimental"
2930 #endif
--- a/libc/sysdeps/linux/riscv64/sys/asm.h
+++ b/libc/sysdeps/linux/riscv64/sys/asm.h
@@ -26,7 +26,11 @@
2626 # define REG_S sd
2727 # define REG_L ld
2828 #elif __riscv_xlen == 32
29-# error "rv32i-based targets are not supported"
29+# define PTRLOG 2
30+# define SZREG 4
31+# define REG_S sw
32+# define REG_L lw
33+// # warning "rv32i-based targets are experimental"
3034 #else
3135 # error __riscv_xlen must equal 32 or 64
3236 #endif