Revision | 0a5466d8d53bc8045ff56ff76cc1880aa85761c2 (tree) |
---|---|
Time | 2022-11-20 16:44:03 |
Author | ustcymgu@gmail.com <ustcymgu@gmai...> |
Commiter | Waldemar Brodkorb |
RISC-V 32-bit support
Added 32-bit RISC-V support. I have managed to get 32-bit RISC-V No-MMU
Linux running based on mainstream buildroot. It's nice to have uclibc
support this 32-bit No-MMU target.
There's no substantial code change except definations and config
options.
Signed-off-by: Yimin Gu <ustcymgu@gmail.com>
@@ -296,6 +296,7 @@ ifneq ($(TARGET_ARCH),c6x) | ||
296 | 296 | ifneq ($(TARGET_ARCH),h8300) |
297 | 297 | ifneq ($(TARGET_ARCH),arc) |
298 | 298 | ifneq ($(TARGET_ARCH),aarch64) |
299 | +ifneq ($(TARGET_ARCH),riscv32) | |
299 | 300 | CPU_CFLAGS-y += -msoft-float |
300 | 301 | endif |
301 | 302 | endif |
@@ -307,6 +308,7 @@ endif | ||
307 | 308 | endif |
308 | 309 | endif |
309 | 310 | endif |
311 | +endif | |
310 | 312 | |
311 | 313 | ifeq ($(TARGET_ARCH),aarch64) |
312 | 314 | CPU_CFLAGS-y += -ftls-model=initial-exec |
@@ -39,6 +39,7 @@ choice | ||
39 | 39 | default TARGET_or1k if DESIRED_TARGET_ARCH = "or1k" |
40 | 40 | default TARGET_powerpc if DESIRED_TARGET_ARCH = "powerpc" |
41 | 41 | default TARGET_riscv64 if DESIRED_TARGET_ARCH = "riscv64" |
42 | + default TARGET_riscv32 if DESIRED_TARGET_ARCH = "riscv32" | |
42 | 43 | default TARGET_sh if DESIRED_TARGET_ARCH = "sh" |
43 | 44 | default TARGET_sparc if DESIRED_TARGET_ARCH = "sparc" |
44 | 45 | default TARGET_sparc64 if DESIRED_TARGET_ARCH = "sparc64" |
@@ -125,6 +126,9 @@ config TARGET_powerpc | ||
125 | 126 | config TARGET_riscv64 |
126 | 127 | bool "riscv64" |
127 | 128 | |
129 | +config TARGET_riscv32 | |
130 | + bool "riscv32" | |
131 | + | |
128 | 132 | config TARGET_sh |
129 | 133 | bool "superh" |
130 | 134 |
@@ -260,6 +264,10 @@ if TARGET_riscv64 | ||
260 | 264 | source "extra/Configs/Config.riscv64" |
261 | 265 | endif |
262 | 266 | |
267 | +if TARGET_riscv32 | |
268 | +source "extra/Configs/Config.riscv32" | |
269 | +endif | |
270 | + | |
263 | 271 | if TARGET_sh |
264 | 272 | source "extra/Configs/Config.sh" |
265 | 273 | endif |
@@ -565,6 +573,7 @@ config UCLIBC_HAS_LINUXTHREADS | ||
565 | 573 | select UCLIBC_HAS_REALTIME |
566 | 574 | depends on !TARGET_aarch64 && \ |
567 | 575 | !TARGET_riscv64 && \ |
576 | + !TARGET_riscv32 && \ | |
568 | 577 | !TARGET_metag |
569 | 578 | help |
570 | 579 | If you want to compile uClibc with Linuxthreads support, then answer Y. |
@@ -0,0 +1,14 @@ | ||
1 | +# | |
2 | +# For a description of the syntax of this configuration file, | |
3 | +# see extra/config/Kconfig-language.txt | |
4 | +# | |
5 | + | |
6 | +config TARGET_ARCH | |
7 | + string | |
8 | + default "riscv32" | |
9 | + | |
10 | +config FORCE_OPTIONS_FOR_ARCH | |
11 | + bool | |
12 | + default y | |
13 | + select ARCH_LITTLE_ENDIAN | |
14 | + select ARCH_HAS_MMU |
@@ -0,0 +1 @@ | ||
1 | +riscv64 | |
\ No newline at end of file |
@@ -25,5 +25,6 @@ | ||
25 | 25 | #if __riscv_xlen == 64 |
26 | 26 | # define __WORDSIZE_TIME64_COMPAT32 1 |
27 | 27 | #else |
28 | -# error "rv32i-based targets are not supported" | |
28 | +# define __WORDSIZE_TIME64_COMPAT32 1 | |
29 | +// # warning "rv32i-based targets are experimental" | |
29 | 30 | #endif |
@@ -26,7 +26,11 @@ | ||
26 | 26 | # define REG_S sd |
27 | 27 | # define REG_L ld |
28 | 28 | #elif __riscv_xlen == 32 |
29 | -# error "rv32i-based targets are not supported" | |
29 | +# define PTRLOG 2 | |
30 | +# define SZREG 4 | |
31 | +# define REG_S sw | |
32 | +# define REG_L lw | |
33 | +// # warning "rv32i-based targets are experimental" | |
30 | 34 | #else |
31 | 35 | # error __riscv_xlen must equal 32 or 64 |
32 | 36 | #endif |