Commit: 59f3ed335f43973a07314214acc90f05997e2847 - jmr6805break (git)

およそ20年前に、68HC05 の開発の練習に書いた車のブレイクライト・方向指示器コントローラです。

Commit MetaInfo

• Revision: 59f3ed335f43973a07314214acc90f05997e2847 (tree)
• Time: 2013-07-08 22:08:18
• Author: Joel Matthew Rees <reiisi@user...>
• Commiter: Joel Matthew Rees

Log Message

iCleaning up the flasher code,
discussion of potential problems using this in a real car.

Change Summary

• delete: TURNSIG.AS6 => TURNSIG.ASM

Incremental Difference

--- a/TURNSIG.AS6
+++ b/TURNSIG.ASM
@@ -52,7 +52,25 @@
 * applications), and details of lamp driver circuits are mostly set
 * aside.  The logic has been tested with the M68HC705KICS simulator
 * program, but has not been tested in a physical mock up or real
-* vehicle.
+* vehicle.  (I ran out of time for this project.)
+
+******* Potential problems: ******************************************
+
+* I have not dealt with the problems that occur when the turn signals
+* are turned on while the return sensors are within range of their
+* actuator fields.  Two more bits of port B would have allowed complete
+* separation of the two functions.  A little extra code might allow
+* suppressing the turn signal inputs while both return switches are
+* active, to reduce the operator frustration factor.
+
+* I have also mostly ignored the problems presented by shorted switches.
+* Having the turn signal functions on port B is handy, because a week
+* turn signal spring will not keep the circuit from staying in the STOP
+* instruction.  Another 50 bytes of ROM might have allowed tracking time
+* of no change for every sensor, which could allow shutting out a
+* sensor that has been active more than n minutes.
+
+**********************************************************************
 
 *       One of the intents of this design was to replace mechanical
 * parts (that tend to flow in hot climates and become brittle in cold)
@@ -273,6 +291,8 @@ NGN_SW  equ B2          ; engine (ENG and EMG could be confusing)
 NGN_SW_ equ B2_
 DRVDRV  equ B1
 DRVDRV_ equ B1_
+EMG_BTF equ DRVDRV      ; where to fold EMG_BT
+EMG_BTF_        equ DRVDRV_
 CAN_BT  equ B0
 CAN_BT_ equ B0_
 * PORTB
@@ -280,7 +300,7 @@ LFT_BT  equ B1  ; a handy data dependency! DO NOT CHANGE
 LFT_BT_ equ B1_
 RGT_BT  equ B0  ; another handy data dependency!
 RGT_BT_ equ B0_
-* EMG_BT  equ IRQ inverted
+* IRQ input (inverted) is the real EMG_BT
 
 
 * logical input definitions for debounce and states
@@ -303,17 +323,26 @@ F_CAN_  equ {CAN_BT_ + 2}
 F_OPC   equ $40                 ; opposite direction cancel record
 F_MNC   equ $80                 ; manual cancel record
 
+*       The turn signal table and many of the turn signal routines
+* depend on F_LFT and F_RGT and LFT_BT and RGT_BT being in bits one and
+* zero (but not particular which is which!).  If these are changed,
+* there will be a domino effect on the rest of the code.
+
         SUBHEADER 'Resource Definitions'
         PAGE
 
 
 XTAL    equ 1   ; crystal frequency, in MHz
-RTIPOW  equ 1   ; bits 1 & 0 for timer hardware
+RTIPOW  equ 0
+*       1   ; bits 1 & 0 for timer hardware
 RTIRATE equ {2 < RTIPOW}        ; 2 ^ RTIPOW
-TIMOUT  equ {9155*XTAL/RTIRATE+1}       ; 5 minutes (if XTAL equ is correct)
+TIMOUT  equ 1
+*       {9155*XTAL/RTIRATE+1}       ; 5 minutes (if XTAL equ is correct)
 * only one flash rate, 2/3 duty cycle
-FLASH0  equ {32*XTAL/RTIRATE/4}         ; about 1/4 second off time
-FLASH1  equ {32*XTAL/RTIRATE/2}         ; about 1/2 second on time
+FLASH0  equ 1
+*       {32*XTAL/RTIRATE/4}         ; about 1/4 second off time
+FLASH1  equ 1
+*       {32*XTAL/RTIRATE/2}         ; about 1/2 second on time
 
         org MOR
 * Software Pulldown is used.
@@ -337,6 +366,9 @@ FLASH   rmb 1   ; flash timer
 FLDARK  rmb 1   ; flash light or dark state, 11111111 == dark
 FLMASK  rmb 1   ; flash mask to communicate between BRK, EMG, and TRN
 TMPTRN  rmb 1   ; temporary for keep turn signal interpretation
+LASTST  rmb 1   ; previous state record to separate timer from decode
+        rmb 4
+DBGCT   rmb 4   ; count how many times TIMSRV has executed
 
 
 * ROM definitions follow:
@@ -430,12 +462,17 @@ TIMSRV  bset TOFR_,TSCR
         lda DEBO
         sta DEBO+1
 
+* record previous STATE
+        lda STATES
+        sta LASTST
+
 * read the static inputs, converting physical to logical
         lda PORTA
         and #{BRK_SW | NGN_SW | CAN_BT}         ; clears DRV_DRV
         bih TMIEMG      ; invert EMG and fold it in
-        ora #F_EMG
-TMIEMG  lsla    ; remap
+        ora #EMG_BTF    ; keep temporally very close to first read
+TMIEMG  equ *
+        lsla    ; remap
         lsla
         sta DEBO
         lda PORTB       ; PB2-7 always read 0
@@ -460,14 +497,17 @@ $CYCLE_ADDER_ON
         eor #{LFT_BT | RGT_BT}  ; strobe other side
         sta PORTB       ; set output state first
         sta DDRB        ; handy (data dependent) output state, huh?
-        brset F_CAN_,PORTA,TMTBIT6      ; F_CAN into carry
+        brset CAN_BT_,PORTA,TMTBIT6     ; CAN_BT_ into carry
 TMTBIT6 rora    ; carry into bit 7
         clr DDRB        ; kill strobe: manual cancel?
-        brset F_CAN_,PORTA,TMTBIT7      ; F_CAN into carry again
+        brset CAN_BT_,PORTA,TMTBIT7     ; CAN_BT_ into carry again
 TMTBIT7 rora    ; carry into bit 7 again
         and #{F_OPC | F_MNC}
         ora DEBO
-        sta DEBO
+        bit #F_OPC      ; ignore turn signals if opposition cancel
+        beq TMTNTN
+        and #{$FF ^ TURNSIG}
+TMTNTN  sta DEBO
         stx PORTB       ; restore turn signal inputs
         stx DDRB
 TM0TURN equ *
@@ -527,11 +567,13 @@ TMF1CAN equ *
 TMF0BRK equ *
 
 * toggle STATES F_EMG if TOGGLE F_EMG
+* act on TOGGLE to avoid multiple reads of EMG button
         brclr F_EMG_,TOGGLE,TMF0EMG
         lda STATES
         eor #F_EMG
         sta STATES      ; STATES not yet valid!
-TMF0EMG bra TMSTRN      ; skip over the turn signal states table
+TMF0EMG equ *
+        bra TMSTRN      ; skip over the turn signal states table
 * leaves A indeterminate
 
         swi     ; since we have a few unused ROM locations
@@ -540,6 +582,7 @@ TMF0EMG bra TMSTRN      ; skip over the turn signal states table
         swi
         swi
 
+* this table is very data dependent
 TURNSTATE       equ *   ; depends on turn signals being rightmost
 *            S'                   S  I
         fcb %00                 ; 00 00
@@ -566,7 +609,7 @@ TURNSTATE       equ *   ; depends on turn signals being rightmost
 * Darn!
 * After careful consideration, I decided this table does not benefit
 * from a more symbolic construction.  As it stands, it does not matter
-* whether F_LFT or F_RGT is b0, only that both reside in B0 and B1.
+* whether F_LFT or F_RGT is b0, only that they do reside in B0 and B1.
 
         swi     ; since we have a few unused ROM locations
         swi
@@ -594,7 +637,7 @@ TMSTRN  lda STATES
 * leaves A == STATES
 
 * cancel STATES turn signal if TOGGLE F_CAN is not filtered out
-* Act here on TOGGLE to avoid multiple reads of single actuator pass!
+* Act on TOGGLE to avoid multiple reads of single actuator pass!
 * A == STATES on entry
         brclr F_CAN_,TOGGLE,TMCAN0
         and #{$FF ^ TURNSIG}
@@ -604,11 +647,18 @@ TMCAN0  equ *           ; turn signals are valid
 
 * Now we should have no more than one turn signal on.
 * set up steering wheel return sense state or clear it
+* then latch turn signal input to keep it from reverting
 * A == STATES on entry
         and #TURNSIG
         sta PORTB       ; another handy value dependency!
         sta DDRB        ; gate it out, if there
-* A is trashed
+* I feel there is a better way, but I'm out of time
+        sta TMPTRN      ; feed response back
+        lda ISTATE
+        and #{$FF ^ TURNSIG}
+        ora TMPTRN
+        sta ISTATE
+* leaves A == ISTATE
 
 * if not timed out, STATES F_NGN should not yet be clear!
         lda NGN_TIM+1
@@ -623,9 +673,8 @@ TMFNGN0 equ *
         SUBHEADER 'Timer Service Code -- Engine Time Out and Flasher Timers'
         PAGE
 
-TMCLOCK
 * reset engine time-out if F_NGN, F_EMG, or F_BRK TOGGLEs
-        lda TOGGLE
+TMCLOCK lda TOGGLE
         and #{F_NGN | F_EMG | F_BRK}
         beq TMORST
         lda #{TIMOUT & $FF }    ; reset value low byte
@@ -634,10 +683,28 @@ TMCLOCK
         sta NGN_TIM
 TMORST  equ *
 
+* if flashers TOGGLE off, reset the flashers
+* if they TOGGLE on, clear the mask only if none on before
+        lda #{F_EMG | TURNSIG}
+        bit TOGGLE
+        beq TMSCLK
+        bit STATES      ; flasher active?
+        bne TMMFLH
+        lda #$FF        ; reset flash timer
+        sta FLDARK
+        lda #FLASH1
+        sta FLASH
+        bra TMSCLK
+
+TMMFLH  bit LASTST      ; flashers already running?
+        bne TMMFLH0     ; might be better to shine on every change?
+        clr FLDARK
+TMMFLH0 equ *
+
 *       Although the Real Time Interrupt is masked, the software clocks
 * clock on the RTI flag.  See RTIPOW for the RTI flag rate
 
-        brclr RTIF_,TSCR,TIMDUN
+TMSCLK  brclr RTIF_,TSCR,TIMDUN
         bset RTIFR_,TSCR
 
 *       Engine time-out counter only runs when the ISTATE F_NGN bit is
@@ -664,28 +731,32 @@ TMNGNR0 equ *   ; Only now is STATES valid!
 
 TMFLASH lda #{F_EMG | TURNSIG}
         bit STATES      ; flasher active?
-        bne TMFLH1
-        lda #$FF        ; reset flash timer
-        sta FLDARK
-        lda #FLASH1
-        sta FLASH
-        bra TMNFLH
-
-TMFLH1  dec FLASH
-        bne TMNFLH
+        beq TMFLH0
+        dec FLASH
+        bne TMFLH0
         lda #FLASH1
         com FLDARK
         bpl TMFLTM      ; result dark (1s) or light (0s)
         lda #FLASH0
 TMFLTM  sta FLASH
-TMNFLH  equ *
+TMFLH0  equ *
 
 *       It might be amusing to install a turn signal time out so that if
 * the turn signals remain flashing for more than ten minutes, they turn
 * themselves off.  The entire mechanism should fit here.  As mentioned
 * above, consider safety first!
 
-TIMDUN  rti
+TIMDUN
+        inc DBGCT+3     ; count number of timer interrupts serviced
+        bne TIMDUX      ; put here strictly for debugging sessions
+        inc DBGCT+2     ; so I can have an idea of virtual time
+        bne TIMDUX
+        inc DBGCT+1
+        bne TIMDUX
+        inc DBGCT
+TIMDUX
+        bset IRQR_,ISCR ; POTA and IRQ activity may set IRQF
+        rti
 $CYCLE_ADDER_OFF
 
         swi     ; more unused ROM
@@ -706,9 +777,15 @@ SWISRV
         ldx #$5C        ; unique
         stx COPR
         rsp     ; now falls through to RSTSRV
+        bset IRQR_,ISCR ; it just gets us started
 
 * general inits
-RSTSRV  lda #DRVLMPS
+RSTSRV
+* disable external interrupts
+        bclr IRQE_,ISCR ; disable external interrupts
+        bset IRQR_,ISCR ; clear the external interrupt flag
+* get ports stared right
+        lda #DRVLMPS
         sta PORTA       ; initial output values
         lda #{DRVLMPS | DRVDRV}
         sta DDRA        ; set up directions
@@ -717,18 +794,8 @@ RSTSRV  lda #DRVLMPS
         clr DDRB        ; B initially input
         clr PDRB        ; with pull downs set
 * make sure EPROM programming stuff is out of the way
-        clr EPROG       ; ICS05K complains, skip by hand
+*        clr EPROG       ; ICS05K complains, skip by hand
         clr PESCR
-* disable external interrupts
-        bclr IRQE_,ISCR
-        bset IRQR_,ISCR ; clear the flag
-* set up hardware timer
-        ldx #$6A        ; unique use of X
-        stx COPR        ; b0 clear, about to change timer rate
-        lda #{TOIE | RTIPOW}    ; only timer overflow interrupts
-        sta TSCR                ; RTIPOW has the timer rate
-        ora #{TOFR|RTIFR}       ; clear the flags
-        sta TSCR
 * set up specific variables
         lda #F_NGN      ; pretend the engine is on, to get us started
         sta DEBO        ; start debounce chain clear
@@ -743,6 +810,19 @@ RSTSRV  lda #DRVLMPS
         sta FLDARK      ; initial flash state is dark
         lda #FLASH1
         sta FLASH       ; initial flash time is on/light state
+* clear the virtual debugging time counter
+        clr DBGCT
+        clr DBGCT+1
+        clr DBGCT+2
+        clr DBGCT+3
+* set up hardware timer
+        ldx #$6A        ; unique use of X
+        stx COPR        ; b0 clear, about to change timer rate
+        lda #{RTIPOW}   ; set rate
+        sta TSCR
+        ora #{TOFR | RTIFR}     ; clear pending interrupts
+        sta TSCR
+        bset TOIE_,TSCR ; first section overflow interrupt only
 
 * Falls through to DOSTATES
 
@@ -830,18 +910,18 @@ STT0FLH equ *
 
 * go to power conserving state
 * first shut down all lamps
-        lda #DRVLMPS    ; DRVDRV also off!
-* should be     lda #{DRVLMPS & ~DRVDRV} for maximum clarity
-        sta PORTA
+        lda #DRVLMPS    ; DRVDRV, CAN_BT also off!
+* should be     lda #{DRVLMPS & ~DRVDRV & ~CAN_BT} for clarity
+        sta PORTA       ; don't feed CAN_BT to pull downs
 * now make sure power down state is valid!
-        lda #{DRVLMPS | DRVDRV}
-        sta DDRA        ; set up directions
+        lda #{DRVLMPS | DRVDRV | CAN_BT}
+        sta DDRA        ; interrupts only from NGN_SW, BRK_SW, EMG_BT
         sta PDRA        ; pull downs only on inputs
         clr PORTB       ; initial outputs (do port B just in case)
         clr DDRB        ; B initially input
         clr PDRB        ; with pull downs set
 * make sure EPROM programming stuff is out of the way
-        clr EPROG       ; ICS complains, skip by hand
+*        clr EPROG       ; ICS complains, skip by hand
         clr PESCR
 * enable external interrupts
         bset IRQE_,ISCR ; DO NOT clear the flag (don't miss anything)
@@ -850,12 +930,6 @@ STT0FLH equ *
         swi     ; more unused ROM
         swi
         swi
-        swi
-        swi
-        swi
-        swi
-        swi
-        swi
 
         SUBHEADER 'Interrupt Vectors'
         PAGE