binutils_os216

Fork

2016-09-26 Andre Vieira <andre.simoesdiasvieira@arm.com>

Backport from mainline
2016-02-16 Nick Clifton <nickc@redhat.com>

gas/
* doc/as.texinfo (Section): Fix up texinfo snafus in previous
update.

2016-09-26 Andre Vieira <andre.simoesdiasvieira@arm.com>

Backport from mainline
2016-02-15 Nick Clifton <nickc@redhat.com>

bfd/
* elf-bfd.h (struct bfd_elf_special_section): Use unsigned values
for length and type fields. Use a signed value for the
suffix_length field.

binutils/
* readelf.c (get_section_type_name): Add hex prefix to offsets
printed for LOPROC and LOOS values. Ensure that a result is
always returned for the V850 target, even when an unrecognised
processor specific value is encountered.
(process_section_headers): Display key values in the order in
which they appear to the user. Add the "C (compressed)" value to
the list.

gas/
* doc/as.texinfo (.section): Document that numeric values can now
be used for the flags and type fields of the ELF target's .section
directive. Add notes about the restrictions on setting flags and
types.
* config/obj-elf.c (obj_elf_change_section): Allow known sections
to be given processor specific section types. Allow processor and
application specific flags of a section to be set after
definition.
(obj_elf_parse_section_letters): Handle parsing numeric values.
(obj_elf_section_type): Handle parsing numeric values.
(obj_elf_section): Allow numeric type values.
* config/obj-elf.h (obj_elf_change_section): Update prototype.
* NEWS: Mention the new feature.

gas/testsuite/
* testsuite/gas/elf/section10.d: New test.
* testsuite/gas/elf/section10.s: Source file for new test.
* testsuite/gas/elf/elf.exp: Run the new test.
* testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
the description of the flags produced by readelf.
* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.

ld/testsuite/
* testsuite/ld-i386/pr12718.d: Remove dependency upon the
description of the flags produced by readelf.
* testsuite/ld-i386/pr12921.d: Likewise.
* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin.rd: Likewise.
* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbindesc.rd: Likewise.
* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
* testsuite/ld-i386/tlsdesc.rd: Likewise.
* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
* testsuite/ld-i386/tlsgdesc.rd: Likewise.
* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
* testsuite/ld-i386/tlsnopic.rd: Likewise.
* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic.rd: Likewise.
* testsuite/ld-s390/tlsbin.rd: Likewise.
* testsuite/ld-s390/tlsbin_64.rd: Likewise.
* testsuite/ld-s390/tlspic.rd: Likewise.
* testsuite/ld-s390/tlspic_64.rd: Likewise.
* testsuite/ld-sh/tlsbin-2.d: Likewise.
* testsuite/ld-sh/tlspic-2.d: Likewise.
* testsuite/ld-tic6x/common.d: Likewise.
* testsuite/ld-tic6x/shlib-1.rd: Likewise.
* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
* testsuite/ld-tic6x/static-app-1.rd: Likewise.
* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
* testsuite/ld-x86-64/ilp32-4.d: Likewise.
* testsuite/ld-x86-64/pr12718.d: Likewise.
* testsuite/ld-x86-64/pr12921.d: Likewise.
* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
* testsuite/ld-x86-64/split-by-file.rd: Likewise.
* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin.rd: Likewise.
* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic.rd: Likewise.
* testsuite/ld-xtensa/tlsbin.rd: Likewise.
* testsuite/ld-xtensa/tlspic.rd: Likewise.

Fix for PURECODE readelf backport

2016-09-26 Andre Vieira <andre.simoesdiasvieira@arm.com>

binutils/
* readelf.c (get_elf_section_flags): Fix readelf after purecode
backport.

Add support for PURECODE

2016-09-23 Andre Vieria <andre.simoesdiasvieira@arm.com>

bfd/
* bfd-in2.h (SEC_ELF_PURECODE): New.
* elf32-arm.c (THUMB32_MOVT): New veneer macro.
(THUMB32_MOVW): Likewise.
(elf32_arm_stub_long_branch_thumb2_only_pure): New.
(DEF_STUBS): Define long_branch_thumb2_only_pure.
(arm_stub_is_thumb): Add new veneer stub.
(arm_type_of_stub): Use new veneer.
(arm_stub_required_alignment): Add new veneer.
(elf32_arm_post_process_headers): Set p_flag.
(elf32_arm_fake_sections): Handle SEC_ELF_PURECODE.
(elf32_arm_section_flags): New.
(elf_backend_section_flags): Define to elf32_arm_section_flags.
(elf32_arm_lookup_section_flags): New.
(elf_backend_lookup_section_flags_hook): Define to
elf32_arm_lookup_section_flags.
* section.c (SEC_ELF_PURECODE): NEW.

binutils/
* objdump.c (dump_section_header): Handle SEC_ELF_PURECODE.
* readelf.c (get_elf_section_flags): Handle PURECODE.
(process_section_headers): Add purecode to help message.

include/elf/
* arm.h (SHF_ARM_PURECODE): New.

ld/testsuite/
* ld-arm/arm_purecode.ld: New.
* ld-arm/farcall-thumb2-purecode.d: New test result.
* ld-arm/farcall-thumb2-purecode.s: New test.
* ld-arm/arm-elf.exp: Run it.

Bump date

Fix Thumb-2 BL detection

2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com>

Backport from mainline
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com>

bfd/
* elf32-arm.c (using_thumb2_bl): New function.
(arm_type_of_stub): Declare thumb2 variable together and change type
to bfd_boolean. Use using_thumb2_bl () to determine whether
THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
checked for BL range.
(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
the bit size of BL offset.

ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
(Thumb-2 BL on ARMv6-M): New testcase.
* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.

Fix feature checks based on ARM architecture value

2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com>

Backport from mainline
2016-06-14 Thomas Preud'homme <thomas.preudhomme@arm.com>

bfd/
* elf32-arm.c (using_thumb_only): Force review of arch check logic for
new architecture.
(using_thumb2): Try Tag_THUMB_ISA_use first and check
for exact arch value then. Force review of arch check logic for new
architecture.
(arch_has_arm_nop): Update and fix arch check logic. Force review of
that logic for new architecture.
(arch_has_thumb2_nop): Remove.
(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
(elf32_arm_final_link_relocate): Likewise but using thumb2.

Fix of backport for thumb2 long branch veneers

2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com>

bfd/
* elf32-arm.c (arm_new_stubs_start_offset_ptr): Add case for
arm_stub_long_branch_thumb2_only.

2016-09-21 Andre Vieira <andre.simoesdiasvieira@arm.com>

Backport from mainline
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>

bfd/
* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
sequence.
(stub_long_branch_thumb2_only): Define stub.
(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
(arm_stub_long_branch_thumb2_only): Likewise.
(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
capable targets.

ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
Assemble for ARMv6-M.
(Thumb2-Thumb2 farcall M profile): New testcase.
* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.

Merge remote-tracking branch 'origin/binutils-2_26-branch' into embedded-binutils-2_26-branch

Backport lastest POWER9 support to match final ISA 3.0 documentation.

opcodes/
Apply from master.
2016-09-14 Peter Bergner <bergner@vnet.ibm.com>

* ppc-opc.c (powerpc_opcodes) <slbiag>: New mnemonic.
<addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
xor3>: Delete mnemonics.
<cp_abort>: Rename mnemonic from ...
<cpabort>: ...to this.
<setb>: Change to a X form instruction.
<sync>: Change to 1 operand form.
<copy>: Delete mnemonic.
<copy_first>: Rename mnemonic from ...
<copy>: ...to this.
<paste, paste.>: Delete mnemonics.
<paste_last>: Rename mnemonic from ...
<paste.>: ...to this.

gas/
Apply from master.
2016-09-14 Peter Bergner <bergner@vnet.ibm.com>

* testsuite/gas/ppc/power9.d <slbiag, cpabort> New tests.
<addex., brd, brh, brw, lwzmx, nandxor, rldixor, setbool,
xor3, cp_abort, copy_first, paste, paste_last, sync>: Remove tests.
<copy, paste.>: Update tests.
* testsuite/gas/ppc/power9.s: Likewise.

2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>

Backport from mainline
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>

gas/
* config/tc-arm.c (v7m_psrs): Add MSPLIM, PSPLIM, MSPLIM_NS,
PSPLIM_NS, PRIMASK_NS, BASEPRI_NS, FAULTMASK_NS, CONTROL_NS, SP_NS and
their lowecase counterpart special registers. Write register
identifier in hex.
* testsuite/gas/arm/archv8m-cmse-msr.s: Reorganize tests per
operation, special register and then case. Use different register for
each operation. Add tests for new special registers.
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Adapt expected result
accordingly.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.

opcodes/
* arm-dis.c (psr_name): Use hex as case labels. Add detection for
MSPLIM, PSPLIM, MSPLIM_NS, PSPLIM_NS, PRIMASK_NS, BASEPRI_NS,
FAULTMASK_NS, CONTROL_NS and SP_NS special registers.

2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>

Backport from mainline
2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>

* config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
special registers.
* testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
registers.
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.

PowerPC64 ld segfault with code in non-executable sections

PR ld/20428
* elf64-ppc.c (ppc_get_stub_entry): Don't segfault on NULL group.

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in