binutils_os216

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plugin: Search bfd-plugins directories only once

try_load_plugin is updated to take either plugin name or plugin entry.
load_plugin is updated to search bfd-plugins directories first to build
a list of plugins and call try_load_plugin with each plugin on the list.
When --plugin is used, the plugin list only has one entry.

* plugin.c (try_load_plugin): Make plugin_list_iter an argument
and use it if it isn't NULL. Remove has_plugin_p argument. Add
a build_list_p argument. Don't search plugin_list. Short circuit
when building the plugin list.
(has_plugin): Renamed to has_plugin_list.
(bfd_plugin_set_plugin): Don't set has_plugin.
(bfd_plugin_specified_p): Check plugin_list instead.
(build_plugin_list): New function.
(load_plugin): Call build_plugin_list and use plugin_list.

(cherry picked from commit 99845b3b77ed1248b6fb94707f88868bde358ccc)

Plugin: Treat each object as independent

Since plugin treats each object as independent, we must do a fresh dlopen
of plugin for each object.

PR binutils/25355
* plugin.c (try_claim): Always clean up for LTO wrapper.
(try_load_plugin): Treat each object as independent. Create a
copy for plugin name.

(cherry picked from commit 22fe7df8c964c23f5760ecf9653af86ede8b5030)

Clear plugin_data memory

Clear plugin_data memory since it may be uninitialized.

* plugin.c (add_symbols): Clear plugin_data memory.

(cherry picked from commit 1d07a805c8ffb611b1ee21b30dd16f10ff8b11bf)

Use GCC LTO wrapper to get real symbols from LTO IR objects

GCC LTO wrapper is needed to extract real symbols from LTO IR objects.
This patch does the following:

1. Set up GCC LTO wrapper for each LTO IR object.
2. Run GCC LTO wrapper to get the real object.
3. Extract symbol info from the real object.
4. Cleanup afterwards.

bfd/

PR binutils/25355
* configure.ac (HAVE_EXECUTABLE_SUFFIX): New AC_DEFINE.
(EXECUTABLE_SUFFIX): Likewise.
* config.in: Regenerated.
* configure: Likewise.
* plugin.c (bfd_plugin_close_and_cleanup): Removed.
(plugin_list_entry): Add all_symbols_read, cleanup_handler,
gcc, lto_wrapper, resolution_file, resolution_option, gcc_env,
real_bfd, real_nsyms, real_syms, lto_nsyms and lto_syms.
(get_lto_wrapper): New.
(setup_lto_wrapper_env): Likewise.
(current_plugin): Likewise.
(register_all_symbols_read): Likewise.
(register_cleanup): Likewise.
(get_symbols): Likewise.
(add_input_file): Likewise.
(bfd_plugin_close_and_cleanup): Likewise.
(claim_file): Removed.
(register_claim_file): Set current_plugin->claim_file.
(add_symbols): Make a copy of LTO symbols. Set lto_nsyms and
lto_syms in current_plugin.
(try_claim): Use current_plugin->claim_file. Call LTO plugin
all_symbols_read handler. Copy real symbols to plugin_data.
Call LTO plugin cleanup handler. Clean up for LTO wrapper.
(try_load_plugin): Don't reuse the previous plugin for LTO
wrapper. Set up GCC LTO wrapper if possible. Don't set
plugin_list_iter->claim_file.
(bfd_plugin_canonicalize_symtab): Use real LTO symbols if
possible.
* plugin.h (plugin_data_struct): Add real_bfd, real_nsyms and
real_syms.

ld/

PR binutils/25355
* testsuite/ld-plugin/lto.exp: Run PR binutils/25355 test.
* testsuite/ld-plugin/pr25355.c: New file.
* testsuite/ld-plugin/pr25355.d: Likewise.
* testsuite/lib/ld-lib.exp (run_cc_link_tests): Support compile
only dump.

(cherry picked from commit 0aa99dcd70bce68f8efef310350a6294e1143382)

Automatic date update in version.in

Automatic date update in version.in

Import a fix from the mainline sources that prevents a potential illegal memory access when parsing PE binaries.

PR 25447
* coffgen.c (_bfd_coff_close_and_cleanup): Do not clear the keep
syms and keep strings flags as these may have been set in order to
prevent a bogus call to free.

Fix building elf43-msp430.c on a 32-bit host.

* elf32-msp430.c (msp430_final_link_relocate): Always use longs
for addresses in print statements.
(msp430_elf_relax_delete_bytes): Likewise.
(msp430_elf_relax_add_words): Likewise.
(msp430_elf_relax_section): Likewise.

Automatic date update in version.in

MSP430: Enable relaxation of jump instructions to hard-coded pcrel offsets

This patch fixes execution failures which occur when the BR in a
sequence such as:
J<cond> 1f
BR
1:
is relaxed to a JMP, and the pc-relative offset for the destination of
the J<cond> instruction is hard-coded to be 2 words ahead of the
instruction.
The hard-coded offset will cause execution to jump 1 word ahead of where
it should actually go.

Instead we now detect the hard-coded offset is one we inserted earlier,
and invert the condition, allowing us to remove the BR entirely.

bfd/ChangeLog:

2020-02-10 Jozef Lawrynowicz <jozef.l@mittosystems.com>

* elf32-msp430.c (msp430_elf_relax_section): Before relaxing a branch,
check if previous instruction matches a conditional jump inserted
earlier. Invert conditional jump and delete branch in this case.

(cherry picked from commit ac4280dad035bb98fba999c174314435aefdf1a0)

MSP430: Enable relaxation of relocs in JMP instructions

This patch fixes relocation overflows caused by an inability to relax
unconditional JMP instructions to BR instructions.

bfd/ChangeLog:

2020-02-10 Jozef Lawrynowicz <jozef.l@mittosystems.com>

* elf32-msp430.c (msp430_elf_relax_add_two_words): Rename to
msp430_elf_relax_add_words. Support insertion of either one or two
words.
(msp430_elf_relax_section): Catch opcode of 0x3c00 when relocation
needs to be grown. Handle insertion of branch instruction to replace
jump.

(cherry picked from commit 8d6cb116f47b5edb2a7c2fa540fcb9dbcd3effc2)

MSP430: Add printf statements to assist with debugging during relaxation

bfd/ChangeLog:

2020-02-10 Jozef Lawrynowicz <jozef.l@mittosystems.com>

* elf32-msp430.c (msp430_final_link_relocate): Add printf statements for
debugging relocations.
(msp430_elf_relax_delete_bytes): Likewise.
(msp430_elf_relax_add_two_words): Likewise.
(msp430_elf_relax_section): Likewise.

(cherry picked from commit d60f54486a99e6b702cccdb16b3429f3524021fd)

x86: Accept Intel64 only instruction by default

Commit d835a58baae720 disabled sysenter/sysenter in 64-bit mode by
default. By default, assembler should accept common, Intel64 only
and AMD64 ISAs since there are no conflicts.

gas/

PR gas/25516
* config/tc-i386.c (intel64): Renamed to ...
(isa64): This.
(match_template): Accept Intel64 only instruction by default.
(i386_displacement): Updated.
(md_parse_option): Updated.
* c-i386.texi: Update -mamd64/-mintel64 documentation.
* testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
-mamd64 to x86-64-sysenter-amd.
* testsuite/gas/i386/x86-64-sysenter.d: New file.

opcodes/

PR gas/25516
* i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
with ISA64.
* i386-opc.h (AMD64): Removed.
(Intel64): Likewose.
(AMD64): New.
(INTEL64): Likewise.
(INTEL64ONLY): Likewise.
(i386_opcode_modifier): Replace amd64 and intel64 with isa64.
* i386-opc.tbl (Amd64): New.
(Intel64): Likewise.
(Intel64Only): Likewise.
Replace AMD64 with Amd64. Update sysenter/sysenter with
Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
* i386-tbl.h: Regenerated.

(cherry picked from commit 4b5aaf5f6992319c2c72e080a1a55842640b8732)

aarch64: Fix MOVPRFX markup for bf16 conversions

bfcvt converts a .S input to a .H output, so any predicated movprfx
needs to operate on .S rather than .H. In common with SVE2 narrowing
top operations, bfcvtnt doesn't accept movprfx.

2020-02-10 Richard Sandiford <richard.sandiford@arm.com>

opcodes/
* aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
Remove C_SCAN_MOVPRFX for SVE bfcvtnt.

gas/
* testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
.s for the movprfx.
* testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
* testsuite/gas/aarch64/sve-movprfx_28.d,
* testsuite/gas/aarch64/sve-movprfx_28.l,
* testsuite/gas/aarch64/sve-movprfx_28.s: New test.

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

[2.34] Mention x86 assembler options to align branches

* NEWS: Mention x86 assembler options to align branches for
binutils 2.34.

(cherry picked from commit 5eb617a71463fa6810cd14f57adfe7a1efc93a96)

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Automatic date update in version.in

Re-enable development.

Set version to 2.34, turn off development, add changelog entries

Automatic date update in version.in

arm: PR gas/25472 Enable DSP instructions with +mve

We noticed +mve was not enabling DSP instructions as it should, reported in PR
25472.
The MVE architecture extension for Armv8.1-M Mainline implies DSP extensions.
This patch reflects that in the '+mve' command line option.

gas/ChangeLog:
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>

Backport from mainline.
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>

PR gas/25472
* config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
(armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
+mve.
* testsuite/gas/arm/mve_dsp.d: New test.

Fix compile time build problem building the s390 assembler.

* config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
rather than BFD_RELOC_NONE.

[ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructions in MVE.

This patch adds support for assembly instructions vldmia, vldmdb, vstmia
and vstmdb in MVE. This instructions are already supported for Armv8-M
Floating-point Extension.

gas/ChangeLog:

2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>

* config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
to support VLDMIA instruction for MVE.
(fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
instruction for MVE.
(fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
instruction for MVE.
(fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
instruction for MVE.
* testsuite/gas/arm/mve-ldst.d: New test.
* testsuite/gas/arm/mve-ldst.s: Likewise.