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Project Description

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.

Detail:

  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

Released at 2008-10-31 00:55
noodlybox 0001 (1 files Hide)

Release Notes

NOODLYBOXの初めてのリリースです。
Repositoryのtrunk rev35に相当します。

バージョン部分は、今後0002,0003,...のようにインクリメントしていきます。

ぜひ、HDLとTclとCがごった煮で動く奇妙さを体験してみてください。

Changelog

初回リリース。