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Project Description

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.

Detail:

  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

Released at 2011-04-20 23:50
isesimutil r193 (1 files Hide)

Release Notes

Xilinx ISE Simulatorを便利に使うためのスクリプトです。

ISE SimulatorのConsoleタブにて、

source isesimutil.tcl
と打ち込んで読み込ませることで、以下のコマンドが使用可能になります。

  • gather_wave
    • インスタンスごとにグループ化しつつ信号を波形ウィンドウに追加します。
  • dump_pblaz
    • PicoBlaze3のレジスタ、フラグ、ScratchPadMemoryを波形ウィンドウに追加します。

詳細説明は http://sourceforge.jp/projects/noodlybox/wiki/IseSimUtil をご覧ください。

Changelog

最初のリリースです。