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Project Description

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.


  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

Released at 2009-09-20 22:06
noodlybox 0007 (1 files Hide)

Release Notes

Repositoryのtrunk rev98に相当します。

SH7751モデルがデータバスから信号を取り込むタイミングが、間違ってT2のFalling edgeになっていたのを、T2の最後のRising Edgeに直しました。(バスタイミングの詳細はSH7751グループ、SH7751Rグループハードウェアマニュアルの図13.6を参照)
version0006をダウンロードして、sample/rtl/SAMPLEFPGA.の92行目をassign #10 D = ~と変えてシミュレーションすれば、バグを再現できます。


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