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Project Description

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.

Detail:

  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

Released at 2010-01-01 19:46
noodlybox 0012 (1 files Hide)

Release Notes

This version is equivalent to "trunk rev137" in the repository.

  • Icarus Verilog came to be built semi-automatically.
  • Installation of Ruby and GtkWave became easy.

Please refer to IcarusVerilog and InstSupport for the details.

Repositoryのtrunk rev137に相当します。

  • Icarus Verilogを半自動でビルドできるようにしました。
  • rubyとgtkwaveを簡単にインストールできるようにしました。

詳細はIcarusVerilogおよびInstSupportを参照してください。

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